pm.c 4.0 KB

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  1. /* linux/arch/arm/plat-s3c64xx/pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C64XX CPU PM support.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/suspend.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/io.h>
  18. #include <mach/map.h>
  19. #include <plat/pm.h>
  20. #include <plat/regs-sys.h>
  21. #include <plat/regs-gpio.h>
  22. #include <plat/regs-clock.h>
  23. #include <plat/regs-syscon-power.h>
  24. #include <plat/regs-gpio-memport.h>
  25. #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
  26. #include <plat/gpio-bank-n.h>
  27. void s3c_pm_debug_smdkled(u32 set, u32 clear)
  28. {
  29. unsigned long flags;
  30. u32 reg;
  31. local_irq_save(flags);
  32. reg = __raw_readl(S3C64XX_GPNCON);
  33. reg &= ~(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) |
  34. S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15));
  35. reg |= S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) |
  36. S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15);
  37. __raw_writel(reg, S3C64XX_GPNCON);
  38. reg = __raw_readl(S3C64XX_GPNDAT);
  39. reg &= ~(clear << 12);
  40. reg |= set << 12;
  41. __raw_writel(reg, S3C64XX_GPNDAT);
  42. local_irq_restore(flags);
  43. }
  44. #endif
  45. static struct sleep_save core_save[] = {
  46. SAVE_ITEM(S3C_APLL_LOCK),
  47. SAVE_ITEM(S3C_MPLL_LOCK),
  48. SAVE_ITEM(S3C_EPLL_LOCK),
  49. SAVE_ITEM(S3C_CLK_SRC),
  50. SAVE_ITEM(S3C_CLK_DIV0),
  51. SAVE_ITEM(S3C_CLK_DIV1),
  52. SAVE_ITEM(S3C_CLK_DIV2),
  53. SAVE_ITEM(S3C_CLK_OUT),
  54. SAVE_ITEM(S3C_HCLK_GATE),
  55. SAVE_ITEM(S3C_PCLK_GATE),
  56. SAVE_ITEM(S3C_SCLK_GATE),
  57. SAVE_ITEM(S3C_MEM0_GATE),
  58. SAVE_ITEM(S3C_EPLL_CON1),
  59. SAVE_ITEM(S3C_EPLL_CON0),
  60. SAVE_ITEM(S3C64XX_MEM0DRVCON),
  61. SAVE_ITEM(S3C64XX_MEM1DRVCON),
  62. #ifndef CONFIG_CPU_FREQ
  63. SAVE_ITEM(S3C_APLL_CON),
  64. SAVE_ITEM(S3C_MPLL_CON),
  65. #endif
  66. };
  67. static struct sleep_save misc_save[] = {
  68. SAVE_ITEM(S3C64XX_AHB_CON0),
  69. SAVE_ITEM(S3C64XX_AHB_CON1),
  70. SAVE_ITEM(S3C64XX_AHB_CON2),
  71. SAVE_ITEM(S3C64XX_SPCON),
  72. SAVE_ITEM(S3C64XX_MEM0CONSTOP),
  73. SAVE_ITEM(S3C64XX_MEM1CONSTOP),
  74. SAVE_ITEM(S3C64XX_MEM0CONSLP0),
  75. SAVE_ITEM(S3C64XX_MEM0CONSLP1),
  76. SAVE_ITEM(S3C64XX_MEM1CONSLP),
  77. };
  78. void s3c_pm_configure_extint(void)
  79. {
  80. __raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK);
  81. }
  82. void s3c_pm_restore_core(void)
  83. {
  84. __raw_writel(0, S3C64XX_EINT_MASK);
  85. s3c_pm_debug_smdkled(1 << 2, 0);
  86. s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
  87. s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
  88. }
  89. void s3c_pm_save_core(void)
  90. {
  91. s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
  92. s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
  93. }
  94. /* since both s3c6400 and s3c6410 share the same sleep pm calls, we
  95. * put the per-cpu code in here until any new cpu comes along and changes
  96. * this.
  97. */
  98. static void s3c64xx_cpu_suspend(void)
  99. {
  100. unsigned long tmp;
  101. /* set our standby method to sleep */
  102. tmp = __raw_readl(S3C64XX_PWR_CFG);
  103. tmp &= ~S3C64XX_PWRCFG_CFG_WFI_MASK;
  104. tmp |= S3C64XX_PWRCFG_CFG_WFI_SLEEP;
  105. __raw_writel(tmp, S3C64XX_PWR_CFG);
  106. /* clear any old wakeup */
  107. __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT),
  108. S3C64XX_WAKEUP_STAT);
  109. /* set the LED state to 0110 over sleep */
  110. s3c_pm_debug_smdkled(3 << 1, 0xf);
  111. /* issue the standby signal into the pm unit. Note, we
  112. * issue a write-buffer drain just in case */
  113. tmp = 0;
  114. asm("b 1f\n\t"
  115. ".align 5\n\t"
  116. "1:\n\t"
  117. "mcr p15, 0, %0, c7, c10, 5\n\t"
  118. "mcr p15, 0, %0, c7, c10, 4\n\t"
  119. "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
  120. /* we should never get past here */
  121. panic("sleep resumed to originator?");
  122. }
  123. static void s3c64xx_pm_prepare(void)
  124. {
  125. /* store address of resume. */
  126. __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
  127. /* ensure previous wakeup state is cleared before sleeping */
  128. __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
  129. }
  130. static int s3c64xx_pm_init(void)
  131. {
  132. pm_cpu_prep = s3c64xx_pm_prepare;
  133. pm_cpu_sleep = s3c64xx_cpu_suspend;
  134. pm_uart_udivslot = 1;
  135. return 0;
  136. }
  137. arch_initcall(s3c64xx_pm_init);