dma-plat.h 2.1 KB

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  1. /* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
  2. *
  3. * Copyright (C) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Samsung S3C24XX DMA support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <plat/dma-core.h>
  13. extern struct sysdev_class dma_sysclass;
  14. extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
  15. #define DMA_CH_VALID (1<<31)
  16. #define DMA_CH_NEVER (1<<30)
  17. struct s3c24xx_dma_addr {
  18. unsigned long from;
  19. unsigned long to;
  20. };
  21. /* struct s3c24xx_dma_map
  22. *
  23. * this holds the mapping information for the channel selected
  24. * to be connected to the specified device
  25. */
  26. struct s3c24xx_dma_map {
  27. const char *name;
  28. struct s3c24xx_dma_addr hw_addr;
  29. unsigned long channels[S3C_DMA_CHANNELS];
  30. unsigned long channels_rx[S3C_DMA_CHANNELS];
  31. };
  32. struct s3c24xx_dma_selection {
  33. struct s3c24xx_dma_map *map;
  34. unsigned long map_size;
  35. unsigned long dcon_mask;
  36. void (*select)(struct s3c2410_dma_chan *chan,
  37. struct s3c24xx_dma_map *map);
  38. void (*direction)(struct s3c2410_dma_chan *chan,
  39. struct s3c24xx_dma_map *map,
  40. enum s3c2410_dmasrc dir);
  41. };
  42. extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
  43. /* struct s3c24xx_dma_order_ch
  44. *
  45. * channel map for one of the `enum dma_ch` dma channels. the list
  46. * entry contains a set of low-level channel numbers, orred with
  47. * DMA_CH_VALID, which are checked in the order in the array.
  48. */
  49. struct s3c24xx_dma_order_ch {
  50. unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */
  51. unsigned int flags; /* flags */
  52. };
  53. /* struct s3c24xx_dma_order
  54. *
  55. * information provided by either the core or the board to give the
  56. * dma system a hint on how to allocate channels
  57. */
  58. struct s3c24xx_dma_order {
  59. struct s3c24xx_dma_order_ch channels[DMACH_MAX];
  60. };
  61. extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
  62. /* DMA init code, called from the cpu support code */
  63. extern int s3c2410_dma_init(void);
  64. extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
  65. unsigned int stride);