Kconfig 4.3 KB

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  1. # arch/arm/plat-s3c24xx/Kconfig
  2. #
  3. # Copyright 2007 Simtec Electronics
  4. #
  5. # Licensed under GPLv2
  6. config PLAT_S3C24XX
  7. bool
  8. depends on ARCH_S3C2410 || ARCH_S3C24A0
  9. default y
  10. select NO_IOPORT
  11. select ARCH_REQUIRE_GPIOLIB
  12. select S3C_DEVICE_NAND
  13. help
  14. Base platform code for any Samsung S3C24XX device
  15. if PLAT_S3C24XX
  16. # code that is shared between a number of the s3c24xx implementations
  17. config S3C2410_CLOCK
  18. bool
  19. help
  20. Clock code for the S3C2410, and similar processors which
  21. is currently includes the S3C2410, S3C2440, S3C2442.
  22. config S3C24XX_DCLK
  23. bool
  24. help
  25. Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
  26. config CPU_S3C244X
  27. bool
  28. depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
  29. help
  30. Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
  31. config S3C2440_CPUFREQ
  32. bool "S3C2440/S3C2442 CPU Frequency scaling support"
  33. depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
  34. select S3C2410_CPUFREQ_UTILS
  35. default y
  36. help
  37. CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
  38. config S3C2440_XTAL_12000000
  39. bool
  40. help
  41. Indicate that the build needs to support 12MHz system
  42. crystal.
  43. config S3C2440_XTAL_16934400
  44. bool
  45. help
  46. Indicate that the build needs to support 16.9344MHz system
  47. crystal.
  48. config S3C2440_PLL_12000000
  49. bool
  50. depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
  51. default y if CPU_FREQ_S3C24XX_PLL
  52. help
  53. PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
  54. config S3C2440_PLL_16934400
  55. bool
  56. depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
  57. default y if CPU_FREQ_S3C24XX_PLL
  58. help
  59. PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
  60. config S3C24XX_PWM
  61. bool "PWM device support"
  62. select HAVE_PWM
  63. help
  64. Support for exporting the PWM timer blocks via the pwm device
  65. system.
  66. # gpio configurations
  67. config S3C24XX_GPIO_EXTRA
  68. int
  69. default 128 if S3C24XX_GPIO_EXTRA128
  70. default 64 if S3C24XX_GPIO_EXTRA64
  71. default 0
  72. config S3C24XX_GPIO_EXTRA64
  73. bool
  74. help
  75. Add an extra 64 gpio numbers to the available GPIO pool. This is
  76. available for boards that need extra gpios for external devices.
  77. config S3C24XX_GPIO_EXTRA128
  78. bool
  79. help
  80. Add an extra 128 gpio numbers to the available GPIO pool. This is
  81. available for boards that need extra gpios for external devices.
  82. config PM_SIMTEC
  83. bool
  84. help
  85. Common power management code for systems that are
  86. compatible with the Simtec style of power management
  87. config S3C2410_DMA
  88. bool "S3C2410 DMA support"
  89. depends on ARCH_S3C2410
  90. select S3C_DMA
  91. help
  92. S3C2410 DMA support. This is needed for drivers like sound which
  93. use the S3C2410's DMA system to move data to and from the
  94. peripheral blocks.
  95. config S3C2410_DMA_DEBUG
  96. bool "S3C2410 DMA support debug"
  97. depends on ARCH_S3C2410 && S3C2410_DMA
  98. help
  99. Enable debugging output for the DMA code. This option sends info
  100. to the kernel log, at priority KERN_DEBUG.
  101. config S3C24XX_ADC
  102. bool "ADC common driver support"
  103. help
  104. Core support for the ADC block found in the S3C24XX SoC systems
  105. for drivers such as the touchscreen and hwmon to use to share
  106. this resource.
  107. # SPI default pin configuration code
  108. config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
  109. bool
  110. help
  111. SPI GPIO configuration code for BUS0 when connected to
  112. GPE11, GPE12 and GPE13.
  113. config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
  114. bool
  115. help
  116. SPI GPIO configuration code for BUS 1 when connected to
  117. GPG5, GPG6 and GPG7.
  118. config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10
  119. bool
  120. help
  121. SPI GPIO configuration code for BUS 1 when connected to
  122. GPD8, GPD9 and GPD10.
  123. # common code for s3c24xx based machines, such as the SMDKs.
  124. # cpu frequency items common between s3c2410 and s3c2440/s3c2442
  125. config S3C2410_IOTIMING
  126. bool
  127. depends on CPU_FREQ_S3C24XX
  128. help
  129. Internal node to select io timing code that is common to the s3c2410
  130. and s3c2440/s3c2442 cpu frequency support.
  131. config S3C2410_CPUFREQ_UTILS
  132. bool
  133. depends on CPU_FREQ_S3C24XX
  134. help
  135. Internal node to select timing code that is common to the s3c2410
  136. and s3c2440/s3c244 cpu frequency support.
  137. # cpu frequency support common to s3c2412, s3c2413 and s3c2442
  138. config S3C2412_IOTIMING
  139. bool
  140. depends on CPU_FREQ_S3C24XX && (CPU_S3C2412 || CPU_S3C2443)
  141. help
  142. Intel node to select io timing code that is common to the s3c2412
  143. and the s3c2443.
  144. config MACH_SMDK
  145. bool
  146. help
  147. Common machine code for SMDK2410 and SMDK2440
  148. endif