omap-pm.h 10 KB

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  1. /*
  2. * omap-pm.h - OMAP power management interface
  3. *
  4. * Copyright (C) 2008-2009 Texas Instruments, Inc.
  5. * Copyright (C) 2008-2009 Nokia Corporation
  6. * Paul Walmsley
  7. *
  8. * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
  9. * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
  10. * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
  11. * Richard Woodruff
  12. */
  13. #ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
  14. #define ASM_ARM_ARCH_OMAP_OMAP_PM_H
  15. #include <linux/device.h>
  16. #include <linux/cpufreq.h>
  17. #include "powerdomain.h"
  18. /**
  19. * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
  20. * @rate: target clock rate
  21. * @opp_id: OPP ID
  22. * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
  23. *
  24. * Operating performance point data. Can vary by OMAP chip and board.
  25. */
  26. struct omap_opp {
  27. unsigned long rate;
  28. u8 opp_id;
  29. u16 min_vdd;
  30. };
  31. extern struct omap_opp *mpu_opps;
  32. extern struct omap_opp *dsp_opps;
  33. extern struct omap_opp *l3_opps;
  34. /*
  35. * agent_id values for use with omap_pm_set_min_bus_tput():
  36. *
  37. * OCP_INITIATOR_AGENT is only valid for devices that can act as
  38. * initiators -- it represents the device's L3 interconnect
  39. * connection. OCP_TARGET_AGENT represents the device's L4
  40. * interconnect connection.
  41. */
  42. #define OCP_TARGET_AGENT 1
  43. #define OCP_INITIATOR_AGENT 2
  44. /**
  45. * omap_pm_if_early_init - OMAP PM init code called before clock fw init
  46. * @mpu_opp_table: array ptr to struct omap_opp for MPU
  47. * @dsp_opp_table: array ptr to struct omap_opp for DSP
  48. * @l3_opp_table : array ptr to struct omap_opp for CORE
  49. *
  50. * Initialize anything that must be configured before the clock
  51. * framework starts. The "_if_" is to avoid name collisions with the
  52. * PM idle-loop code.
  53. */
  54. int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
  55. struct omap_opp *dsp_opp_table,
  56. struct omap_opp *l3_opp_table);
  57. /**
  58. * omap_pm_if_init - OMAP PM init code called after clock fw init
  59. *
  60. * The main initialization code. OPP tables are passed in here. The
  61. * "_if_" is to avoid name collisions with the PM idle-loop code.
  62. */
  63. int __init omap_pm_if_init(void);
  64. /**
  65. * omap_pm_if_exit - OMAP PM exit code
  66. *
  67. * Exit code; currently unused. The "_if_" is to avoid name
  68. * collisions with the PM idle-loop code.
  69. */
  70. void omap_pm_if_exit(void);
  71. /*
  72. * Device-driver-originated constraints (via board-*.c files, platform_data)
  73. */
  74. /**
  75. * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
  76. * @dev: struct device * requesting the constraint
  77. * @t: maximum MPU wakeup latency in microseconds
  78. *
  79. * Request that the maximum interrupt latency for the MPU to be no
  80. * greater than 't' microseconds. "Interrupt latency" in this case is
  81. * defined as the elapsed time from the occurrence of a hardware or
  82. * timer interrupt to the time when the device driver's interrupt
  83. * service routine has been entered by the MPU.
  84. *
  85. * It is intended that underlying PM code will use this information to
  86. * determine what power state to put the MPU powerdomain into, and
  87. * possibly the CORE powerdomain as well, since interrupt handling
  88. * code currently runs from SDRAM. Advanced PM or board*.c code may
  89. * also configure interrupt controller priorities, OCP bus priorities,
  90. * CPU speed(s), etc.
  91. *
  92. * This function will not affect device wakeup latency, e.g., time
  93. * elapsed from when a device driver enables a hardware device with
  94. * clk_enable(), to when the device is ready for register access or
  95. * other use. To control this device wakeup latency, use
  96. * set_max_dev_wakeup_lat()
  97. *
  98. * Multiple calls to set_max_mpu_wakeup_lat() will replace the
  99. * previous t value. To remove the latency target for the MPU, call
  100. * with t = -1.
  101. *
  102. * No return value.
  103. */
  104. void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
  105. /**
  106. * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
  107. * @dev: struct device * requesting the constraint
  108. * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
  109. * @r: minimum throughput (in KiB/s)
  110. *
  111. * Request that the minimum data throughput on the OCP interconnect
  112. * attached to device 'dev' interconnect agent 'tbus_id' be no less
  113. * than 'r' KiB/s.
  114. *
  115. * It is expected that the OMAP PM or bus code will use this
  116. * information to set the interconnect clock to run at the lowest
  117. * possible speed that satisfies all current system users. The PM or
  118. * bus code will adjust the estimate based on its model of the bus, so
  119. * device driver authors should attempt to specify an accurate
  120. * quantity for their device use case, and let the PM or bus code
  121. * overestimate the numbers as necessary to handle request/response
  122. * latency, other competing users on the system, etc. On OMAP2/3, if
  123. * a driver requests a minimum L4 interconnect speed constraint, the
  124. * code will also need to add an minimum L3 interconnect speed
  125. * constraint,
  126. *
  127. * Multiple calls to set_min_bus_tput() will replace the previous rate
  128. * value for this device. To remove the interconnect throughput
  129. * restriction for this device, call with r = 0.
  130. *
  131. * No return value.
  132. */
  133. void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
  134. /**
  135. * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
  136. * @dev: struct device *
  137. * @t: maximum device wakeup latency in microseconds
  138. *
  139. * Request that the maximum amount of time necessary for a device to
  140. * become accessible after its clocks are enabled should be no greater
  141. * than 't' microseconds. Specifically, this represents the time from
  142. * when a device driver enables device clocks with clk_enable(), to
  143. * when the register reads and writes on the device will succeed.
  144. * This function should be called before clk_disable() is called,
  145. * since the power state transition decision may be made during
  146. * clk_disable().
  147. *
  148. * It is intended that underlying PM code will use this information to
  149. * determine what power state to put the powerdomain enclosing this
  150. * device into.
  151. *
  152. * Multiple calls to set_max_dev_wakeup_lat() will replace the
  153. * previous wakeup latency values for this device. To remove the wakeup
  154. * latency restriction for this device, call with t = -1.
  155. *
  156. * No return value.
  157. */
  158. void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
  159. /**
  160. * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
  161. * @dev: struct device *
  162. * @t: maximum DMA transfer start latency in microseconds
  163. *
  164. * Request that the maximum system DMA transfer start latency for this
  165. * device 'dev' should be no greater than 't' microseconds. "DMA
  166. * transfer start latency" here is defined as the elapsed time from
  167. * when a device (e.g., McBSP) requests that a system DMA transfer
  168. * start or continue, to the time at which data starts to flow into
  169. * that device from the system DMA controller.
  170. *
  171. * It is intended that underlying PM code will use this information to
  172. * determine what power state to put the CORE powerdomain into.
  173. *
  174. * Since system DMA transfers may not involve the MPU, this function
  175. * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
  176. * so. Similarly, this function will not affect device wakeup latency
  177. * -- use set_max_dev_wakeup_lat() to affect that.
  178. *
  179. * Multiple calls to set_max_sdma_lat() will replace the previous t
  180. * value for this device. To remove the maximum DMA latency for this
  181. * device, call with t = -1.
  182. *
  183. * No return value.
  184. */
  185. void omap_pm_set_max_sdma_lat(struct device *dev, long t);
  186. /*
  187. * DSP Bridge-specific constraints
  188. */
  189. /**
  190. * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
  191. *
  192. * Intended for use by DSPBridge. Returns an array of OPP->DSP clock
  193. * frequency entries. The final item in the array should have .rate =
  194. * .opp_id = 0.
  195. */
  196. const struct omap_opp *omap_pm_dsp_get_opp_table(void);
  197. /**
  198. * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
  199. * @opp_id: target DSP OPP ID
  200. *
  201. * Set a minimum OPP ID for the DSP. This is intended to be called
  202. * only from the DSP Bridge MPU-side driver. Unfortunately, the only
  203. * information that code receives from the DSP/BIOS load estimator is the
  204. * target OPP ID; hence, this interface. No return value.
  205. */
  206. void omap_pm_dsp_set_min_opp(u8 opp_id);
  207. /**
  208. * omap_pm_dsp_get_opp - report the current DSP OPP ID
  209. *
  210. * Report the current OPP for the DSP. Since on OMAP3, the DSP and
  211. * MPU share a single voltage domain, the OPP ID returned back may
  212. * represent a higher DSP speed than the OPP requested via
  213. * omap_pm_dsp_set_min_opp().
  214. *
  215. * Returns the current VDD1 OPP ID, or 0 upon error.
  216. */
  217. u8 omap_pm_dsp_get_opp(void);
  218. /*
  219. * CPUFreq-originated constraint
  220. *
  221. * In the future, this should be handled by custom OPP clocktype
  222. * functions.
  223. */
  224. /**
  225. * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
  226. *
  227. * Provide a frequency table usable by CPUFreq for the current chip/board.
  228. * Returns a pointer to a struct cpufreq_frequency_table array or NULL
  229. * upon error.
  230. */
  231. struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
  232. /**
  233. * omap_pm_cpu_set_freq - set the current minimum MPU frequency
  234. * @f: MPU frequency in Hz
  235. *
  236. * Set the current minimum CPU frequency. The actual CPU frequency
  237. * used could end up higher if the DSP requested a higher OPP.
  238. * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
  239. * return value.
  240. */
  241. void omap_pm_cpu_set_freq(unsigned long f);
  242. /**
  243. * omap_pm_cpu_get_freq - report the current CPU frequency
  244. *
  245. * Returns the current MPU frequency, or 0 upon error.
  246. */
  247. unsigned long omap_pm_cpu_get_freq(void);
  248. /*
  249. * Device context loss tracking
  250. */
  251. /**
  252. * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
  253. * @dev: struct device *
  254. *
  255. * This function returns the number of times that the device @dev has
  256. * lost its internal context. This generally occurs on a powerdomain
  257. * transition to OFF. Drivers use this as an optimization to avoid restoring
  258. * context if the device hasn't lost it. To use, drivers should initially
  259. * call this in their context save functions and store the result. Early in
  260. * the driver's context restore function, the driver should call this function
  261. * again, and compare the result to the stored counter. If they differ, the
  262. * driver must restore device context. If the number of context losses
  263. * exceeds the maximum positive integer, the function will wrap to 0 and
  264. * continue counting. Returns the number of context losses for this device,
  265. * or -EINVAL upon error.
  266. */
  267. int omap_pm_get_dev_context_loss_count(struct device *dev);
  268. #endif