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arch
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arm
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plat-mxc
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include
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mach
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board-mx21ads.h

board-mx21ads.h 1.8 KB
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  1. /*
    2. 

  2.  * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
    3. 

  3.  */
    4. 

  4. 

  5. /*
    6. 

  6.  * The code contained herein is licensed under the GNU General Public
    7. 

  7.  * License. You may obtain a copy of the GNU General Public License
    8. 

  8.  * Version 2 or later at the following locations:
    9. 

  9.  *
    10. 

  10.  * http://www.opensource.org/licenses/gpl-license.html
    11. 

  11.  * http://www.gnu.org/copyleft/gpl.html
    12. 

  12.  */
    13. 

  13. 

  14. #ifndef __ASM_ARCH_MXC_BOARD_MX21ADS_H__
    15. 

  15. #define __ASM_ARCH_MXC_BOARD_MX21ADS_H__
    16. 

  16. 

  17. /*
    18. 

  18.  * Memory-mapped I/O on MX21ADS base board
    19. 

  19.  */
    20. 

  20. #define MX21ADS_MMIO_BASE_ADDR   0xF5000000
    21. 

  21. #define MX21ADS_MMIO_SIZE        SZ_16M
    22. 

  22. 

  23. #define MX21ADS_REG_ADDR(offset)    (void __force __iomem *) \
    24. 

  24. 		(MX21ADS_MMIO_BASE_ADDR + (offset))
    25. 

  25. 

  26. #define MX21ADS_CS8900A_IRQ         IRQ_GPIOE(11)
    27. 

  27. #define MX21ADS_CS8900A_IOBASE_REG  MX21ADS_REG_ADDR(0x000000)
    28. 

  28. #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
    29. 

  29. #define MX21ADS_VERSION_REG         MX21ADS_REG_ADDR(0x400000)
    30. 

  30. #define MX21ADS_IO_REG              MX21ADS_REG_ADDR(0x800000)
    31. 

  31. 

  32. /* MX21ADS_IO_REG bit definitions */
    33. 

  33. #define MX21ADS_IO_SD_WP        0x0001 /* read */
    34. 

  34. #define MX21ADS_IO_TP6          0x0001 /* write */
    35. 

  35. #define MX21ADS_IO_SW_SEL       0x0002 /* read */
    36. 

  36. #define MX21ADS_IO_TP7          0x0002 /* write */
    37. 

  37. #define MX21ADS_IO_RESET_E_UART 0x0004
    38. 

  38. #define MX21ADS_IO_RESET_BASE   0x0008
    39. 

  39. #define MX21ADS_IO_CSI_CTL2     0x0010
    40. 

  40. #define MX21ADS_IO_CSI_CTL1     0x0020
    41. 

  41. #define MX21ADS_IO_CSI_CTL0     0x0040
    42. 

  42. #define MX21ADS_IO_UART1_EN     0x0080
    43. 

  43. #define MX21ADS_IO_UART4_EN     0x0100
    44. 

  44. #define MX21ADS_IO_LCDON        0x0200
    45. 

  45. #define MX21ADS_IO_IRDA_EN      0x0400
    46. 

  46. #define MX21ADS_IO_IRDA_FIR_SEL 0x0800
    47. 

  47. #define MX21ADS_IO_IRDA_MD0_B   0x1000
    48. 

  48. #define MX21ADS_IO_IRDA_MD1     0x2000
    49. 

  49. #define MX21ADS_IO_LED4_ON      0x4000
    50. 

  50. #define MX21ADS_IO_LED3_ON      0x8000
    51. 

  51. 

  52. #endif				/* __ASM_ARCH_MXC_BOARD_MX21ADS_H__ */
    53.