abort-ev6.S 1.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748
  1. #include <linux/linkage.h>
  2. #include <asm/assembler.h>
  3. #include "abort-macro.S"
  4. /*
  5. * Function: v6_early_abort
  6. *
  7. * Params : r2 = address of aborted instruction
  8. * : r3 = saved SPSR
  9. *
  10. * Returns : r0 = address of abort
  11. * : r1 = FSR, bit 11 = write
  12. * : r2-r8 = corrupted
  13. * : r9 = preserved
  14. * : sp = pointer to registers
  15. *
  16. * Purpose : obtain information about current aborted instruction.
  17. * Note: we read user space. This means we might cause a data
  18. * abort here if the I-TLB and D-TLB aren't seeing the same
  19. * picture. Unfortunately, this does happen. We live with it.
  20. */
  21. .align 5
  22. ENTRY(v6_early_abort)
  23. #ifdef CONFIG_CPU_32v6K
  24. clrex
  25. #else
  26. sub r1, sp, #4 @ Get unused stack location
  27. strex r0, r1, [r1] @ Clear the exclusive monitor
  28. #endif
  29. mrc p15, 0, r1, c5, c0, 0 @ get FSR
  30. mrc p15, 0, r0, c6, c0, 0 @ get FAR
  31. /*
  32. * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).
  33. * The test below covers all the write situations, including Java bytecodes
  34. */
  35. bic r1, r1, #1 << 11 @ clear bit 11 of FSR
  36. tst r3, #PSR_J_BIT @ Java?
  37. movne pc, lr
  38. do_thumb_abort
  39. ldreq r3, [r2] @ read aborted ARM instruction
  40. #ifdef CONFIG_CPU_ENDIAN_BE8
  41. reveq r3, r3
  42. #endif
  43. do_ldrd_abort
  44. tst r3, #1 << 20 @ L = 0 -> write
  45. orreq r1, r1, #1 << 11 @ yes.
  46. mov pc, lr