core.c 15 KB

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  1. /*
  2. *
  3. * arch/arm/mach-u300/core.c
  4. *
  5. *
  6. * Copyright (C) 2007-2009 ST-Ericsson AB
  7. * License terms: GNU General Public License (GPL) version 2
  8. * Core platform support, IRQ handling and device definitions.
  9. * Author: Linus Walleij <linus.walleij@stericsson.com>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/bitops.h>
  16. #include <linux/device.h>
  17. #include <linux/mm.h>
  18. #include <linux/termios.h>
  19. #include <linux/amba/bus.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/gpio.h>
  22. #include <asm/types.h>
  23. #include <asm/setup.h>
  24. #include <asm/memory.h>
  25. #include <asm/hardware/vic.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/irq.h>
  28. #include <mach/hardware.h>
  29. #include <mach/syscon.h>
  30. #include "clock.h"
  31. #include "mmc.h"
  32. #include "spi.h"
  33. #include "i2c.h"
  34. /*
  35. * Static I/O mappings that are needed for booting the U300 platforms. The
  36. * only things we need are the areas where we find the timer, syscon and
  37. * intcon, since the remaining device drivers will map their own memory
  38. * physical to virtual as the need arise.
  39. */
  40. static struct map_desc u300_io_desc[] __initdata = {
  41. {
  42. .virtual = U300_SLOW_PER_VIRT_BASE,
  43. .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
  44. .length = SZ_64K,
  45. .type = MT_DEVICE,
  46. },
  47. {
  48. .virtual = U300_AHB_PER_VIRT_BASE,
  49. .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
  50. .length = SZ_32K,
  51. .type = MT_DEVICE,
  52. },
  53. {
  54. .virtual = U300_FAST_PER_VIRT_BASE,
  55. .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
  56. .length = SZ_32K,
  57. .type = MT_DEVICE,
  58. },
  59. {
  60. .virtual = 0xffff2000, /* TCM memory */
  61. .pfn = __phys_to_pfn(0xffff2000),
  62. .length = SZ_16K,
  63. .type = MT_DEVICE,
  64. },
  65. /*
  66. * This overlaps with the IRQ vectors etc at 0xffff0000, so these
  67. * may have to be moved to 0x00000000 in order to use the ROM.
  68. */
  69. /*
  70. {
  71. .virtual = U300_BOOTROM_VIRT_BASE,
  72. .pfn = __phys_to_pfn(U300_BOOTROM_PHYS_BASE),
  73. .length = SZ_64K,
  74. .type = MT_ROM,
  75. },
  76. */
  77. };
  78. void __init u300_map_io(void)
  79. {
  80. iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
  81. }
  82. /*
  83. * Declaration of devices found on the U300 board and
  84. * their respective memory locations.
  85. */
  86. static struct amba_device uart0_device = {
  87. .dev = {
  88. .init_name = "uart0", /* Slow device at 0x3000 offset */
  89. .platform_data = NULL,
  90. },
  91. .res = {
  92. .start = U300_UART0_BASE,
  93. .end = U300_UART0_BASE + SZ_4K - 1,
  94. .flags = IORESOURCE_MEM,
  95. },
  96. .irq = { IRQ_U300_UART0, NO_IRQ },
  97. };
  98. /* The U335 have an additional UART1 on the APP CPU */
  99. #ifdef CONFIG_MACH_U300_BS335
  100. static struct amba_device uart1_device = {
  101. .dev = {
  102. .init_name = "uart1", /* Fast device at 0x7000 offset */
  103. .platform_data = NULL,
  104. },
  105. .res = {
  106. .start = U300_UART1_BASE,
  107. .end = U300_UART1_BASE + SZ_4K - 1,
  108. .flags = IORESOURCE_MEM,
  109. },
  110. .irq = { IRQ_U300_UART1, NO_IRQ },
  111. };
  112. #endif
  113. static struct amba_device pl172_device = {
  114. .dev = {
  115. .init_name = "pl172", /* AHB device at 0x4000 offset */
  116. .platform_data = NULL,
  117. },
  118. .res = {
  119. .start = U300_EMIF_CFG_BASE,
  120. .end = U300_EMIF_CFG_BASE + SZ_4K - 1,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. };
  124. /*
  125. * Everything within this next ifdef deals with external devices connected to
  126. * the APP SPI bus.
  127. */
  128. static struct amba_device pl022_device = {
  129. .dev = {
  130. .coherent_dma_mask = ~0,
  131. .init_name = "pl022", /* Fast device at 0x6000 offset */
  132. },
  133. .res = {
  134. .start = U300_SPI_BASE,
  135. .end = U300_SPI_BASE + SZ_4K - 1,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. .irq = {IRQ_U300_SPI, NO_IRQ },
  139. /*
  140. * This device has a DMA channel but the Linux driver does not use
  141. * it currently.
  142. */
  143. };
  144. static struct amba_device mmcsd_device = {
  145. .dev = {
  146. .init_name = "mmci", /* Fast device at 0x1000 offset */
  147. .platform_data = NULL, /* Added later */
  148. },
  149. .res = {
  150. .start = U300_MMCSD_BASE,
  151. .end = U300_MMCSD_BASE + SZ_4K - 1,
  152. .flags = IORESOURCE_MEM,
  153. },
  154. .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
  155. /*
  156. * This device has a DMA channel but the Linux driver does not use
  157. * it currently.
  158. */
  159. };
  160. /*
  161. * The order of device declaration may be important, since some devices
  162. * have dependencies on other devices being initialized first.
  163. */
  164. static struct amba_device *amba_devs[] __initdata = {
  165. &uart0_device,
  166. #ifdef CONFIG_MACH_U300_BS335
  167. &uart1_device,
  168. #endif
  169. &pl022_device,
  170. &pl172_device,
  171. &mmcsd_device,
  172. };
  173. /* Here follows a list of all hw resources that the platform devices
  174. * allocate. Note, clock dependencies are not included
  175. */
  176. static struct resource gpio_resources[] = {
  177. {
  178. .start = U300_GPIO_BASE,
  179. .end = (U300_GPIO_BASE + SZ_4K - 1),
  180. .flags = IORESOURCE_MEM,
  181. },
  182. {
  183. .name = "gpio0",
  184. .start = IRQ_U300_GPIO_PORT0,
  185. .end = IRQ_U300_GPIO_PORT0,
  186. .flags = IORESOURCE_IRQ,
  187. },
  188. {
  189. .name = "gpio1",
  190. .start = IRQ_U300_GPIO_PORT1,
  191. .end = IRQ_U300_GPIO_PORT1,
  192. .flags = IORESOURCE_IRQ,
  193. },
  194. {
  195. .name = "gpio2",
  196. .start = IRQ_U300_GPIO_PORT2,
  197. .end = IRQ_U300_GPIO_PORT2,
  198. .flags = IORESOURCE_IRQ,
  199. },
  200. #ifdef U300_COH901571_3
  201. {
  202. .name = "gpio3",
  203. .start = IRQ_U300_GPIO_PORT3,
  204. .end = IRQ_U300_GPIO_PORT3,
  205. .flags = IORESOURCE_IRQ,
  206. },
  207. {
  208. .name = "gpio4",
  209. .start = IRQ_U300_GPIO_PORT4,
  210. .end = IRQ_U300_GPIO_PORT4,
  211. .flags = IORESOURCE_IRQ,
  212. },
  213. #ifdef CONFIG_MACH_U300_BS335
  214. {
  215. .name = "gpio5",
  216. .start = IRQ_U300_GPIO_PORT5,
  217. .end = IRQ_U300_GPIO_PORT5,
  218. .flags = IORESOURCE_IRQ,
  219. },
  220. {
  221. .name = "gpio6",
  222. .start = IRQ_U300_GPIO_PORT6,
  223. .end = IRQ_U300_GPIO_PORT6,
  224. .flags = IORESOURCE_IRQ,
  225. },
  226. #endif /* CONFIG_MACH_U300_BS335 */
  227. #endif /* U300_COH901571_3 */
  228. };
  229. static struct resource keypad_resources[] = {
  230. {
  231. .start = U300_KEYPAD_BASE,
  232. .end = U300_KEYPAD_BASE + SZ_4K - 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. {
  236. .name = "coh901461-press",
  237. .start = IRQ_U300_KEYPAD_KEYBF,
  238. .end = IRQ_U300_KEYPAD_KEYBF,
  239. .flags = IORESOURCE_IRQ,
  240. },
  241. {
  242. .name = "coh901461-release",
  243. .start = IRQ_U300_KEYPAD_KEYBR,
  244. .end = IRQ_U300_KEYPAD_KEYBR,
  245. .flags = IORESOURCE_IRQ,
  246. },
  247. };
  248. static struct resource rtc_resources[] = {
  249. {
  250. .start = U300_RTC_BASE,
  251. .end = U300_RTC_BASE + SZ_4K - 1,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. {
  255. .start = IRQ_U300_RTC,
  256. .end = IRQ_U300_RTC,
  257. .flags = IORESOURCE_IRQ,
  258. },
  259. };
  260. /*
  261. * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
  262. * but these are not yet used by the driver.
  263. */
  264. static struct resource fsmc_resources[] = {
  265. {
  266. .start = U300_NAND_IF_PHYS_BASE,
  267. .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
  268. .flags = IORESOURCE_MEM,
  269. },
  270. };
  271. static struct resource i2c0_resources[] = {
  272. {
  273. .start = U300_I2C0_BASE,
  274. .end = U300_I2C0_BASE + SZ_4K - 1,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. {
  278. .start = IRQ_U300_I2C0,
  279. .end = IRQ_U300_I2C0,
  280. .flags = IORESOURCE_IRQ,
  281. },
  282. };
  283. static struct resource i2c1_resources[] = {
  284. {
  285. .start = U300_I2C1_BASE,
  286. .end = U300_I2C1_BASE + SZ_4K - 1,
  287. .flags = IORESOURCE_MEM,
  288. },
  289. {
  290. .start = IRQ_U300_I2C1,
  291. .end = IRQ_U300_I2C1,
  292. .flags = IORESOURCE_IRQ,
  293. },
  294. };
  295. static struct resource wdog_resources[] = {
  296. {
  297. .start = U300_WDOG_BASE,
  298. .end = U300_WDOG_BASE + SZ_4K - 1,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. {
  302. .start = IRQ_U300_WDOG,
  303. .end = IRQ_U300_WDOG,
  304. .flags = IORESOURCE_IRQ,
  305. }
  306. };
  307. /* TODO: These should be protected by suitable #ifdef's */
  308. static struct resource ave_resources[] = {
  309. {
  310. .name = "AVE3e I/O Area",
  311. .start = U300_VIDEOENC_BASE,
  312. .end = U300_VIDEOENC_BASE + SZ_512K - 1,
  313. .flags = IORESOURCE_MEM,
  314. },
  315. {
  316. .name = "AVE3e IRQ0",
  317. .start = IRQ_U300_VIDEO_ENC_0,
  318. .end = IRQ_U300_VIDEO_ENC_0,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. {
  322. .name = "AVE3e IRQ1",
  323. .start = IRQ_U300_VIDEO_ENC_1,
  324. .end = IRQ_U300_VIDEO_ENC_1,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. {
  328. .name = "AVE3e Physmem Area",
  329. .start = 0, /* 0 will be remapped to reserved memory */
  330. .end = SZ_1M - 1,
  331. .flags = IORESOURCE_MEM,
  332. },
  333. /*
  334. * The AVE3e requires two regions of 256MB that it considers
  335. * "invisible". The hardware will not be able to access these
  336. * adresses, so they should never point to system RAM.
  337. */
  338. {
  339. .name = "AVE3e Reserved 0",
  340. .start = 0xd0000000,
  341. .end = 0xd0000000 + SZ_256M - 1,
  342. .flags = IORESOURCE_MEM,
  343. },
  344. {
  345. .name = "AVE3e Reserved 1",
  346. .start = 0xe0000000,
  347. .end = 0xe0000000 + SZ_256M - 1,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. };
  351. static struct platform_device wdog_device = {
  352. .name = "wdog",
  353. .id = -1,
  354. .num_resources = ARRAY_SIZE(wdog_resources),
  355. .resource = wdog_resources,
  356. };
  357. static struct platform_device i2c0_device = {
  358. .name = "stu300",
  359. .id = 0,
  360. .num_resources = ARRAY_SIZE(i2c0_resources),
  361. .resource = i2c0_resources,
  362. };
  363. static struct platform_device i2c1_device = {
  364. .name = "stu300",
  365. .id = 1,
  366. .num_resources = ARRAY_SIZE(i2c1_resources),
  367. .resource = i2c1_resources,
  368. };
  369. static struct platform_device gpio_device = {
  370. .name = "u300-gpio",
  371. .id = -1,
  372. .num_resources = ARRAY_SIZE(gpio_resources),
  373. .resource = gpio_resources,
  374. };
  375. static struct platform_device keypad_device = {
  376. .name = "keypad",
  377. .id = -1,
  378. .num_resources = ARRAY_SIZE(keypad_resources),
  379. .resource = keypad_resources,
  380. };
  381. static struct platform_device rtc_device = {
  382. .name = "rtc-coh901331",
  383. .id = -1,
  384. .num_resources = ARRAY_SIZE(rtc_resources),
  385. .resource = rtc_resources,
  386. };
  387. static struct platform_device fsmc_device = {
  388. .name = "nandif",
  389. .id = -1,
  390. .num_resources = ARRAY_SIZE(fsmc_resources),
  391. .resource = fsmc_resources,
  392. };
  393. static struct platform_device ave_device = {
  394. .name = "video_enc",
  395. .id = -1,
  396. .num_resources = ARRAY_SIZE(ave_resources),
  397. .resource = ave_resources,
  398. };
  399. /*
  400. * Notice that AMBA devices are initialized before platform devices.
  401. *
  402. */
  403. static struct platform_device *platform_devs[] __initdata = {
  404. &i2c0_device,
  405. &i2c1_device,
  406. &keypad_device,
  407. &rtc_device,
  408. &gpio_device,
  409. &fsmc_device,
  410. &wdog_device,
  411. &ave_device
  412. };
  413. /*
  414. * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
  415. * together so some interrupts are connected to the first one and some
  416. * to the second one.
  417. */
  418. void __init u300_init_irq(void)
  419. {
  420. u32 mask[2] = {0, 0};
  421. int i;
  422. for (i = 0; i < NR_IRQS; i++)
  423. set_bit(i, (unsigned long *) &mask[0]);
  424. u300_enable_intcon_clock();
  425. vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
  426. vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
  427. }
  428. /*
  429. * U300 platforms peripheral handling
  430. */
  431. struct db_chip {
  432. u16 chipid;
  433. const char *name;
  434. };
  435. /*
  436. * This is a list of the Digital Baseband chips used in the U300 platform.
  437. */
  438. static struct db_chip db_chips[] __initdata = {
  439. {
  440. .chipid = 0xb800,
  441. .name = "DB3000",
  442. },
  443. {
  444. .chipid = 0xc000,
  445. .name = "DB3100",
  446. },
  447. {
  448. .chipid = 0xc800,
  449. .name = "DB3150",
  450. },
  451. {
  452. .chipid = 0xd800,
  453. .name = "DB3200",
  454. },
  455. {
  456. .chipid = 0xe000,
  457. .name = "DB3250",
  458. },
  459. {
  460. .chipid = 0xe800,
  461. .name = "DB3210",
  462. },
  463. {
  464. .chipid = 0xf000,
  465. .name = "DB3350 P1x",
  466. },
  467. {
  468. .chipid = 0xf100,
  469. .name = "DB3350 P2x",
  470. },
  471. {
  472. .chipid = 0x0000, /* List terminator */
  473. .name = NULL,
  474. }
  475. };
  476. static void __init u300_init_check_chip(void)
  477. {
  478. u16 val;
  479. struct db_chip *chip;
  480. const char *chipname;
  481. const char unknown[] = "UNKNOWN";
  482. /* Read out and print chip ID */
  483. val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
  484. /* This is in funky bigendian order... */
  485. val = (val & 0xFFU) << 8 | (val >> 8);
  486. chip = db_chips;
  487. chipname = unknown;
  488. for ( ; chip->chipid; chip++) {
  489. if (chip->chipid == (val & 0xFF00U)) {
  490. chipname = chip->name;
  491. break;
  492. }
  493. }
  494. printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
  495. "(chip ID 0x%04x)\n", chipname, val);
  496. #ifdef CONFIG_MACH_U300_BS26
  497. if ((val & 0xFF00U) != 0xc800) {
  498. printk(KERN_ERR "Platform configured for BS25/BS26 " \
  499. "with DB3150 but %s detected, expect problems!",
  500. chipname);
  501. }
  502. #endif
  503. #ifdef CONFIG_MACH_U300_BS330
  504. if ((val & 0xFF00U) != 0xd800) {
  505. printk(KERN_ERR "Platform configured for BS330 " \
  506. "with DB3200 but %s detected, expect problems!",
  507. chipname);
  508. }
  509. #endif
  510. #ifdef CONFIG_MACH_U300_BS335
  511. if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
  512. printk(KERN_ERR "Platform configured for BS365 " \
  513. " with DB3350 but %s detected, expect problems!",
  514. chipname);
  515. }
  516. #endif
  517. #ifdef CONFIG_MACH_U300_BS365
  518. if ((val & 0xFF00U) != 0xe800) {
  519. printk(KERN_ERR "Platform configured for BS365 " \
  520. "with DB3210 but %s detected, expect problems!",
  521. chipname);
  522. }
  523. #endif
  524. }
  525. /*
  526. * Some devices and their resources require reserved physical memory from
  527. * the end of the available RAM. This function traverses the list of devices
  528. * and assigns actual adresses to these.
  529. */
  530. static void __init u300_assign_physmem(void)
  531. {
  532. unsigned long curr_start = __pa(high_memory);
  533. int i, j;
  534. for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
  535. for (j = 0; j < platform_devs[i]->num_resources; j++) {
  536. struct resource *const res =
  537. &platform_devs[i]->resource[j];
  538. if (IORESOURCE_MEM == res->flags &&
  539. 0 == res->start) {
  540. res->start = curr_start;
  541. res->end += curr_start;
  542. curr_start += (res->end - res->start + 1);
  543. printk(KERN_INFO "core.c: Mapping RAM " \
  544. "%#x-%#x to device %s:%s\n",
  545. res->start, res->end,
  546. platform_devs[i]->name, res->name);
  547. }
  548. }
  549. }
  550. }
  551. void __init u300_init_devices(void)
  552. {
  553. int i;
  554. u16 val;
  555. /* Check what platform we run and print some status information */
  556. u300_init_check_chip();
  557. /* Set system to run at PLL208, max performance, a known state. */
  558. val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
  559. val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
  560. writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
  561. /* Wait for the PLL208 to lock if not locked in yet */
  562. while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
  563. U300_SYSCON_CSR_PLL208_LOCK_IND));
  564. /* Initialize SPI device with some board specifics */
  565. u300_spi_init(&pl022_device);
  566. /* Register the AMBA devices in the AMBA bus abstraction layer */
  567. u300_clock_primecells();
  568. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  569. struct amba_device *d = amba_devs[i];
  570. amba_device_register(d, &iomem_resource);
  571. }
  572. u300_unclock_primecells();
  573. u300_assign_physmem();
  574. /* Register subdevices on the I2C buses */
  575. u300_i2c_register_board_devices();
  576. /* Register subdevices on the SPI bus */
  577. u300_spi_register_board_devices();
  578. /* Register the platform devices */
  579. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  580. #ifndef CONFIG_MACH_U300_SEMI_IS_SHARED
  581. /*
  582. * Enable SEMI self refresh. Self-refresh of the SDRAM is entered when
  583. * both subsystems are requesting this mode.
  584. * If we not share the Acc SDRAM, this is never the case. Therefore
  585. * enable it here from the App side.
  586. */
  587. val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
  588. U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
  589. writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
  590. #endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */
  591. }
  592. static int core_module_init(void)
  593. {
  594. /*
  595. * This needs to be initialized later: it needs the input framework
  596. * to be initialized first.
  597. */
  598. return mmc_init(&mmcsd_device);
  599. }
  600. module_init(core_module_init);