dma.c 5.5 KB

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  1. /* linux/arch/arm/mach-s3c2412/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2412 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/sysdev.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/io.h>
  19. #include <mach/dma.h>
  20. #include <plat/dma-plat.h>
  21. #include <plat/cpu.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <plat/regs-dma.h>
  26. #include <mach/regs-mem.h>
  27. #include <mach/regs-lcd.h>
  28. #include <mach/regs-sdi.h>
  29. #include <plat/regs-s3c2412-iis.h>
  30. #include <plat/regs-iis.h>
  31. #include <plat/regs-spi.h>
  32. #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
  33. static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
  34. [DMACH_XD0] = {
  35. .name = "xdreq0",
  36. .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
  37. .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
  38. },
  39. [DMACH_XD1] = {
  40. .name = "xdreq1",
  41. .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
  42. .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
  43. },
  44. [DMACH_SDI] = {
  45. .name = "sdi",
  46. .channels = MAP(S3C2412_DMAREQSEL_SDI),
  47. .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
  48. .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
  49. .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
  50. },
  51. [DMACH_SPI0] = {
  52. .name = "spi0",
  53. .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
  54. .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
  55. .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
  56. .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
  57. },
  58. [DMACH_SPI1] = {
  59. .name = "spi1",
  60. .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
  61. .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
  62. .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
  63. .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
  64. },
  65. [DMACH_UART0] = {
  66. .name = "uart0",
  67. .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
  68. .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
  69. .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
  70. .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
  71. },
  72. [DMACH_UART1] = {
  73. .name = "uart1",
  74. .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
  75. .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
  76. .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
  77. .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
  78. },
  79. [DMACH_UART2] = {
  80. .name = "uart2",
  81. .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
  82. .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
  83. .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
  84. .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
  85. },
  86. [DMACH_UART0_SRC2] = {
  87. .name = "uart0",
  88. .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
  89. .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
  90. .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
  91. .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
  92. },
  93. [DMACH_UART1_SRC2] = {
  94. .name = "uart1",
  95. .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
  96. .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
  97. .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
  98. .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
  99. },
  100. [DMACH_UART2_SRC2] = {
  101. .name = "uart2",
  102. .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
  103. .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
  104. .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
  105. .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
  106. },
  107. [DMACH_TIMER] = {
  108. .name = "timer",
  109. .channels = MAP(S3C2412_DMAREQSEL_TIMER),
  110. .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
  111. },
  112. [DMACH_I2S_IN] = {
  113. .name = "i2s-sdi",
  114. .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
  115. .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
  116. .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
  117. },
  118. [DMACH_I2S_OUT] = {
  119. .name = "i2s-sdo",
  120. .channels = MAP(S3C2412_DMAREQSEL_I2STX),
  121. .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
  122. .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
  123. },
  124. [DMACH_USB_EP1] = {
  125. .name = "usb-ep1",
  126. .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
  127. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
  128. },
  129. [DMACH_USB_EP2] = {
  130. .name = "usb-ep2",
  131. .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
  132. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
  133. },
  134. [DMACH_USB_EP3] = {
  135. .name = "usb-ep3",
  136. .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
  137. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
  138. },
  139. [DMACH_USB_EP4] = {
  140. .name = "usb-ep4",
  141. .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
  142. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
  143. },
  144. };
  145. static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
  146. struct s3c24xx_dma_map *map,
  147. enum s3c2410_dmasrc dir)
  148. {
  149. unsigned long chsel;
  150. if (dir == S3C2410_DMASRC_HW)
  151. chsel = map->channels_rx[0];
  152. else
  153. chsel = map->channels[0];
  154. chsel &= ~DMA_CH_VALID;
  155. chsel |= S3C2412_DMAREQSEL_HW;
  156. writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
  157. }
  158. static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
  159. struct s3c24xx_dma_map *map)
  160. {
  161. s3c2412_dma_direction(chan, map, chan->source);
  162. }
  163. static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
  164. .select = s3c2412_dma_select,
  165. .direction = s3c2412_dma_direction,
  166. .dcon_mask = 0,
  167. .map = s3c2412_dma_mappings,
  168. .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
  169. };
  170. static int __init s3c2412_dma_add(struct sys_device *sysdev)
  171. {
  172. s3c2410_dma_init();
  173. return s3c24xx_dma_init_map(&s3c2412_dma_sel);
  174. }
  175. static struct sysdev_driver s3c2412_dma_driver = {
  176. .add = s3c2412_dma_add,
  177. };
  178. static int __init s3c2412_dma_init(void)
  179. {
  180. return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
  181. }
  182. arch_initcall(s3c2412_dma_init);