pm.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162
  1. /* linux/arch/arm/mach-s3c2410/pm.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/init.h>
  23. #include <linux/suspend.h>
  24. #include <linux/errno.h>
  25. #include <linux/time.h>
  26. #include <linux/sysdev.h>
  27. #include <linux/gpio.h>
  28. #include <linux/io.h>
  29. #include <mach/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <mach/regs-gpio.h>
  32. #include <mach/h1940.h>
  33. #include <plat/cpu.h>
  34. #include <plat/pm.h>
  35. static void s3c2410_pm_prepare(void)
  36. {
  37. /* ensure at least GSTATUS3 has the resume address */
  38. __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);
  39. S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
  40. S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
  41. if (machine_is_h1940()) {
  42. void *base = phys_to_virt(H1940_SUSPEND_CHECK);
  43. unsigned long ptr;
  44. unsigned long calc = 0;
  45. /* generate check for the bootloader to check on resume */
  46. for (ptr = 0; ptr < 0x40000; ptr += 0x400)
  47. calc += __raw_readl(base+ptr);
  48. __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
  49. }
  50. /* the RX3715 uses similar code and the same H1940 and the
  51. * same offsets for resume and checksum pointers */
  52. if (machine_is_rx3715()) {
  53. void *base = phys_to_virt(H1940_SUSPEND_CHECK);
  54. unsigned long ptr;
  55. unsigned long calc = 0;
  56. /* generate check for the bootloader to check on resume */
  57. for (ptr = 0; ptr < 0x40000; ptr += 0x4)
  58. calc += __raw_readl(base+ptr);
  59. __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
  60. }
  61. if ( machine_is_aml_m5900() )
  62. s3c2410_gpio_setpin(S3C2410_GPF(2), 1);
  63. }
  64. static int s3c2410_pm_resume(struct sys_device *dev)
  65. {
  66. unsigned long tmp;
  67. /* unset the return-from-sleep flag, to ensure reset */
  68. tmp = __raw_readl(S3C2410_GSTATUS2);
  69. tmp &= S3C2410_GSTATUS2_OFFRESET;
  70. __raw_writel(tmp, S3C2410_GSTATUS2);
  71. if ( machine_is_aml_m5900() )
  72. s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
  73. return 0;
  74. }
  75. static int s3c2410_pm_add(struct sys_device *dev)
  76. {
  77. pm_cpu_prep = s3c2410_pm_prepare;
  78. pm_cpu_sleep = s3c2410_cpu_suspend;
  79. return 0;
  80. }
  81. #if defined(CONFIG_CPU_S3C2410)
  82. static struct sysdev_driver s3c2410_pm_driver = {
  83. .add = s3c2410_pm_add,
  84. .resume = s3c2410_pm_resume,
  85. };
  86. /* register ourselves */
  87. static int __init s3c2410_pm_drvinit(void)
  88. {
  89. return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
  90. }
  91. arch_initcall(s3c2410_pm_drvinit);
  92. static struct sysdev_driver s3c2410a_pm_driver = {
  93. .add = s3c2410_pm_add,
  94. .resume = s3c2410_pm_resume,
  95. };
  96. static int __init s3c2410a_pm_drvinit(void)
  97. {
  98. return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_pm_driver);
  99. }
  100. arch_initcall(s3c2410a_pm_drvinit);
  101. #endif
  102. #if defined(CONFIG_CPU_S3C2440)
  103. static struct sysdev_driver s3c2440_pm_driver = {
  104. .add = s3c2410_pm_add,
  105. .resume = s3c2410_pm_resume,
  106. };
  107. static int __init s3c2440_pm_drvinit(void)
  108. {
  109. return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
  110. }
  111. arch_initcall(s3c2440_pm_drvinit);
  112. #endif
  113. #if defined(CONFIG_CPU_S3C2442)
  114. static struct sysdev_driver s3c2442_pm_driver = {
  115. .add = s3c2410_pm_add,
  116. .resume = s3c2410_pm_resume,
  117. };
  118. static int __init s3c2442_pm_drvinit(void)
  119. {
  120. return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
  121. }
  122. arch_initcall(s3c2442_pm_drvinit);
  123. #endif