mach-vr1000.c 9.4 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2005,2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/dm9000.h>
  22. #include <linux/i2c.h>
  23. #include <linux/serial.h>
  24. #include <linux/tty.h>
  25. #include <linux/serial_8250.h>
  26. #include <linux/serial_reg.h>
  27. #include <linux/io.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <mach/bast-map.h>
  32. #include <mach/vr1000-map.h>
  33. #include <mach/vr1000-irq.h>
  34. #include <mach/vr1000-cpld.h>
  35. #include <mach/hardware.h>
  36. #include <asm/irq.h>
  37. #include <asm/mach-types.h>
  38. #include <plat/regs-serial.h>
  39. #include <mach/regs-gpio.h>
  40. #include <mach/leds-gpio.h>
  41. #include <plat/clock.h>
  42. #include <plat/devs.h>
  43. #include <plat/cpu.h>
  44. #include <plat/iic.h>
  45. #include "usb-simtec.h"
  46. #include "nor-simtec.h"
  47. /* macros for virtual address mods for the io space entries */
  48. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  49. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  50. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  51. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  52. /* macros to modify the physical addresses for io space */
  53. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  54. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  55. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  56. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  57. static struct map_desc vr1000_iodesc[] __initdata = {
  58. /* ISA IO areas */
  59. {
  60. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  61. .pfn = PA_CS2(BAST_PA_ISAIO),
  62. .length = SZ_16M,
  63. .type = MT_DEVICE,
  64. }, {
  65. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  66. .pfn = PA_CS3(BAST_PA_ISAIO),
  67. .length = SZ_16M,
  68. .type = MT_DEVICE,
  69. },
  70. /* CPLD control registers, and external interrupt controls */
  71. {
  72. .virtual = (u32)VR1000_VA_CTRL1,
  73. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  74. .length = SZ_1M,
  75. .type = MT_DEVICE,
  76. }, {
  77. .virtual = (u32)VR1000_VA_CTRL2,
  78. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  79. .length = SZ_1M,
  80. .type = MT_DEVICE,
  81. }, {
  82. .virtual = (u32)VR1000_VA_CTRL3,
  83. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  84. .length = SZ_1M,
  85. .type = MT_DEVICE,
  86. }, {
  87. .virtual = (u32)VR1000_VA_CTRL4,
  88. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  89. .length = SZ_1M,
  90. .type = MT_DEVICE,
  91. },
  92. };
  93. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  94. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  95. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  96. /* uart clock source(s) */
  97. static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
  98. [0] = {
  99. .name = "uclk",
  100. .divisor = 1,
  101. .min_baud = 0,
  102. .max_baud = 0,
  103. },
  104. [1] = {
  105. .name = "pclk",
  106. .divisor = 1,
  107. .min_baud = 0,
  108. .max_baud = 0.
  109. }
  110. };
  111. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  112. [0] = {
  113. .hwport = 0,
  114. .flags = 0,
  115. .ucon = UCON,
  116. .ulcon = ULCON,
  117. .ufcon = UFCON,
  118. .clocks = vr1000_serial_clocks,
  119. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  120. },
  121. [1] = {
  122. .hwport = 1,
  123. .flags = 0,
  124. .ucon = UCON,
  125. .ulcon = ULCON,
  126. .ufcon = UFCON,
  127. .clocks = vr1000_serial_clocks,
  128. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  129. },
  130. /* port 2 is not actually used */
  131. [2] = {
  132. .hwport = 2,
  133. .flags = 0,
  134. .ucon = UCON,
  135. .ulcon = ULCON,
  136. .ufcon = UFCON,
  137. .clocks = vr1000_serial_clocks,
  138. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  139. }
  140. };
  141. /* definitions for the vr1000 extra 16550 serial ports */
  142. #define VR1000_BAUDBASE (3692307)
  143. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  144. static struct plat_serial8250_port serial_platform_data[] = {
  145. [0] = {
  146. .mapbase = VR1000_SERIAL_MAPBASE(0),
  147. .irq = IRQ_VR1000_SERIAL + 0,
  148. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  149. .iotype = UPIO_MEM,
  150. .regshift = 0,
  151. .uartclk = VR1000_BAUDBASE,
  152. },
  153. [1] = {
  154. .mapbase = VR1000_SERIAL_MAPBASE(1),
  155. .irq = IRQ_VR1000_SERIAL + 1,
  156. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  157. .iotype = UPIO_MEM,
  158. .regshift = 0,
  159. .uartclk = VR1000_BAUDBASE,
  160. },
  161. [2] = {
  162. .mapbase = VR1000_SERIAL_MAPBASE(2),
  163. .irq = IRQ_VR1000_SERIAL + 2,
  164. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  165. .iotype = UPIO_MEM,
  166. .regshift = 0,
  167. .uartclk = VR1000_BAUDBASE,
  168. },
  169. [3] = {
  170. .mapbase = VR1000_SERIAL_MAPBASE(3),
  171. .irq = IRQ_VR1000_SERIAL + 3,
  172. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  173. .iotype = UPIO_MEM,
  174. .regshift = 0,
  175. .uartclk = VR1000_BAUDBASE,
  176. },
  177. { },
  178. };
  179. static struct platform_device serial_device = {
  180. .name = "serial8250",
  181. .id = PLAT8250_DEV_PLATFORM,
  182. .dev = {
  183. .platform_data = serial_platform_data,
  184. },
  185. };
  186. /* DM9000 ethernet devices */
  187. static struct resource vr1000_dm9k0_resource[] = {
  188. [0] = {
  189. .start = S3C2410_CS5 + VR1000_PA_DM9000,
  190. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
  191. .flags = IORESOURCE_MEM
  192. },
  193. [1] = {
  194. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
  195. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
  196. .flags = IORESOURCE_MEM
  197. },
  198. [2] = {
  199. .start = IRQ_VR1000_DM9000A,
  200. .end = IRQ_VR1000_DM9000A,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  202. }
  203. };
  204. static struct resource vr1000_dm9k1_resource[] = {
  205. [0] = {
  206. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
  207. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
  208. .flags = IORESOURCE_MEM
  209. },
  210. [1] = {
  211. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
  212. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
  213. .flags = IORESOURCE_MEM
  214. },
  215. [2] = {
  216. .start = IRQ_VR1000_DM9000N,
  217. .end = IRQ_VR1000_DM9000N,
  218. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  219. }
  220. };
  221. /* for the moment we limit ourselves to 16bit IO until some
  222. * better IO routines can be written and tested
  223. */
  224. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  225. .flags = DM9000_PLATF_16BITONLY,
  226. };
  227. static struct platform_device vr1000_dm9k0 = {
  228. .name = "dm9000",
  229. .id = 0,
  230. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  231. .resource = vr1000_dm9k0_resource,
  232. .dev = {
  233. .platform_data = &vr1000_dm9k_platdata,
  234. }
  235. };
  236. static struct platform_device vr1000_dm9k1 = {
  237. .name = "dm9000",
  238. .id = 1,
  239. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  240. .resource = vr1000_dm9k1_resource,
  241. .dev = {
  242. .platform_data = &vr1000_dm9k_platdata,
  243. }
  244. };
  245. /* LEDS */
  246. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  247. .name = "led1",
  248. .gpio = S3C2410_GPB(0),
  249. .def_trigger = "",
  250. };
  251. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  252. .name = "led2",
  253. .gpio = S3C2410_GPB(1),
  254. .def_trigger = "",
  255. };
  256. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  257. .name = "led3",
  258. .gpio = S3C2410_GPB(2),
  259. .def_trigger = "",
  260. };
  261. static struct platform_device vr1000_led1 = {
  262. .name = "s3c24xx_led",
  263. .id = 1,
  264. .dev = {
  265. .platform_data = &vr1000_led1_pdata,
  266. },
  267. };
  268. static struct platform_device vr1000_led2 = {
  269. .name = "s3c24xx_led",
  270. .id = 2,
  271. .dev = {
  272. .platform_data = &vr1000_led2_pdata,
  273. },
  274. };
  275. static struct platform_device vr1000_led3 = {
  276. .name = "s3c24xx_led",
  277. .id = 3,
  278. .dev = {
  279. .platform_data = &vr1000_led3_pdata,
  280. },
  281. };
  282. /* I2C devices. */
  283. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  284. {
  285. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  286. }, {
  287. I2C_BOARD_INFO("tmp101", 0x48),
  288. }, {
  289. I2C_BOARD_INFO("m41st87", 0x68),
  290. },
  291. };
  292. /* devices for this board */
  293. static struct platform_device *vr1000_devices[] __initdata = {
  294. &s3c_device_usb,
  295. &s3c_device_lcd,
  296. &s3c_device_wdt,
  297. &s3c_device_i2c0,
  298. &s3c_device_adc,
  299. &serial_device,
  300. &vr1000_dm9k0,
  301. &vr1000_dm9k1,
  302. &vr1000_led1,
  303. &vr1000_led2,
  304. &vr1000_led3,
  305. };
  306. static struct clk *vr1000_clocks[] __initdata = {
  307. &s3c24xx_dclk0,
  308. &s3c24xx_dclk1,
  309. &s3c24xx_clkout0,
  310. &s3c24xx_clkout1,
  311. &s3c24xx_uclk,
  312. };
  313. static void vr1000_power_off(void)
  314. {
  315. s3c2410_gpio_cfgpin(S3C2410_GPB(9), S3C2410_GPIO_OUTPUT);
  316. s3c2410_gpio_setpin(S3C2410_GPB(9), 1);
  317. }
  318. static void __init vr1000_map_io(void)
  319. {
  320. /* initialise clock sources */
  321. s3c24xx_dclk0.parent = &clk_upll;
  322. s3c24xx_dclk0.rate = 12*1000*1000;
  323. s3c24xx_dclk1.parent = NULL;
  324. s3c24xx_dclk1.rate = 3692307;
  325. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  326. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  327. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  328. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  329. pm_power_off = vr1000_power_off;
  330. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  331. s3c24xx_init_clocks(0);
  332. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  333. }
  334. static void __init vr1000_init(void)
  335. {
  336. s3c_i2c0_set_platdata(NULL);
  337. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  338. i2c_register_board_info(0, vr1000_i2c_devs,
  339. ARRAY_SIZE(vr1000_i2c_devs));
  340. nor_simtec_init();
  341. }
  342. MACHINE_START(VR1000, "Thorcom-VR1000")
  343. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  344. .phys_io = S3C2410_PA_UART,
  345. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  346. .boot_params = S3C2410_SDRAM_PA + 0x100,
  347. .map_io = vr1000_map_io,
  348. .init_machine = vr1000_init,
  349. .init_irq = s3c24xx_init_irq,
  350. .timer = &s3c24xx_timer,
  351. MACHINE_END