realview_pb1176.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_pb1176.c
  3. *
  4. * Copyright (C) 2008 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/io.h>
  28. #include <mach/hardware.h>
  29. #include <asm/irq.h>
  30. #include <asm/leds.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/hardware/gic.h>
  33. #include <asm/hardware/icst307.h>
  34. #include <asm/hardware/cache-l2x0.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/flash.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/time.h>
  39. #include <mach/board-pb1176.h>
  40. #include <mach/irqs.h>
  41. #include "core.h"
  42. #include "clock.h"
  43. static struct map_desc realview_pb1176_io_desc[] __initdata = {
  44. {
  45. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  46. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  47. .length = SZ_4K,
  48. .type = MT_DEVICE,
  49. }, {
  50. .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
  51. .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
  52. .length = SZ_4K,
  53. .type = MT_DEVICE,
  54. }, {
  55. .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
  56. .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
  57. .length = SZ_4K,
  58. .type = MT_DEVICE,
  59. }, {
  60. .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
  61. .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
  62. .length = SZ_4K,
  63. .type = MT_DEVICE,
  64. }, {
  65. .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
  66. .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
  67. .length = SZ_4K,
  68. .type = MT_DEVICE,
  69. }, {
  70. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  71. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  72. .length = SZ_4K,
  73. .type = MT_DEVICE,
  74. }, {
  75. .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
  76. .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
  77. .length = SZ_4K,
  78. .type = MT_DEVICE,
  79. }, {
  80. .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
  81. .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
  82. .length = SZ_4K,
  83. .type = MT_DEVICE,
  84. }, {
  85. .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
  86. .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
  87. .length = SZ_8K,
  88. .type = MT_DEVICE,
  89. },
  90. #ifdef CONFIG_DEBUG_LL
  91. {
  92. .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
  93. .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
  94. .length = SZ_4K,
  95. .type = MT_DEVICE,
  96. },
  97. #endif
  98. };
  99. static void __init realview_pb1176_map_io(void)
  100. {
  101. iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
  102. }
  103. static struct pl061_platform_data gpio0_plat_data = {
  104. .gpio_base = 0,
  105. .irq_base = -1,
  106. };
  107. static struct pl061_platform_data gpio1_plat_data = {
  108. .gpio_base = 8,
  109. .irq_base = -1,
  110. };
  111. static struct pl061_platform_data gpio2_plat_data = {
  112. .gpio_base = 16,
  113. .irq_base = -1,
  114. };
  115. /*
  116. * RealView PB1176 AMBA devices
  117. */
  118. #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
  119. #define GPIO2_DMA { 0, 0 }
  120. #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
  121. #define GPIO3_DMA { 0, 0 }
  122. #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
  123. #define AACI_DMA { 0x80, 0x81 }
  124. #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
  125. #define MMCI0_DMA { 0x84, 0 }
  126. #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
  127. #define KMI0_DMA { 0, 0 }
  128. #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
  129. #define KMI1_DMA { 0, 0 }
  130. #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
  131. #define PB1176_SMC_DMA { 0, 0 }
  132. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  133. #define MPMC_DMA { 0, 0 }
  134. #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
  135. #define PB1176_CLCD_DMA { 0, 0 }
  136. #define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
  137. #define DMAC_DMA { 0, 0 }
  138. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  139. #define SCTL_DMA { 0, 0 }
  140. #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
  141. #define PB1176_WATCHDOG_DMA { 0, 0 }
  142. #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
  143. #define PB1176_GPIO0_DMA { 0, 0 }
  144. #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
  145. #define GPIO1_DMA { 0, 0 }
  146. #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
  147. #define PB1176_RTC_DMA { 0, 0 }
  148. #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
  149. #define SCI_DMA { 7, 6 }
  150. #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
  151. #define PB1176_UART0_DMA { 15, 14 }
  152. #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
  153. #define PB1176_UART1_DMA { 13, 12 }
  154. #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
  155. #define PB1176_UART2_DMA { 11, 10 }
  156. #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
  157. #define PB1176_UART3_DMA { 0x86, 0x87 }
  158. #define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
  159. #define PB1176_SSP_DMA { 9, 8 }
  160. /* FPGA Primecells */
  161. AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  162. AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  163. AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  164. AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  165. AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
  166. /* DevChip Primecells */
  167. AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
  168. AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  169. AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
  170. AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
  171. AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  172. AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  173. AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
  174. AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
  175. AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
  176. AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
  177. AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
  178. AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
  179. /* Primecells on the NEC ISSP chip */
  180. AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
  181. //AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
  182. static struct amba_device *amba_devs[] __initdata = {
  183. // &dmac_device,
  184. &uart0_device,
  185. &uart1_device,
  186. &uart2_device,
  187. &uart3_device,
  188. &smc_device,
  189. &clcd_device,
  190. &sctl_device,
  191. &wdog_device,
  192. &gpio0_device,
  193. &gpio1_device,
  194. &gpio2_device,
  195. &rtc_device,
  196. &sci0_device,
  197. &ssp0_device,
  198. &aaci_device,
  199. &mmc0_device,
  200. &kmi0_device,
  201. &kmi1_device,
  202. };
  203. /*
  204. * RealView PB1176 platform devices
  205. */
  206. static struct resource realview_pb1176_flash_resources[] = {
  207. [0] = {
  208. .start = REALVIEW_PB1176_FLASH_BASE,
  209. .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
  210. .flags = IORESOURCE_MEM,
  211. },
  212. [1] = {
  213. .start = REALVIEW_PB1176_SEC_FLASH_BASE,
  214. .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. };
  218. #ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
  219. #define PB1176_FLASH_BLOCKS 2
  220. #else
  221. #define PB1176_FLASH_BLOCKS 1
  222. #endif
  223. static struct resource realview_pb1176_smsc911x_resources[] = {
  224. [0] = {
  225. .start = REALVIEW_PB1176_ETH_BASE,
  226. .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
  227. .flags = IORESOURCE_MEM,
  228. },
  229. [1] = {
  230. .start = IRQ_PB1176_ETH,
  231. .end = IRQ_PB1176_ETH,
  232. .flags = IORESOURCE_IRQ,
  233. },
  234. };
  235. static struct resource realview_pb1176_isp1761_resources[] = {
  236. [0] = {
  237. .start = REALVIEW_PB1176_USB_BASE,
  238. .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [1] = {
  242. .start = IRQ_PB1176_USB,
  243. .end = IRQ_PB1176_USB,
  244. .flags = IORESOURCE_IRQ,
  245. },
  246. };
  247. static void __init gic_init_irq(void)
  248. {
  249. /* ARM1176 DevChip GIC, primary */
  250. gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
  251. gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
  252. gic_cpu_init(0, gic_cpu_base_addr);
  253. /* board GIC, secondary */
  254. gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
  255. gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
  256. gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
  257. }
  258. static void __init realview_pb1176_timer_init(void)
  259. {
  260. timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
  261. timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
  262. timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
  263. timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
  264. realview_timer_init(IRQ_DC1176_TIMER0);
  265. }
  266. static struct sys_timer realview_pb1176_timer = {
  267. .init = realview_pb1176_timer_init,
  268. };
  269. static void realview_pb1176_reset(char mode)
  270. {
  271. void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
  272. REALVIEW_SYS_RESETCTL_OFFSET;
  273. void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
  274. REALVIEW_SYS_LOCK_OFFSET;
  275. __raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl);
  276. __raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
  277. }
  278. static void realview_pb1176_fixup(struct machine_desc *mdesc,
  279. struct tag *tags, char **from,
  280. struct meminfo *meminfo)
  281. {
  282. /*
  283. * RealView PB1176 only has 128MB of RAM mapped at 0.
  284. */
  285. meminfo->bank[0].start = 0;
  286. meminfo->bank[0].size = SZ_128M;
  287. meminfo->nr_banks = 1;
  288. }
  289. static void __init realview_pb1176_init(void)
  290. {
  291. int i;
  292. #ifdef CONFIG_CACHE_L2X0
  293. /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
  294. l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
  295. #endif
  296. realview_flash_register(realview_pb1176_flash_resources,
  297. PB1176_FLASH_BLOCKS);
  298. realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
  299. platform_device_register(&realview_i2c_device);
  300. realview_usb_register(realview_pb1176_isp1761_resources);
  301. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  302. struct amba_device *d = amba_devs[i];
  303. amba_device_register(d, &iomem_resource);
  304. }
  305. #ifdef CONFIG_LEDS
  306. leds_event = realview_leds_event;
  307. #endif
  308. realview_reset = realview_pb1176_reset;
  309. }
  310. MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
  311. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  312. .phys_io = REALVIEW_PB1176_UART0_BASE,
  313. .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
  314. .boot_params = PHYS_OFFSET + 0x00000100,
  315. .fixup = realview_pb1176_fixup,
  316. .map_io = realview_pb1176_map_io,
  317. .init_irq = gic_init_irq,
  318. .timer = &realview_pb1176_timer,
  319. .init_machine = realview_pb1176_init,
  320. MACHINE_END