realview_eb.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_eb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/io.h>
  28. #include <mach/hardware.h>
  29. #include <asm/irq.h>
  30. #include <asm/leds.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/hardware/gic.h>
  33. #include <asm/hardware/icst307.h>
  34. #include <asm/hardware/cache-l2x0.h>
  35. #include <asm/localtimer.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/time.h>
  39. #include <mach/board-eb.h>
  40. #include <mach/irqs.h>
  41. #include "core.h"
  42. #include "clock.h"
  43. static struct map_desc realview_eb_io_desc[] __initdata = {
  44. {
  45. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  46. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  47. .length = SZ_4K,
  48. .type = MT_DEVICE,
  49. }, {
  50. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  51. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  52. .length = SZ_4K,
  53. .type = MT_DEVICE,
  54. }, {
  55. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  56. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  57. .length = SZ_4K,
  58. .type = MT_DEVICE,
  59. }, {
  60. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  61. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  62. .length = SZ_4K,
  63. .type = MT_DEVICE,
  64. }, {
  65. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  66. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  67. .length = SZ_4K,
  68. .type = MT_DEVICE,
  69. }, {
  70. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  71. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  72. .length = SZ_4K,
  73. .type = MT_DEVICE,
  74. },
  75. #ifdef CONFIG_DEBUG_LL
  76. {
  77. .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  78. .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  79. .length = SZ_4K,
  80. .type = MT_DEVICE,
  81. }
  82. #endif
  83. };
  84. static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  85. {
  86. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
  87. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
  88. .length = SZ_4K,
  89. .type = MT_DEVICE,
  90. }, {
  91. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
  92. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
  93. .length = SZ_4K,
  94. .type = MT_DEVICE,
  95. }, {
  96. .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
  97. .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
  98. .length = SZ_8K,
  99. .type = MT_DEVICE,
  100. }
  101. };
  102. static void __init realview_eb_map_io(void)
  103. {
  104. iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
  105. if (core_tile_eb11mp() || core_tile_a9mp())
  106. iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
  107. }
  108. static struct pl061_platform_data gpio0_plat_data = {
  109. .gpio_base = 0,
  110. .irq_base = -1,
  111. };
  112. static struct pl061_platform_data gpio1_plat_data = {
  113. .gpio_base = 8,
  114. .irq_base = -1,
  115. };
  116. static struct pl061_platform_data gpio2_plat_data = {
  117. .gpio_base = 16,
  118. .irq_base = -1,
  119. };
  120. /*
  121. * RealView EB AMBA devices
  122. */
  123. /*
  124. * These devices are connected via the core APB bridge
  125. */
  126. #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
  127. #define GPIO2_DMA { 0, 0 }
  128. #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
  129. #define GPIO3_DMA { 0, 0 }
  130. #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
  131. #define AACI_DMA { 0x80, 0x81 }
  132. #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
  133. #define MMCI0_DMA { 0x84, 0 }
  134. #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
  135. #define KMI0_DMA { 0, 0 }
  136. #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
  137. #define KMI1_DMA { 0, 0 }
  138. /*
  139. * These devices are connected directly to the multi-layer AHB switch
  140. */
  141. #define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
  142. #define EB_SMC_DMA { 0, 0 }
  143. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  144. #define MPMC_DMA { 0, 0 }
  145. #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
  146. #define EB_CLCD_DMA { 0, 0 }
  147. #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
  148. #define DMAC_DMA { 0, 0 }
  149. /*
  150. * These devices are connected via the core APB bridge
  151. */
  152. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  153. #define SCTL_DMA { 0, 0 }
  154. #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
  155. #define EB_WATCHDOG_DMA { 0, 0 }
  156. #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
  157. #define EB_GPIO0_DMA { 0, 0 }
  158. #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
  159. #define GPIO1_DMA { 0, 0 }
  160. #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
  161. #define EB_RTC_DMA { 0, 0 }
  162. /*
  163. * These devices are connected via the DMA APB bridge
  164. */
  165. #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
  166. #define SCI_DMA { 7, 6 }
  167. #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
  168. #define EB_UART0_DMA { 15, 14 }
  169. #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
  170. #define EB_UART1_DMA { 13, 12 }
  171. #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
  172. #define EB_UART2_DMA { 11, 10 }
  173. #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
  174. #define EB_UART3_DMA { 0x86, 0x87 }
  175. #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
  176. #define EB_SSP_DMA { 9, 8 }
  177. /* FPGA Primecells */
  178. AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  179. AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  180. AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  181. AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  182. AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
  183. /* DevChip Primecells */
  184. AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
  185. AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
  186. AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
  187. AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  188. AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
  189. AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
  190. AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  191. AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  192. AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
  193. AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
  194. AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
  195. AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
  196. AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
  197. AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, NULL);
  198. static struct amba_device *amba_devs[] __initdata = {
  199. &dmac_device,
  200. &uart0_device,
  201. &uart1_device,
  202. &uart2_device,
  203. &uart3_device,
  204. &smc_device,
  205. &clcd_device,
  206. &sctl_device,
  207. &wdog_device,
  208. &gpio0_device,
  209. &gpio1_device,
  210. &gpio2_device,
  211. &rtc_device,
  212. &sci0_device,
  213. &ssp0_device,
  214. &aaci_device,
  215. &mmc0_device,
  216. &kmi0_device,
  217. &kmi1_device,
  218. };
  219. /*
  220. * RealView EB platform devices
  221. */
  222. static struct resource realview_eb_flash_resource = {
  223. .start = REALVIEW_EB_FLASH_BASE,
  224. .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
  225. .flags = IORESOURCE_MEM,
  226. };
  227. static struct resource realview_eb_eth_resources[] = {
  228. [0] = {
  229. .start = REALVIEW_EB_ETH_BASE,
  230. .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. [1] = {
  234. .start = IRQ_EB_ETH,
  235. .end = IRQ_EB_ETH,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. };
  239. /*
  240. * Detect and register the correct Ethernet device. RealView/EB rev D
  241. * platforms use the newer SMSC LAN9118 Ethernet chip
  242. */
  243. static int eth_device_register(void)
  244. {
  245. void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
  246. const char *name = NULL;
  247. u32 idrev;
  248. if (!eth_addr)
  249. return -ENOMEM;
  250. idrev = readl(eth_addr + 0x50);
  251. if ((idrev & 0xFFFF0000) != 0x01180000)
  252. /* SMSC LAN9118 not present, use LAN91C111 instead */
  253. name = "smc91x";
  254. iounmap(eth_addr);
  255. return realview_eth_register(name, realview_eb_eth_resources);
  256. }
  257. static struct resource realview_eb_isp1761_resources[] = {
  258. [0] = {
  259. .start = REALVIEW_EB_USB_BASE,
  260. .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. [1] = {
  264. .start = IRQ_EB_USB,
  265. .end = IRQ_EB_USB,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. };
  269. static void __init gic_init_irq(void)
  270. {
  271. if (core_tile_eb11mp() || core_tile_a9mp()) {
  272. unsigned int pldctrl;
  273. /* new irq mode */
  274. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  275. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  276. pldctrl |= 0x00800000;
  277. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  278. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  279. /* core tile GIC, primary */
  280. gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
  281. gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
  282. gic_cpu_init(0, gic_cpu_base_addr);
  283. #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
  284. /* board GIC, secondary */
  285. gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
  286. gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
  287. gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
  288. #endif
  289. } else {
  290. /* board GIC, primary */
  291. gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
  292. gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
  293. gic_cpu_init(0, gic_cpu_base_addr);
  294. }
  295. }
  296. /*
  297. * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
  298. */
  299. static void realview_eb11mp_fixup(void)
  300. {
  301. /* AMBA devices */
  302. dmac_device.irq[0] = IRQ_EB11MP_DMA;
  303. uart0_device.irq[0] = IRQ_EB11MP_UART0;
  304. uart1_device.irq[0] = IRQ_EB11MP_UART1;
  305. uart2_device.irq[0] = IRQ_EB11MP_UART2;
  306. uart3_device.irq[0] = IRQ_EB11MP_UART3;
  307. clcd_device.irq[0] = IRQ_EB11MP_CLCD;
  308. wdog_device.irq[0] = IRQ_EB11MP_WDOG;
  309. gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
  310. gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
  311. gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
  312. rtc_device.irq[0] = IRQ_EB11MP_RTC;
  313. sci0_device.irq[0] = IRQ_EB11MP_SCI;
  314. ssp0_device.irq[0] = IRQ_EB11MP_SSP;
  315. aaci_device.irq[0] = IRQ_EB11MP_AACI;
  316. mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
  317. mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
  318. kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
  319. kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
  320. /* platform devices */
  321. realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
  322. realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
  323. realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
  324. realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
  325. }
  326. static void __init realview_eb_timer_init(void)
  327. {
  328. unsigned int timer_irq;
  329. timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
  330. timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
  331. timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
  332. timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
  333. if (core_tile_eb11mp() || core_tile_a9mp()) {
  334. #ifdef CONFIG_LOCAL_TIMERS
  335. twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
  336. #endif
  337. timer_irq = IRQ_EB11MP_TIMER0_1;
  338. } else
  339. timer_irq = IRQ_EB_TIMER0_1;
  340. realview_timer_init(timer_irq);
  341. }
  342. static struct sys_timer realview_eb_timer = {
  343. .init = realview_eb_timer_init,
  344. };
  345. static void __init realview_eb_init(void)
  346. {
  347. int i;
  348. if (core_tile_eb11mp() || core_tile_a9mp()) {
  349. realview_eb11mp_fixup();
  350. #ifdef CONFIG_CACHE_L2X0
  351. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  352. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  353. l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
  354. #endif
  355. }
  356. realview_flash_register(&realview_eb_flash_resource, 1);
  357. platform_device_register(&realview_i2c_device);
  358. eth_device_register();
  359. realview_usb_register(realview_eb_isp1761_resources);
  360. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  361. struct amba_device *d = amba_devs[i];
  362. amba_device_register(d, &iomem_resource);
  363. }
  364. #ifdef CONFIG_LEDS
  365. leds_event = realview_leds_event;
  366. #endif
  367. }
  368. MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
  369. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  370. .phys_io = REALVIEW_EB_UART0_BASE,
  371. .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
  372. .boot_params = PHYS_OFFSET + 0x00000100,
  373. .fixup = realview_fixup,
  374. .map_io = realview_eb_map_io,
  375. .init_irq = gic_init_irq,
  376. .timer = &realview_eb_timer,
  377. .init_machine = realview_eb_init,
  378. MACHINE_END