platsmp.c 5.1 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/platsmp.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/errno.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/smp.h>
  17. #include <linux/io.h>
  18. #include <asm/cacheflush.h>
  19. #include <mach/hardware.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/localtimer.h>
  22. #include <asm/unified.h>
  23. #include <mach/board-eb.h>
  24. #include <mach/board-pb11mp.h>
  25. #include <mach/board-pbx.h>
  26. #include <asm/smp_scu.h>
  27. #include "core.h"
  28. extern void realview_secondary_startup(void);
  29. /*
  30. * control for which core is the next to come out of the secondary
  31. * boot "holding pen"
  32. */
  33. volatile int __cpuinitdata pen_release = -1;
  34. static void __iomem *scu_base_addr(void)
  35. {
  36. if (machine_is_realview_eb_mp())
  37. return __io_address(REALVIEW_EB11MP_SCU_BASE);
  38. else if (machine_is_realview_pb11mp())
  39. return __io_address(REALVIEW_TC11MP_SCU_BASE);
  40. else if (machine_is_realview_pbx() &&
  41. (core_tile_pbx11mp() || core_tile_pbxa9mp()))
  42. return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
  43. else
  44. return (void __iomem *)0;
  45. }
  46. static inline unsigned int get_core_count(void)
  47. {
  48. void __iomem *scu_base = scu_base_addr();
  49. if (scu_base)
  50. return scu_get_core_count(scu_base);
  51. return 1;
  52. }
  53. static DEFINE_SPINLOCK(boot_lock);
  54. void __cpuinit platform_secondary_init(unsigned int cpu)
  55. {
  56. trace_hardirqs_off();
  57. /*
  58. * if any interrupts are already enabled for the primary
  59. * core (e.g. timer irq), then they will not have been enabled
  60. * for us: do so
  61. */
  62. gic_cpu_init(0, gic_cpu_base_addr);
  63. /*
  64. * let the primary processor know we're out of the
  65. * pen, then head off into the C entry point
  66. */
  67. pen_release = -1;
  68. smp_wmb();
  69. /*
  70. * Synchronise with the boot thread.
  71. */
  72. spin_lock(&boot_lock);
  73. spin_unlock(&boot_lock);
  74. }
  75. int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  76. {
  77. unsigned long timeout;
  78. /*
  79. * set synchronisation state between this boot processor
  80. * and the secondary one
  81. */
  82. spin_lock(&boot_lock);
  83. /*
  84. * The secondary processor is waiting to be released from
  85. * the holding pen - release it, then wait for it to flag
  86. * that it has been released by resetting pen_release.
  87. *
  88. * Note that "pen_release" is the hardware CPU ID, whereas
  89. * "cpu" is Linux's internal ID.
  90. */
  91. pen_release = cpu;
  92. flush_cache_all();
  93. /*
  94. * XXX
  95. *
  96. * This is a later addition to the booting protocol: the
  97. * bootMonitor now puts secondary cores into WFI, so
  98. * poke_milo() no longer gets the cores moving; we need
  99. * to send a soft interrupt to wake the secondary core.
  100. * Use smp_cross_call() for this, since there's little
  101. * point duplicating the code here
  102. */
  103. smp_cross_call(cpumask_of(cpu));
  104. timeout = jiffies + (1 * HZ);
  105. while (time_before(jiffies, timeout)) {
  106. smp_rmb();
  107. if (pen_release == -1)
  108. break;
  109. udelay(10);
  110. }
  111. /*
  112. * now the secondary core is starting up let it run its
  113. * calibrations, then wait for it to finish
  114. */
  115. spin_unlock(&boot_lock);
  116. return pen_release != -1 ? -ENOSYS : 0;
  117. }
  118. static void __init poke_milo(void)
  119. {
  120. /* nobody is to be released from the pen yet */
  121. pen_release = -1;
  122. /*
  123. * Write the address of secondary startup into the system-wide flags
  124. * register. The BootMonitor waits for this register to become
  125. * non-zero.
  126. */
  127. __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)),
  128. __io_address(REALVIEW_SYS_FLAGSSET));
  129. mb();
  130. }
  131. /*
  132. * Initialise the CPU possible map early - this describes the CPUs
  133. * which may be present or become present in the system.
  134. */
  135. void __init smp_init_cpus(void)
  136. {
  137. unsigned int i, ncores = get_core_count();
  138. for (i = 0; i < ncores; i++)
  139. set_cpu_possible(i, true);
  140. }
  141. void __init smp_prepare_cpus(unsigned int max_cpus)
  142. {
  143. unsigned int ncores = get_core_count();
  144. unsigned int cpu = smp_processor_id();
  145. int i;
  146. /* sanity check */
  147. if (ncores == 0) {
  148. printk(KERN_ERR
  149. "Realview: strange CM count of 0? Default to 1\n");
  150. ncores = 1;
  151. }
  152. if (ncores > NR_CPUS) {
  153. printk(KERN_WARNING
  154. "Realview: no. of cores (%d) greater than configured "
  155. "maximum of %d - clipping\n",
  156. ncores, NR_CPUS);
  157. ncores = NR_CPUS;
  158. }
  159. smp_store_cpu_info(cpu);
  160. /*
  161. * are we trying to boot more cores than exist?
  162. */
  163. if (max_cpus > ncores)
  164. max_cpus = ncores;
  165. /*
  166. * Initialise the present map, which describes the set of CPUs
  167. * actually populated at the present time.
  168. */
  169. for (i = 0; i < max_cpus; i++)
  170. set_cpu_present(i, true);
  171. /*
  172. * Initialise the SCU if there are more than one CPU and let
  173. * them know where to start. Note that, on modern versions of
  174. * MILO, the "poke" doesn't actually do anything until each
  175. * individual core is sent a soft interrupt to get it out of
  176. * WFI
  177. */
  178. if (max_cpus > 1) {
  179. /*
  180. * Enable the local timer or broadcast device for the
  181. * boot CPU, but only if we have more than one CPU.
  182. */
  183. percpu_timer_setup();
  184. scu_enable(scu_base_addr());
  185. poke_milo();
  186. }
  187. }