devices.c 6.0 KB

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  1. /*
  2. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor,
  17. * Boston, MA 02110-1301, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/serial.h>
  22. #include <linux/gpio.h>
  23. #include <mach/hardware.h>
  24. #include <mach/irqs.h>
  25. #include <mach/imx-uart.h>
  26. static struct resource uart0[] = {
  27. {
  28. .start = MXC91231_UART1_BASE_ADDR,
  29. .end = MXC91231_UART1_BASE_ADDR + 0x0B5,
  30. .flags = IORESOURCE_MEM,
  31. }, {
  32. .start = MXC91231_INT_UART1_RX,
  33. .end = MXC91231_INT_UART1_RX,
  34. .flags = IORESOURCE_IRQ,
  35. }, {
  36. .start = MXC91231_INT_UART1_TX,
  37. .end = MXC91231_INT_UART1_TX,
  38. .flags = IORESOURCE_IRQ,
  39. }, {
  40. .start = MXC91231_INT_UART1_MINT,
  41. .end = MXC91231_INT_UART1_MINT,
  42. .flags = IORESOURCE_IRQ,
  43. },
  44. };
  45. struct platform_device mxc_uart_device0 = {
  46. .name = "imx-uart",
  47. .id = 0,
  48. .resource = uart0,
  49. .num_resources = ARRAY_SIZE(uart0),
  50. };
  51. static struct resource uart1[] = {
  52. {
  53. .start = MXC91231_UART2_BASE_ADDR,
  54. .end = MXC91231_UART2_BASE_ADDR + 0x0B5,
  55. .flags = IORESOURCE_MEM,
  56. }, {
  57. .start = MXC91231_INT_UART2_RX,
  58. .end = MXC91231_INT_UART2_RX,
  59. .flags = IORESOURCE_IRQ,
  60. }, {
  61. .start = MXC91231_INT_UART2_TX,
  62. .end = MXC91231_INT_UART2_TX,
  63. .flags = IORESOURCE_IRQ,
  64. }, {
  65. .start = MXC91231_INT_UART2_MINT,
  66. .end = MXC91231_INT_UART2_MINT,
  67. .flags = IORESOURCE_IRQ,
  68. },
  69. };
  70. struct platform_device mxc_uart_device1 = {
  71. .name = "imx-uart",
  72. .id = 1,
  73. .resource = uart1,
  74. .num_resources = ARRAY_SIZE(uart1),
  75. };
  76. static struct resource uart2[] = {
  77. {
  78. .start = MXC91231_UART3_BASE_ADDR,
  79. .end = MXC91231_UART3_BASE_ADDR + 0x0B5,
  80. .flags = IORESOURCE_MEM,
  81. }, {
  82. .start = MXC91231_INT_UART3_RX,
  83. .end = MXC91231_INT_UART3_RX,
  84. .flags = IORESOURCE_IRQ,
  85. }, {
  86. .start = MXC91231_INT_UART3_TX,
  87. .end = MXC91231_INT_UART3_TX,
  88. .flags = IORESOURCE_IRQ,
  89. }, {
  90. .start = MXC91231_INT_UART3_MINT,
  91. .end = MXC91231_INT_UART3_MINT,
  92. .flags = IORESOURCE_IRQ,
  93. },
  94. };
  95. struct platform_device mxc_uart_device2 = {
  96. .name = "imx-uart",
  97. .id = 2,
  98. .resource = uart2,
  99. .num_resources = ARRAY_SIZE(uart2),
  100. };
  101. /* GPIO port description */
  102. static struct mxc_gpio_port mxc_gpio_ports[] = {
  103. [0] = {
  104. .chip.label = "gpio-0",
  105. .base = MXC91231_IO_ADDRESS(MXC91231_GPIO1_AP_BASE_ADDR),
  106. .irq = MXC91231_INT_GPIO1,
  107. .virtual_irq_start = MXC_GPIO_IRQ_START,
  108. },
  109. [1] = {
  110. .chip.label = "gpio-1",
  111. .base = MXC91231_IO_ADDRESS(MXC91231_GPIO2_AP_BASE_ADDR),
  112. .irq = MXC91231_INT_GPIO2,
  113. .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
  114. },
  115. [2] = {
  116. .chip.label = "gpio-2",
  117. .base = MXC91231_IO_ADDRESS(MXC91231_GPIO3_AP_BASE_ADDR),
  118. .irq = MXC91231_INT_GPIO3,
  119. .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
  120. },
  121. [3] = {
  122. .chip.label = "gpio-3",
  123. .base = MXC91231_IO_ADDRESS(MXC91231_GPIO4_SH_BASE_ADDR),
  124. .irq = MXC91231_INT_GPIO4,
  125. .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
  126. },
  127. };
  128. int __init mxc_register_gpios(void)
  129. {
  130. return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
  131. }
  132. static struct resource mxc_nand_resources[] = {
  133. {
  134. .start = MXC91231_NFC_BASE_ADDR,
  135. .end = MXC91231_NFC_BASE_ADDR + 0xfff,
  136. .flags = IORESOURCE_MEM
  137. }, {
  138. .start = MXC91231_INT_NANDFC,
  139. .end = MXC91231_INT_NANDFC,
  140. .flags = IORESOURCE_IRQ
  141. },
  142. };
  143. struct platform_device mxc_nand_device = {
  144. .name = "mxc_nand",
  145. .id = 0,
  146. .num_resources = ARRAY_SIZE(mxc_nand_resources),
  147. .resource = mxc_nand_resources,
  148. };
  149. static struct resource mxc_sdhc0_resources[] = {
  150. {
  151. .start = MXC91231_MMC_SDHC1_BASE_ADDR,
  152. .end = MXC91231_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
  153. .flags = IORESOURCE_MEM,
  154. }, {
  155. .start = MXC91231_INT_MMC_SDHC1,
  156. .end = MXC91231_INT_MMC_SDHC1,
  157. .flags = IORESOURCE_IRQ,
  158. },
  159. };
  160. static struct resource mxc_sdhc1_resources[] = {
  161. {
  162. .start = MXC91231_MMC_SDHC2_BASE_ADDR,
  163. .end = MXC91231_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
  164. .flags = IORESOURCE_MEM,
  165. }, {
  166. .start = MXC91231_INT_MMC_SDHC2,
  167. .end = MXC91231_INT_MMC_SDHC2,
  168. .flags = IORESOURCE_IRQ,
  169. },
  170. };
  171. struct platform_device mxc_sdhc_device0 = {
  172. .name = "mxc-mmc",
  173. .id = 0,
  174. .num_resources = ARRAY_SIZE(mxc_sdhc0_resources),
  175. .resource = mxc_sdhc0_resources,
  176. };
  177. struct platform_device mxc_sdhc_device1 = {
  178. .name = "mxc-mmc",
  179. .id = 1,
  180. .num_resources = ARRAY_SIZE(mxc_sdhc1_resources),
  181. .resource = mxc_sdhc1_resources,
  182. };
  183. static struct resource mxc_cspi0_resources[] = {
  184. {
  185. .start = MXC91231_CSPI1_BASE_ADDR,
  186. .end = MXC91231_CSPI1_BASE_ADDR + 0x20,
  187. .flags = IORESOURCE_MEM,
  188. }, {
  189. .start = MXC91231_INT_CSPI1,
  190. .end = MXC91231_INT_CSPI1,
  191. .flags = IORESOURCE_IRQ,
  192. },
  193. };
  194. struct platform_device mxc_cspi_device0 = {
  195. .name = "spi_imx",
  196. .id = 0,
  197. .num_resources = ARRAY_SIZE(mxc_cspi0_resources),
  198. .resource = mxc_cspi0_resources,
  199. };
  200. static struct resource mxc_cspi1_resources[] = {
  201. {
  202. .start = MXC91231_CSPI2_BASE_ADDR,
  203. .end = MXC91231_CSPI2_BASE_ADDR + 0x20,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = MXC91231_INT_CSPI2,
  207. .end = MXC91231_INT_CSPI2,
  208. .flags = IORESOURCE_IRQ,
  209. },
  210. };
  211. struct platform_device mxc_cspi_device1 = {
  212. .name = "spi_imx",
  213. .id = 1,
  214. .num_resources = ARRAY_SIZE(mxc_cspi1_resources),
  215. .resource = mxc_cspi1_resources,
  216. };
  217. static struct resource mxc_wdog0_resources[] = {
  218. {
  219. .start = MXC91231_WDOG1_BASE_ADDR,
  220. .end = MXC91231_WDOG1_BASE_ADDR + 0x10,
  221. .flags = IORESOURCE_MEM,
  222. },
  223. };
  224. struct platform_device mxc_wdog_device0 = {
  225. .name = "mxc-wdt",
  226. .id = 0,
  227. .num_resources = ARRAY_SIZE(mxc_wdog0_resources),
  228. .resource = mxc_wdog0_resources,
  229. };