mx31pdk.c 6.8 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. #include <linux/types.h>
  19. #include <linux/init.h>
  20. #include <linux/clk.h>
  21. #include <linux/irq.h>
  22. #include <linux/gpio.h>
  23. #include <linux/smsc911x.h>
  24. #include <linux/platform_device.h>
  25. #include <mach/hardware.h>
  26. #include <asm/mach-types.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/time.h>
  29. #include <asm/memory.h>
  30. #include <asm/mach/map.h>
  31. #include <mach/common.h>
  32. #include <mach/board-mx31pdk.h>
  33. #include <mach/imx-uart.h>
  34. #include <mach/iomux-mx3.h>
  35. #include "devices.h"
  36. /*!
  37. * @file mx31pdk.c
  38. *
  39. * @brief This file contains the board-specific initialization routines.
  40. *
  41. * @ingroup System
  42. */
  43. static int mx31pdk_pins[] = {
  44. /* UART1 */
  45. MX31_PIN_CTS1__CTS1,
  46. MX31_PIN_RTS1__RTS1,
  47. MX31_PIN_TXD1__TXD1,
  48. MX31_PIN_RXD1__RXD1,
  49. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  50. };
  51. static struct imxuart_platform_data uart_pdata = {
  52. .flags = IMXUART_HAVE_RTSCTS,
  53. };
  54. /*
  55. * Support for the SMSC9217 on the Debug board.
  56. */
  57. static struct smsc911x_platform_config smsc911x_config = {
  58. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  59. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  60. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  61. .phy_interface = PHY_INTERFACE_MODE_MII,
  62. };
  63. static struct resource smsc911x_resources[] = {
  64. {
  65. .start = LAN9217_BASE_ADDR,
  66. .end = LAN9217_BASE_ADDR + 0xff,
  67. .flags = IORESOURCE_MEM,
  68. }, {
  69. .start = EXPIO_INT_ENET,
  70. .end = EXPIO_INT_ENET,
  71. .flags = IORESOURCE_IRQ,
  72. },
  73. };
  74. static struct platform_device smsc911x_device = {
  75. .name = "smsc911x",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(smsc911x_resources),
  78. .resource = smsc911x_resources,
  79. .dev = {
  80. .platform_data = &smsc911x_config,
  81. },
  82. };
  83. /*
  84. * Routines for the CPLD on the debug board. It contains a CPLD handling
  85. * LEDs, switches, interrupts for Ethernet.
  86. */
  87. static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
  88. {
  89. uint32_t imr_val;
  90. uint32_t int_valid;
  91. uint32_t expio_irq;
  92. imr_val = __raw_readw(CPLD_INT_MASK_REG);
  93. int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val;
  94. expio_irq = MXC_EXP_IO_BASE;
  95. for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
  96. if ((int_valid & 1) == 0)
  97. continue;
  98. generic_handle_irq(expio_irq);
  99. }
  100. }
  101. /*
  102. * Disable an expio pin's interrupt by setting the bit in the imr.
  103. * @param irq an expio virtual irq number
  104. */
  105. static void expio_mask_irq(uint32_t irq)
  106. {
  107. uint16_t reg;
  108. uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
  109. /* mask the interrupt */
  110. reg = __raw_readw(CPLD_INT_MASK_REG);
  111. reg |= 1 << expio;
  112. __raw_writew(reg, CPLD_INT_MASK_REG);
  113. }
  114. /*
  115. * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
  116. * @param irq an expanded io virtual irq number
  117. */
  118. static void expio_ack_irq(uint32_t irq)
  119. {
  120. uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
  121. /* clear the interrupt status */
  122. __raw_writew(1 << expio, CPLD_INT_RESET_REG);
  123. __raw_writew(0, CPLD_INT_RESET_REG);
  124. /* mask the interrupt */
  125. expio_mask_irq(irq);
  126. }
  127. /*
  128. * Enable a expio pin's interrupt by clearing the bit in the imr.
  129. * @param irq a expio virtual irq number
  130. */
  131. static void expio_unmask_irq(uint32_t irq)
  132. {
  133. uint16_t reg;
  134. uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
  135. /* unmask the interrupt */
  136. reg = __raw_readw(CPLD_INT_MASK_REG);
  137. reg &= ~(1 << expio);
  138. __raw_writew(reg, CPLD_INT_MASK_REG);
  139. }
  140. static struct irq_chip expio_irq_chip = {
  141. .ack = expio_ack_irq,
  142. .mask = expio_mask_irq,
  143. .unmask = expio_unmask_irq,
  144. };
  145. static int __init mx31pdk_init_expio(void)
  146. {
  147. int i;
  148. int ret;
  149. /* Check if there's a debug board connected */
  150. if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) ||
  151. (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) ||
  152. (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) {
  153. /* No Debug board found */
  154. return -ENODEV;
  155. }
  156. pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n",
  157. __raw_readw(CPLD_CODE_VER_REG));
  158. /*
  159. * Configure INT line as GPIO input
  160. */
  161. ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq");
  162. if (ret)
  163. pr_warning("could not get LAN irq gpio\n");
  164. else
  165. gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
  166. /* Disable the interrupts and clear the status */
  167. __raw_writew(0, CPLD_INT_MASK_REG);
  168. __raw_writew(0xFFFF, CPLD_INT_RESET_REG);
  169. __raw_writew(0, CPLD_INT_RESET_REG);
  170. __raw_writew(0x1F, CPLD_INT_MASK_REG);
  171. for (i = MXC_EXP_IO_BASE;
  172. i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
  173. i++) {
  174. set_irq_chip(i, &expio_irq_chip);
  175. set_irq_handler(i, handle_level_irq);
  176. set_irq_flags(i, IRQF_VALID);
  177. }
  178. set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
  179. set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler);
  180. return 0;
  181. }
  182. /*
  183. * This structure defines the MX31 memory map.
  184. */
  185. static struct map_desc mx31pdk_io_desc[] __initdata = {
  186. {
  187. .virtual = SPBA0_BASE_ADDR_VIRT,
  188. .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
  189. .length = SPBA0_SIZE,
  190. .type = MT_DEVICE_NONSHARED,
  191. }, {
  192. .virtual = CS5_BASE_ADDR_VIRT,
  193. .pfn = __phys_to_pfn(CS5_BASE_ADDR),
  194. .length = CS5_SIZE,
  195. .type = MT_DEVICE,
  196. },
  197. };
  198. /*
  199. * Set up static virtual mappings.
  200. */
  201. static void __init mx31pdk_map_io(void)
  202. {
  203. mx31_map_io();
  204. iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
  205. }
  206. /*!
  207. * Board specific initialization.
  208. */
  209. static void __init mxc_board_init(void)
  210. {
  211. mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins),
  212. "mx31pdk");
  213. mxc_register_device(&mxc_uart_device0, &uart_pdata);
  214. if (!mx31pdk_init_expio())
  215. platform_device_register(&smsc911x_device);
  216. }
  217. static void __init mx31pdk_timer_init(void)
  218. {
  219. mx31_clocks_init(26000000);
  220. }
  221. static struct sys_timer mx31pdk_timer = {
  222. .init = mx31pdk_timer_init,
  223. };
  224. /*
  225. * The following uses standard kernel macros defined in arch.h in order to
  226. * initialize __mach_desc_MX31PDK data structure.
  227. */
  228. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  229. /* Maintainer: Freescale Semiconductor, Inc. */
  230. .phys_io = AIPS1_BASE_ADDR,
  231. .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  232. .boot_params = PHYS_OFFSET + 0x100,
  233. .map_io = mx31pdk_map_io,
  234. .init_irq = mx31_init_irq,
  235. .init_machine = mxc_board_init,
  236. .timer = &mx31pdk_timer,
  237. MACHINE_END