irq.c 1.6 KB

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  1. /*
  2. * arch/arm/mach-mv78xx0/irq.c
  3. *
  4. * MV78xx0 IRQ handling.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/pci.h>
  13. #include <linux/irq.h>
  14. #include <asm/gpio.h>
  15. #include <mach/bridge-regs.h>
  16. #include <plat/irq.h>
  17. #include "common.h"
  18. static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
  19. {
  20. BUG_ON(irq < IRQ_MV78XX0_GPIO_0_7 || irq > IRQ_MV78XX0_GPIO_24_31);
  21. orion_gpio_irq_handler((irq - IRQ_MV78XX0_GPIO_0_7) << 3);
  22. }
  23. void __init mv78xx0_init_irq(void)
  24. {
  25. int i;
  26. /* Initialize gpiolib. */
  27. orion_gpio_init();
  28. orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
  29. orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
  30. orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
  31. /*
  32. * Mask and clear GPIO IRQ interrupts.
  33. */
  34. writel(0, GPIO_LEVEL_MASK(0));
  35. writel(0, GPIO_EDGE_MASK(0));
  36. writel(0, GPIO_EDGE_CAUSE(0));
  37. for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
  38. set_irq_chip(i, &orion_gpio_irq_chip);
  39. set_irq_handler(i, handle_level_irq);
  40. irq_desc[i].status |= IRQ_LEVEL;
  41. set_irq_flags(i, IRQF_VALID);
  42. }
  43. set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
  44. set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
  45. set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
  46. set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
  47. }