mux.c 2.5 KB

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  1. /*
  2. * Utility to set the DAVINCI MUX register from a table in mux.h
  3. *
  4. * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  5. *
  6. * Based on linux/arch/arm/plat-omap/mux.c:
  7. * Copyright (C) 2003 - 2005 Nokia Corporation
  8. *
  9. * Written by Tony Lindgren
  10. *
  11. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. *
  16. * Copyright (C) 2008 Texas Instruments.
  17. */
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/spinlock.h>
  21. #include <mach/hardware.h>
  22. #include <mach/mux.h>
  23. #include <mach/common.h>
  24. /*
  25. * Sets the DAVINCI MUX register based on the table
  26. */
  27. int __init_or_module davinci_cfg_reg(const unsigned long index)
  28. {
  29. static DEFINE_SPINLOCK(mux_spin_lock);
  30. struct davinci_soc_info *soc_info = &davinci_soc_info;
  31. void __iomem *base = soc_info->pinmux_base;
  32. unsigned long flags;
  33. const struct mux_config *cfg;
  34. unsigned int reg_orig = 0, reg = 0;
  35. unsigned int mask, warn = 0;
  36. if (!soc_info->pinmux_pins)
  37. BUG();
  38. if (index >= soc_info->pinmux_pins_num) {
  39. printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
  40. index, soc_info->pinmux_pins_num);
  41. dump_stack();
  42. return -ENODEV;
  43. }
  44. cfg = &soc_info->pinmux_pins[index];
  45. if (cfg->name == NULL) {
  46. printk(KERN_ERR "No entry for the specified index\n");
  47. return -ENODEV;
  48. }
  49. /* Update the mux register in question */
  50. if (cfg->mask) {
  51. unsigned tmp1, tmp2;
  52. spin_lock_irqsave(&mux_spin_lock, flags);
  53. reg_orig = __raw_readl(base + cfg->mux_reg);
  54. mask = (cfg->mask << cfg->mask_offset);
  55. tmp1 = reg_orig & mask;
  56. reg = reg_orig & ~mask;
  57. tmp2 = (cfg->mode << cfg->mask_offset);
  58. reg |= tmp2;
  59. if (tmp1 != tmp2)
  60. warn = 1;
  61. __raw_writel(reg, base + cfg->mux_reg);
  62. spin_unlock_irqrestore(&mux_spin_lock, flags);
  63. }
  64. if (warn) {
  65. #ifdef CONFIG_DAVINCI_MUX_WARNINGS
  66. printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
  67. #endif
  68. }
  69. #ifdef CONFIG_DAVINCI_MUX_DEBUG
  70. if (cfg->debug || warn) {
  71. printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
  72. printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
  73. cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
  74. }
  75. #endif
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(davinci_cfg_reg);
  79. int da8xx_pinmux_setup(const short pins[])
  80. {
  81. int i, error = -EINVAL;
  82. if (pins)
  83. for (i = 0; pins[i] >= 0; i++) {
  84. error = davinci_cfg_reg(pins[i]);
  85. if (error)
  86. break;
  87. }
  88. return error;
  89. }