devices-da8xx.c 10 KB

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  1. /*
  2. * DA8XX/OMAP L1XX platform device data
  3. *
  4. * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
  5. * Derived from code that was:
  6. * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/serial_8250.h>
  19. #include <mach/cputype.h>
  20. #include <mach/common.h>
  21. #include <mach/time.h>
  22. #include <mach/da8xx.h>
  23. #include <video/da8xx-fb.h>
  24. #include "clock.h"
  25. #define DA8XX_TPCC_BASE 0x01c00000
  26. #define DA8XX_TPTC0_BASE 0x01c08000
  27. #define DA8XX_TPTC1_BASE 0x01c08400
  28. #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
  29. #define DA8XX_I2C0_BASE 0x01c22000
  30. #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
  31. #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
  32. #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
  33. #define DA8XX_EMAC_MDIO_BASE 0x01e24000
  34. #define DA8XX_GPIO_BASE 0x01e26000
  35. #define DA8XX_I2C1_BASE 0x01e28000
  36. #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
  37. #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
  38. #define DA8XX_EMAC_RAM_OFFSET 0x0000
  39. #define DA8XX_MDIO_REG_OFFSET 0x4000
  40. #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
  41. static struct plat_serial8250_port da8xx_serial_pdata[] = {
  42. {
  43. .mapbase = DA8XX_UART0_BASE,
  44. .irq = IRQ_DA8XX_UARTINT0,
  45. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  46. UPF_IOREMAP,
  47. .iotype = UPIO_MEM,
  48. .regshift = 2,
  49. },
  50. {
  51. .mapbase = DA8XX_UART1_BASE,
  52. .irq = IRQ_DA8XX_UARTINT1,
  53. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  54. UPF_IOREMAP,
  55. .iotype = UPIO_MEM,
  56. .regshift = 2,
  57. },
  58. {
  59. .mapbase = DA8XX_UART2_BASE,
  60. .irq = IRQ_DA8XX_UARTINT2,
  61. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  62. UPF_IOREMAP,
  63. .iotype = UPIO_MEM,
  64. .regshift = 2,
  65. },
  66. {
  67. .flags = 0,
  68. },
  69. };
  70. struct platform_device da8xx_serial_device = {
  71. .name = "serial8250",
  72. .id = PLAT8250_DEV_PLATFORM,
  73. .dev = {
  74. .platform_data = da8xx_serial_pdata,
  75. },
  76. };
  77. static const s8 da8xx_dma_chan_no_event[] = {
  78. 20, 21,
  79. -1
  80. };
  81. static const s8 da8xx_queue_tc_mapping[][2] = {
  82. /* {event queue no, TC no} */
  83. {0, 0},
  84. {1, 1},
  85. {-1, -1}
  86. };
  87. static const s8 da8xx_queue_priority_mapping[][2] = {
  88. /* {event queue no, Priority} */
  89. {0, 3},
  90. {1, 7},
  91. {-1, -1}
  92. };
  93. static struct edma_soc_info da8xx_edma_info[] = {
  94. {
  95. .n_channel = 32,
  96. .n_region = 4,
  97. .n_slot = 128,
  98. .n_tc = 2,
  99. .n_cc = 1,
  100. .noevent = da8xx_dma_chan_no_event,
  101. .queue_tc_mapping = da8xx_queue_tc_mapping,
  102. .queue_priority_mapping = da8xx_queue_priority_mapping,
  103. },
  104. };
  105. static struct resource da8xx_edma_resources[] = {
  106. {
  107. .name = "edma_cc0",
  108. .start = DA8XX_TPCC_BASE,
  109. .end = DA8XX_TPCC_BASE + SZ_32K - 1,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. {
  113. .name = "edma_tc0",
  114. .start = DA8XX_TPTC0_BASE,
  115. .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .name = "edma_tc1",
  120. .start = DA8XX_TPTC1_BASE,
  121. .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. {
  125. .name = "edma0",
  126. .start = IRQ_DA8XX_CCINT0,
  127. .flags = IORESOURCE_IRQ,
  128. },
  129. {
  130. .name = "edma0_err",
  131. .start = IRQ_DA8XX_CCERRINT,
  132. .flags = IORESOURCE_IRQ,
  133. },
  134. };
  135. static struct platform_device da8xx_edma_device = {
  136. .name = "edma",
  137. .id = -1,
  138. .dev = {
  139. .platform_data = da8xx_edma_info,
  140. },
  141. .num_resources = ARRAY_SIZE(da8xx_edma_resources),
  142. .resource = da8xx_edma_resources,
  143. };
  144. int __init da8xx_register_edma(void)
  145. {
  146. return platform_device_register(&da8xx_edma_device);
  147. }
  148. static struct resource da8xx_i2c_resources0[] = {
  149. {
  150. .start = DA8XX_I2C0_BASE,
  151. .end = DA8XX_I2C0_BASE + SZ_4K - 1,
  152. .flags = IORESOURCE_MEM,
  153. },
  154. {
  155. .start = IRQ_DA8XX_I2CINT0,
  156. .end = IRQ_DA8XX_I2CINT0,
  157. .flags = IORESOURCE_IRQ,
  158. },
  159. };
  160. static struct platform_device da8xx_i2c_device0 = {
  161. .name = "i2c_davinci",
  162. .id = 1,
  163. .num_resources = ARRAY_SIZE(da8xx_i2c_resources0),
  164. .resource = da8xx_i2c_resources0,
  165. };
  166. static struct resource da8xx_i2c_resources1[] = {
  167. {
  168. .start = DA8XX_I2C1_BASE,
  169. .end = DA8XX_I2C1_BASE + SZ_4K - 1,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. {
  173. .start = IRQ_DA8XX_I2CINT1,
  174. .end = IRQ_DA8XX_I2CINT1,
  175. .flags = IORESOURCE_IRQ,
  176. },
  177. };
  178. static struct platform_device da8xx_i2c_device1 = {
  179. .name = "i2c_davinci",
  180. .id = 2,
  181. .num_resources = ARRAY_SIZE(da8xx_i2c_resources1),
  182. .resource = da8xx_i2c_resources1,
  183. };
  184. int __init da8xx_register_i2c(int instance,
  185. struct davinci_i2c_platform_data *pdata)
  186. {
  187. struct platform_device *pdev;
  188. if (instance == 0)
  189. pdev = &da8xx_i2c_device0;
  190. else if (instance == 1)
  191. pdev = &da8xx_i2c_device1;
  192. else
  193. return -EINVAL;
  194. pdev->dev.platform_data = pdata;
  195. return platform_device_register(pdev);
  196. }
  197. static struct resource da8xx_watchdog_resources[] = {
  198. {
  199. .start = DA8XX_WDOG_BASE,
  200. .end = DA8XX_WDOG_BASE + SZ_4K - 1,
  201. .flags = IORESOURCE_MEM,
  202. },
  203. };
  204. struct platform_device davinci_wdt_device = {
  205. .name = "watchdog",
  206. .id = -1,
  207. .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
  208. .resource = da8xx_watchdog_resources,
  209. };
  210. int __init da8xx_register_watchdog(void)
  211. {
  212. return platform_device_register(&davinci_wdt_device);
  213. }
  214. static struct resource da8xx_emac_resources[] = {
  215. {
  216. .start = DA8XX_EMAC_CPPI_PORT_BASE,
  217. .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1,
  218. .flags = IORESOURCE_MEM,
  219. },
  220. {
  221. .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
  222. .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. {
  226. .start = IRQ_DA8XX_C0_RX_PULSE,
  227. .end = IRQ_DA8XX_C0_RX_PULSE,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. {
  231. .start = IRQ_DA8XX_C0_TX_PULSE,
  232. .end = IRQ_DA8XX_C0_TX_PULSE,
  233. .flags = IORESOURCE_IRQ,
  234. },
  235. {
  236. .start = IRQ_DA8XX_C0_MISC_PULSE,
  237. .end = IRQ_DA8XX_C0_MISC_PULSE,
  238. .flags = IORESOURCE_IRQ,
  239. },
  240. };
  241. struct emac_platform_data da8xx_emac_pdata = {
  242. .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
  243. .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
  244. .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
  245. .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET,
  246. .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
  247. .version = EMAC_VERSION_2,
  248. };
  249. static struct platform_device da8xx_emac_device = {
  250. .name = "davinci_emac",
  251. .id = 1,
  252. .dev = {
  253. .platform_data = &da8xx_emac_pdata,
  254. },
  255. .num_resources = ARRAY_SIZE(da8xx_emac_resources),
  256. .resource = da8xx_emac_resources,
  257. };
  258. static struct resource da830_mcasp1_resources[] = {
  259. {
  260. .name = "mcasp1",
  261. .start = DAVINCI_DA830_MCASP1_REG_BASE,
  262. .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
  263. .flags = IORESOURCE_MEM,
  264. },
  265. /* TX event */
  266. {
  267. .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
  268. .end = DAVINCI_DA830_DMA_MCASP1_AXEVT,
  269. .flags = IORESOURCE_DMA,
  270. },
  271. /* RX event */
  272. {
  273. .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
  274. .end = DAVINCI_DA830_DMA_MCASP1_AREVT,
  275. .flags = IORESOURCE_DMA,
  276. },
  277. };
  278. static struct platform_device da830_mcasp1_device = {
  279. .name = "davinci-mcasp",
  280. .id = 1,
  281. .num_resources = ARRAY_SIZE(da830_mcasp1_resources),
  282. .resource = da830_mcasp1_resources,
  283. };
  284. static struct resource da850_mcasp_resources[] = {
  285. {
  286. .name = "mcasp",
  287. .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
  288. .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. /* TX event */
  292. {
  293. .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
  294. .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
  295. .flags = IORESOURCE_DMA,
  296. },
  297. /* RX event */
  298. {
  299. .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
  300. .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. };
  304. static struct platform_device da850_mcasp_device = {
  305. .name = "davinci-mcasp",
  306. .id = 0,
  307. .num_resources = ARRAY_SIZE(da850_mcasp_resources),
  308. .resource = da850_mcasp_resources,
  309. };
  310. int __init da8xx_register_emac(void)
  311. {
  312. return platform_device_register(&da8xx_emac_device);
  313. }
  314. void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
  315. {
  316. /* DA830/OMAP-L137 has 3 instances of McASP */
  317. if (cpu_is_davinci_da830() && id == 1) {
  318. da830_mcasp1_device.dev.platform_data = pdata;
  319. platform_device_register(&da830_mcasp1_device);
  320. } else if (cpu_is_davinci_da850()) {
  321. da850_mcasp_device.dev.platform_data = pdata;
  322. platform_device_register(&da850_mcasp_device);
  323. }
  324. }
  325. static const struct display_panel disp_panel = {
  326. QVGA,
  327. 16,
  328. 16,
  329. COLOR_ACTIVE,
  330. };
  331. static struct lcd_ctrl_config lcd_cfg = {
  332. &disp_panel,
  333. .ac_bias = 255,
  334. .ac_bias_intrpt = 0,
  335. .dma_burst_sz = 16,
  336. .bpp = 16,
  337. .fdd = 255,
  338. .tft_alt_mode = 0,
  339. .stn_565_mode = 0,
  340. .mono_8bit_mode = 0,
  341. .invert_line_clock = 1,
  342. .invert_frm_clock = 1,
  343. .sync_edge = 0,
  344. .sync_ctrl = 1,
  345. .raster_order = 0,
  346. };
  347. static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = {
  348. .manu_name = "sharp",
  349. .controller_data = &lcd_cfg,
  350. .type = "Sharp_LK043T1DG01",
  351. };
  352. static struct resource da8xx_lcdc_resources[] = {
  353. [0] = { /* registers */
  354. .start = DA8XX_LCD_CNTRL_BASE,
  355. .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
  356. .flags = IORESOURCE_MEM,
  357. },
  358. [1] = { /* interrupt */
  359. .start = IRQ_DA8XX_LCDINT,
  360. .end = IRQ_DA8XX_LCDINT,
  361. .flags = IORESOURCE_IRQ,
  362. },
  363. };
  364. static struct platform_device da850_lcdc_device = {
  365. .name = "da8xx_lcdc",
  366. .id = 0,
  367. .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
  368. .resource = da8xx_lcdc_resources,
  369. .dev = {
  370. .platform_data = &da850_evm_lcdc_pdata,
  371. }
  372. };
  373. int __init da8xx_register_lcdc(void)
  374. {
  375. return platform_device_register(&da850_lcdc_device);
  376. }
  377. static struct resource da8xx_mmcsd0_resources[] = {
  378. { /* registers */
  379. .start = DA8XX_MMCSD0_BASE,
  380. .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
  381. .flags = IORESOURCE_MEM,
  382. },
  383. { /* interrupt */
  384. .start = IRQ_DA8XX_MMCSDINT0,
  385. .end = IRQ_DA8XX_MMCSDINT0,
  386. .flags = IORESOURCE_IRQ,
  387. },
  388. { /* DMA RX */
  389. .start = EDMA_CTLR_CHAN(0, 16),
  390. .end = EDMA_CTLR_CHAN(0, 16),
  391. .flags = IORESOURCE_DMA,
  392. },
  393. { /* DMA TX */
  394. .start = EDMA_CTLR_CHAN(0, 17),
  395. .end = EDMA_CTLR_CHAN(0, 17),
  396. .flags = IORESOURCE_DMA,
  397. },
  398. };
  399. static struct platform_device da8xx_mmcsd0_device = {
  400. .name = "davinci_mmc",
  401. .id = 0,
  402. .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
  403. .resource = da8xx_mmcsd0_resources,
  404. };
  405. int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
  406. {
  407. da8xx_mmcsd0_device.dev.platform_data = config;
  408. return platform_device_register(&da8xx_mmcsd0_device);
  409. }