Kconfig 1.9 KB

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  1. if ARCH_CLPS711X
  2. menu "CLPS711X/EP721X Implementations"
  3. config ARCH_AUTCPU12
  4. bool "AUTCPU12"
  5. help
  6. Say Y if you intend to run the kernel on the autronix autcpu12
  7. board. This board is based on a Cirrus Logic CS89712.
  8. config ARCH_CDB89712
  9. bool "CDB89712"
  10. select ISA
  11. help
  12. This is an evaluation board from Cirrus for the CS89712 processor.
  13. The board includes 2 serial ports, Ethernet, IRDA, and expansion
  14. headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
  15. config ARCH_CEIVA
  16. bool "CEIVA"
  17. help
  18. Say Y here if you intend to run this kernel on the Ceiva/Polaroid
  19. PhotoMax Digital Picture Frame.
  20. config ARCH_CLEP7312
  21. bool "CLEP7312"
  22. help
  23. Boards based on the Cirrus Logic 7212/7312 chips.
  24. config ARCH_EDB7211
  25. bool "EDB7211"
  26. select ISA
  27. select ARCH_DISCONTIGMEM_ENABLE
  28. select ARCH_SPARSEMEM_ENABLE
  29. select ARCH_SELECT_MEMORY_MODEL
  30. help
  31. Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
  32. evaluation board.
  33. config ARCH_P720T
  34. bool "P720T"
  35. help
  36. Say Y here if you intend to run this kernel on the ARM Prospector
  37. 720T.
  38. config ARCH_FORTUNET
  39. bool "FORTUNET"
  40. # XXX Maybe these should indicate register compatibility
  41. # instead of being mutually exclusive.
  42. config ARCH_EP7211
  43. bool
  44. depends on ARCH_EDB7211
  45. default y
  46. config ARCH_EP7212
  47. bool
  48. depends on ARCH_P720T || ARCH_CEIVA
  49. default y
  50. config EP72XX_ROM_BOOT
  51. bool "EP72xx ROM boot"
  52. depends on ARCH_EP7211 || ARCH_EP7212
  53. ---help---
  54. If you say Y here, your CLPS711x-based kernel will use the bootstrap
  55. mode memory map instead of the normal memory map.
  56. Processors derived from the Cirrus CLPS-711X core support two boot
  57. modes. Normal mode boots from the external memory device at CS0.
  58. Bootstrap mode rearranges parts of the memory map, placing an
  59. internal 128 byte bootstrap ROM at CS0. This option performs the
  60. address map changes required to support booting in this mode.
  61. You almost surely want to say N here.
  62. endmenu
  63. endif