irq.c 3.5 KB

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  1. /*
  2. *
  3. * Copyright (C) 1999 ARM Limited
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/stddef.h>
  21. #include <linux/list.h>
  22. #include <linux/timer.h>
  23. #include <linux/version.h>
  24. #include <linux/io.h>
  25. #include <mach/hardware.h>
  26. #include <asm/irq.h>
  27. #include <asm/mach/irq.h>
  28. #include <mach/csp/intcHw_reg.h>
  29. #include <mach/csp/mm_io.h>
  30. static void bcmring_mask_irq0(unsigned int irq)
  31. {
  32. writel(1 << (irq - IRQ_INTC0_START),
  33. MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
  34. }
  35. static void bcmring_unmask_irq0(unsigned int irq)
  36. {
  37. writel(1 << (irq - IRQ_INTC0_START),
  38. MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
  39. }
  40. static void bcmring_mask_irq1(unsigned int irq)
  41. {
  42. writel(1 << (irq - IRQ_INTC1_START),
  43. MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
  44. }
  45. static void bcmring_unmask_irq1(unsigned int irq)
  46. {
  47. writel(1 << (irq - IRQ_INTC1_START),
  48. MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
  49. }
  50. static void bcmring_mask_irq2(unsigned int irq)
  51. {
  52. writel(1 << (irq - IRQ_SINTC_START),
  53. MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
  54. }
  55. static void bcmring_unmask_irq2(unsigned int irq)
  56. {
  57. writel(1 << (irq - IRQ_SINTC_START),
  58. MM_IO_BASE_SINTC + INTCHW_INTENABLE);
  59. }
  60. static struct irq_chip bcmring_irq0_chip = {
  61. .typename = "ARM-INTC0",
  62. .ack = bcmring_mask_irq0,
  63. .mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
  64. .unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
  65. };
  66. static struct irq_chip bcmring_irq1_chip = {
  67. .typename = "ARM-INTC1",
  68. .ack = bcmring_mask_irq1,
  69. .mask = bcmring_mask_irq1,
  70. .unmask = bcmring_unmask_irq1,
  71. };
  72. static struct irq_chip bcmring_irq2_chip = {
  73. .typename = "ARM-SINTC",
  74. .ack = bcmring_mask_irq2,
  75. .mask = bcmring_mask_irq2,
  76. .unmask = bcmring_unmask_irq2,
  77. };
  78. static void vic_init(void __iomem *base, struct irq_chip *chip,
  79. unsigned int irq_start, unsigned int vic_sources)
  80. {
  81. unsigned int i;
  82. for (i = 0; i < 32; i++) {
  83. unsigned int irq = irq_start + i;
  84. set_irq_chip(irq, chip);
  85. set_irq_chip_data(irq, base);
  86. if (vic_sources & (1 << i)) {
  87. set_irq_handler(irq, handle_level_irq);
  88. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  89. }
  90. }
  91. writel(0, base + INTCHW_INTSELECT);
  92. writel(0, base + INTCHW_INTENABLE);
  93. writel(~0, base + INTCHW_INTENCLEAR);
  94. writel(0, base + INTCHW_IRQSTATUS);
  95. writel(~0, base + INTCHW_SOFTINTCLEAR);
  96. }
  97. void __init bcmring_init_irq(void)
  98. {
  99. vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip,
  100. IRQ_INTC0_START, IRQ_INTC0_VALID_MASK);
  101. vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
  102. IRQ_INTC1_START, IRQ_INTC1_VALID_MASK);
  103. vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip,
  104. IRQ_SINTC_START, IRQ_SINTC_VALID_MASK);
  105. /* special cases */
  106. if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
  107. set_irq_handler(IRQ_GPIO0, handle_simple_irq);
  108. }
  109. if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
  110. set_irq_handler(IRQ_GPIO1, handle_simple_irq);
  111. }
  112. }