setup.c 20 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/root_dev.h>
  23. #include <linux/cpu.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/smp.h>
  26. #include <linux/fs.h>
  27. #include <asm/unified.h>
  28. #include <asm/cpu.h>
  29. #include <asm/cputype.h>
  30. #include <asm/elf.h>
  31. #include <asm/procinfo.h>
  32. #include <asm/sections.h>
  33. #include <asm/setup.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/cacheflush.h>
  36. #include <asm/cachetype.h>
  37. #include <asm/tlbflush.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/irq.h>
  40. #include <asm/mach/time.h>
  41. #include <asm/traps.h>
  42. #include <asm/unwind.h>
  43. #include "compat.h"
  44. #include "atags.h"
  45. #include "tcm.h"
  46. #ifndef MEM_SIZE
  47. #define MEM_SIZE (16*1024*1024)
  48. #endif
  49. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  50. char fpe_type[8];
  51. static int __init fpe_setup(char *line)
  52. {
  53. memcpy(fpe_type, line, 8);
  54. return 1;
  55. }
  56. __setup("fpe=", fpe_setup);
  57. #endif
  58. extern void paging_init(struct machine_desc *desc);
  59. extern void reboot_setup(char *str);
  60. unsigned int processor_id;
  61. EXPORT_SYMBOL(processor_id);
  62. unsigned int __machine_arch_type;
  63. EXPORT_SYMBOL(__machine_arch_type);
  64. unsigned int cacheid;
  65. EXPORT_SYMBOL(cacheid);
  66. unsigned int __atags_pointer __initdata;
  67. unsigned int system_rev;
  68. EXPORT_SYMBOL(system_rev);
  69. unsigned int system_serial_low;
  70. EXPORT_SYMBOL(system_serial_low);
  71. unsigned int system_serial_high;
  72. EXPORT_SYMBOL(system_serial_high);
  73. unsigned int elf_hwcap;
  74. EXPORT_SYMBOL(elf_hwcap);
  75. #ifdef MULTI_CPU
  76. struct processor processor;
  77. #endif
  78. #ifdef MULTI_TLB
  79. struct cpu_tlb_fns cpu_tlb;
  80. #endif
  81. #ifdef MULTI_USER
  82. struct cpu_user_fns cpu_user;
  83. #endif
  84. #ifdef MULTI_CACHE
  85. struct cpu_cache_fns cpu_cache;
  86. #endif
  87. #ifdef CONFIG_OUTER_CACHE
  88. struct outer_cache_fns outer_cache;
  89. #endif
  90. struct stack {
  91. u32 irq[3];
  92. u32 abt[3];
  93. u32 und[3];
  94. } ____cacheline_aligned;
  95. static struct stack stacks[NR_CPUS];
  96. char elf_platform[ELF_PLATFORM_SIZE];
  97. EXPORT_SYMBOL(elf_platform);
  98. static const char *cpu_name;
  99. static const char *machine_name;
  100. static char __initdata command_line[COMMAND_LINE_SIZE];
  101. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  102. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  103. #define ENDIANNESS ((char)endian_test.l)
  104. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  105. /*
  106. * Standard memory resources
  107. */
  108. static struct resource mem_res[] = {
  109. {
  110. .name = "Video RAM",
  111. .start = 0,
  112. .end = 0,
  113. .flags = IORESOURCE_MEM
  114. },
  115. {
  116. .name = "Kernel text",
  117. .start = 0,
  118. .end = 0,
  119. .flags = IORESOURCE_MEM
  120. },
  121. {
  122. .name = "Kernel data",
  123. .start = 0,
  124. .end = 0,
  125. .flags = IORESOURCE_MEM
  126. }
  127. };
  128. #define video_ram mem_res[0]
  129. #define kernel_code mem_res[1]
  130. #define kernel_data mem_res[2]
  131. static struct resource io_res[] = {
  132. {
  133. .name = "reserved",
  134. .start = 0x3bc,
  135. .end = 0x3be,
  136. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  137. },
  138. {
  139. .name = "reserved",
  140. .start = 0x378,
  141. .end = 0x37f,
  142. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  143. },
  144. {
  145. .name = "reserved",
  146. .start = 0x278,
  147. .end = 0x27f,
  148. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  149. }
  150. };
  151. #define lp0 io_res[0]
  152. #define lp1 io_res[1]
  153. #define lp2 io_res[2]
  154. static const char *proc_arch[] = {
  155. "undefined/unknown",
  156. "3",
  157. "4",
  158. "4T",
  159. "5",
  160. "5T",
  161. "5TE",
  162. "5TEJ",
  163. "6TEJ",
  164. "7",
  165. "?(11)",
  166. "?(12)",
  167. "?(13)",
  168. "?(14)",
  169. "?(15)",
  170. "?(16)",
  171. "?(17)",
  172. };
  173. int cpu_architecture(void)
  174. {
  175. int cpu_arch;
  176. if ((read_cpuid_id() & 0x0008f000) == 0) {
  177. cpu_arch = CPU_ARCH_UNKNOWN;
  178. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  179. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  180. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  181. cpu_arch = (read_cpuid_id() >> 16) & 7;
  182. if (cpu_arch)
  183. cpu_arch += CPU_ARCH_ARMv3;
  184. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  185. unsigned int mmfr0;
  186. /* Revised CPUID format. Read the Memory Model Feature
  187. * Register 0 and check for VMSAv7 or PMSAv7 */
  188. asm("mrc p15, 0, %0, c0, c1, 4"
  189. : "=r" (mmfr0));
  190. if ((mmfr0 & 0x0000000f) == 0x00000003 ||
  191. (mmfr0 & 0x000000f0) == 0x00000030)
  192. cpu_arch = CPU_ARCH_ARMv7;
  193. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  194. (mmfr0 & 0x000000f0) == 0x00000020)
  195. cpu_arch = CPU_ARCH_ARMv6;
  196. else
  197. cpu_arch = CPU_ARCH_UNKNOWN;
  198. } else
  199. cpu_arch = CPU_ARCH_UNKNOWN;
  200. return cpu_arch;
  201. }
  202. static void __init cacheid_init(void)
  203. {
  204. unsigned int cachetype = read_cpuid_cachetype();
  205. unsigned int arch = cpu_architecture();
  206. if (arch >= CPU_ARCH_ARMv6) {
  207. if ((cachetype & (7 << 29)) == 4 << 29) {
  208. /* ARMv7 register format */
  209. cacheid = CACHEID_VIPT_NONALIASING;
  210. if ((cachetype & (3 << 14)) == 1 << 14)
  211. cacheid |= CACHEID_ASID_TAGGED;
  212. } else if (cachetype & (1 << 23))
  213. cacheid = CACHEID_VIPT_ALIASING;
  214. else
  215. cacheid = CACHEID_VIPT_NONALIASING;
  216. } else {
  217. cacheid = CACHEID_VIVT;
  218. }
  219. printk("CPU: %s data cache, %s instruction cache\n",
  220. cache_is_vivt() ? "VIVT" :
  221. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  222. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
  223. cache_is_vivt() ? "VIVT" :
  224. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  225. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  226. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  227. }
  228. /*
  229. * These functions re-use the assembly code in head.S, which
  230. * already provide the required functionality.
  231. */
  232. extern struct proc_info_list *lookup_processor_type(unsigned int);
  233. extern struct machine_desc *lookup_machine_type(unsigned int);
  234. static void __init setup_processor(void)
  235. {
  236. struct proc_info_list *list;
  237. /*
  238. * locate processor in the list of supported processor
  239. * types. The linker builds this table for us from the
  240. * entries in arch/arm/mm/proc-*.S
  241. */
  242. list = lookup_processor_type(read_cpuid_id());
  243. if (!list) {
  244. printk("CPU configuration botched (ID %08x), unable "
  245. "to continue.\n", read_cpuid_id());
  246. while (1);
  247. }
  248. cpu_name = list->cpu_name;
  249. #ifdef MULTI_CPU
  250. processor = *list->proc;
  251. #endif
  252. #ifdef MULTI_TLB
  253. cpu_tlb = *list->tlb;
  254. #endif
  255. #ifdef MULTI_USER
  256. cpu_user = *list->user;
  257. #endif
  258. #ifdef MULTI_CACHE
  259. cpu_cache = *list->cache;
  260. #endif
  261. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  262. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  263. proc_arch[cpu_architecture()], cr_alignment);
  264. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  265. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  266. elf_hwcap = list->elf_hwcap;
  267. #ifndef CONFIG_ARM_THUMB
  268. elf_hwcap &= ~HWCAP_THUMB;
  269. #endif
  270. cacheid_init();
  271. cpu_proc_init();
  272. }
  273. /*
  274. * cpu_init - initialise one CPU.
  275. *
  276. * cpu_init sets up the per-CPU stacks.
  277. */
  278. void cpu_init(void)
  279. {
  280. unsigned int cpu = smp_processor_id();
  281. struct stack *stk = &stacks[cpu];
  282. if (cpu >= NR_CPUS) {
  283. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  284. BUG();
  285. }
  286. /*
  287. * Define the placement constraint for the inline asm directive below.
  288. * In Thumb-2, msr with an immediate value is not allowed.
  289. */
  290. #ifdef CONFIG_THUMB2_KERNEL
  291. #define PLC "r"
  292. #else
  293. #define PLC "I"
  294. #endif
  295. /*
  296. * setup stacks for re-entrant exception handlers
  297. */
  298. __asm__ (
  299. "msr cpsr_c, %1\n\t"
  300. "add r14, %0, %2\n\t"
  301. "mov sp, r14\n\t"
  302. "msr cpsr_c, %3\n\t"
  303. "add r14, %0, %4\n\t"
  304. "mov sp, r14\n\t"
  305. "msr cpsr_c, %5\n\t"
  306. "add r14, %0, %6\n\t"
  307. "mov sp, r14\n\t"
  308. "msr cpsr_c, %7"
  309. :
  310. : "r" (stk),
  311. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  312. "I" (offsetof(struct stack, irq[0])),
  313. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  314. "I" (offsetof(struct stack, abt[0])),
  315. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  316. "I" (offsetof(struct stack, und[0])),
  317. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  318. : "r14");
  319. }
  320. static struct machine_desc * __init setup_machine(unsigned int nr)
  321. {
  322. struct machine_desc *list;
  323. /*
  324. * locate machine in the list of supported machines.
  325. */
  326. list = lookup_machine_type(nr);
  327. if (!list) {
  328. printk("Machine configuration botched (nr %d), unable "
  329. "to continue.\n", nr);
  330. while (1);
  331. }
  332. printk("Machine: %s\n", list->name);
  333. return list;
  334. }
  335. static int __init arm_add_memory(unsigned long start, unsigned long size)
  336. {
  337. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  338. if (meminfo.nr_banks >= NR_BANKS) {
  339. printk(KERN_CRIT "NR_BANKS too low, "
  340. "ignoring memory at %#lx\n", start);
  341. return -EINVAL;
  342. }
  343. /*
  344. * Ensure that start/size are aligned to a page boundary.
  345. * Size is appropriately rounded down, start is rounded up.
  346. */
  347. size -= start & ~PAGE_MASK;
  348. bank->start = PAGE_ALIGN(start);
  349. bank->size = size & PAGE_MASK;
  350. bank->node = PHYS_TO_NID(start);
  351. /*
  352. * Check whether this memory region has non-zero size or
  353. * invalid node number.
  354. */
  355. if (bank->size == 0 || bank->node >= MAX_NUMNODES)
  356. return -EINVAL;
  357. meminfo.nr_banks++;
  358. return 0;
  359. }
  360. /*
  361. * Pick out the memory size. We look for mem=size@start,
  362. * where start and size are "size[KkMm]"
  363. */
  364. static void __init early_mem(char **p)
  365. {
  366. static int usermem __initdata = 0;
  367. unsigned long size, start;
  368. /*
  369. * If the user specifies memory size, we
  370. * blow away any automatically generated
  371. * size.
  372. */
  373. if (usermem == 0) {
  374. usermem = 1;
  375. meminfo.nr_banks = 0;
  376. }
  377. start = PHYS_OFFSET;
  378. size = memparse(*p, p);
  379. if (**p == '@')
  380. start = memparse(*p + 1, p);
  381. arm_add_memory(start, size);
  382. }
  383. __early_param("mem=", early_mem);
  384. /*
  385. * Initial parsing of the command line.
  386. */
  387. static void __init parse_cmdline(char **cmdline_p, char *from)
  388. {
  389. char c = ' ', *to = command_line;
  390. int len = 0;
  391. for (;;) {
  392. if (c == ' ') {
  393. extern struct early_params __early_begin, __early_end;
  394. struct early_params *p;
  395. for (p = &__early_begin; p < &__early_end; p++) {
  396. int arglen = strlen(p->arg);
  397. if (memcmp(from, p->arg, arglen) == 0) {
  398. if (to != command_line)
  399. to -= 1;
  400. from += arglen;
  401. p->fn(&from);
  402. while (*from != ' ' && *from != '\0')
  403. from++;
  404. break;
  405. }
  406. }
  407. }
  408. c = *from++;
  409. if (!c)
  410. break;
  411. if (COMMAND_LINE_SIZE <= ++len)
  412. break;
  413. *to++ = c;
  414. }
  415. *to = '\0';
  416. *cmdline_p = command_line;
  417. }
  418. static void __init
  419. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  420. {
  421. #ifdef CONFIG_BLK_DEV_RAM
  422. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  423. rd_image_start = image_start;
  424. rd_prompt = prompt;
  425. rd_doload = doload;
  426. if (rd_sz)
  427. rd_size = rd_sz;
  428. #endif
  429. }
  430. static void __init
  431. request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
  432. {
  433. struct resource *res;
  434. int i;
  435. kernel_code.start = virt_to_phys(_text);
  436. kernel_code.end = virt_to_phys(_etext - 1);
  437. kernel_data.start = virt_to_phys(_data);
  438. kernel_data.end = virt_to_phys(_end - 1);
  439. for (i = 0; i < mi->nr_banks; i++) {
  440. if (mi->bank[i].size == 0)
  441. continue;
  442. res = alloc_bootmem_low(sizeof(*res));
  443. res->name = "System RAM";
  444. res->start = mi->bank[i].start;
  445. res->end = mi->bank[i].start + mi->bank[i].size - 1;
  446. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  447. request_resource(&iomem_resource, res);
  448. if (kernel_code.start >= res->start &&
  449. kernel_code.end <= res->end)
  450. request_resource(res, &kernel_code);
  451. if (kernel_data.start >= res->start &&
  452. kernel_data.end <= res->end)
  453. request_resource(res, &kernel_data);
  454. }
  455. if (mdesc->video_start) {
  456. video_ram.start = mdesc->video_start;
  457. video_ram.end = mdesc->video_end;
  458. request_resource(&iomem_resource, &video_ram);
  459. }
  460. /*
  461. * Some machines don't have the possibility of ever
  462. * possessing lp0, lp1 or lp2
  463. */
  464. if (mdesc->reserve_lp0)
  465. request_resource(&ioport_resource, &lp0);
  466. if (mdesc->reserve_lp1)
  467. request_resource(&ioport_resource, &lp1);
  468. if (mdesc->reserve_lp2)
  469. request_resource(&ioport_resource, &lp2);
  470. }
  471. /*
  472. * Tag parsing.
  473. *
  474. * This is the new way of passing data to the kernel at boot time. Rather
  475. * than passing a fixed inflexible structure to the kernel, we pass a list
  476. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  477. * tag for the list to be recognised (to distinguish the tagged list from
  478. * a param_struct). The list is terminated with a zero-length tag (this tag
  479. * is not parsed in any way).
  480. */
  481. static int __init parse_tag_core(const struct tag *tag)
  482. {
  483. if (tag->hdr.size > 2) {
  484. if ((tag->u.core.flags & 1) == 0)
  485. root_mountflags &= ~MS_RDONLY;
  486. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  487. }
  488. return 0;
  489. }
  490. __tagtable(ATAG_CORE, parse_tag_core);
  491. static int __init parse_tag_mem32(const struct tag *tag)
  492. {
  493. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  494. }
  495. __tagtable(ATAG_MEM, parse_tag_mem32);
  496. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  497. struct screen_info screen_info = {
  498. .orig_video_lines = 30,
  499. .orig_video_cols = 80,
  500. .orig_video_mode = 0,
  501. .orig_video_ega_bx = 0,
  502. .orig_video_isVGA = 1,
  503. .orig_video_points = 8
  504. };
  505. static int __init parse_tag_videotext(const struct tag *tag)
  506. {
  507. screen_info.orig_x = tag->u.videotext.x;
  508. screen_info.orig_y = tag->u.videotext.y;
  509. screen_info.orig_video_page = tag->u.videotext.video_page;
  510. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  511. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  512. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  513. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  514. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  515. screen_info.orig_video_points = tag->u.videotext.video_points;
  516. return 0;
  517. }
  518. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  519. #endif
  520. static int __init parse_tag_ramdisk(const struct tag *tag)
  521. {
  522. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  523. (tag->u.ramdisk.flags & 2) == 0,
  524. tag->u.ramdisk.start, tag->u.ramdisk.size);
  525. return 0;
  526. }
  527. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  528. static int __init parse_tag_serialnr(const struct tag *tag)
  529. {
  530. system_serial_low = tag->u.serialnr.low;
  531. system_serial_high = tag->u.serialnr.high;
  532. return 0;
  533. }
  534. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  535. static int __init parse_tag_revision(const struct tag *tag)
  536. {
  537. system_rev = tag->u.revision.rev;
  538. return 0;
  539. }
  540. __tagtable(ATAG_REVISION, parse_tag_revision);
  541. static int __init parse_tag_cmdline(const struct tag *tag)
  542. {
  543. strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
  544. return 0;
  545. }
  546. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  547. /*
  548. * Scan the tag table for this tag, and call its parse function.
  549. * The tag table is built by the linker from all the __tagtable
  550. * declarations.
  551. */
  552. static int __init parse_tag(const struct tag *tag)
  553. {
  554. extern struct tagtable __tagtable_begin, __tagtable_end;
  555. struct tagtable *t;
  556. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  557. if (tag->hdr.tag == t->tag) {
  558. t->parse(tag);
  559. break;
  560. }
  561. return t < &__tagtable_end;
  562. }
  563. /*
  564. * Parse all tags in the list, checking both the global and architecture
  565. * specific tag tables.
  566. */
  567. static void __init parse_tags(const struct tag *t)
  568. {
  569. for (; t->hdr.size; t = tag_next(t))
  570. if (!parse_tag(t))
  571. printk(KERN_WARNING
  572. "Ignoring unrecognised tag 0x%08x\n",
  573. t->hdr.tag);
  574. }
  575. /*
  576. * This holds our defaults.
  577. */
  578. static struct init_tags {
  579. struct tag_header hdr1;
  580. struct tag_core core;
  581. struct tag_header hdr2;
  582. struct tag_mem32 mem;
  583. struct tag_header hdr3;
  584. } init_tags __initdata = {
  585. { tag_size(tag_core), ATAG_CORE },
  586. { 1, PAGE_SIZE, 0xff },
  587. { tag_size(tag_mem32), ATAG_MEM },
  588. { MEM_SIZE, PHYS_OFFSET },
  589. { 0, ATAG_NONE }
  590. };
  591. static void (*init_machine)(void) __initdata;
  592. static int __init customize_machine(void)
  593. {
  594. /* customizes platform devices, or adds new ones */
  595. if (init_machine)
  596. init_machine();
  597. return 0;
  598. }
  599. arch_initcall(customize_machine);
  600. void __init setup_arch(char **cmdline_p)
  601. {
  602. struct tag *tags = (struct tag *)&init_tags;
  603. struct machine_desc *mdesc;
  604. char *from = default_command_line;
  605. unwind_init();
  606. setup_processor();
  607. mdesc = setup_machine(machine_arch_type);
  608. machine_name = mdesc->name;
  609. if (mdesc->soft_reboot)
  610. reboot_setup("s");
  611. if (__atags_pointer)
  612. tags = phys_to_virt(__atags_pointer);
  613. else if (mdesc->boot_params)
  614. tags = phys_to_virt(mdesc->boot_params);
  615. /*
  616. * If we have the old style parameters, convert them to
  617. * a tag list.
  618. */
  619. if (tags->hdr.tag != ATAG_CORE)
  620. convert_to_tag_list(tags);
  621. if (tags->hdr.tag != ATAG_CORE)
  622. tags = (struct tag *)&init_tags;
  623. if (mdesc->fixup)
  624. mdesc->fixup(mdesc, tags, &from, &meminfo);
  625. if (tags->hdr.tag == ATAG_CORE) {
  626. if (meminfo.nr_banks != 0)
  627. squash_mem_tags(tags);
  628. save_atags(tags);
  629. parse_tags(tags);
  630. }
  631. init_mm.start_code = (unsigned long) _text;
  632. init_mm.end_code = (unsigned long) _etext;
  633. init_mm.end_data = (unsigned long) _edata;
  634. init_mm.brk = (unsigned long) _end;
  635. memcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  636. boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
  637. parse_cmdline(cmdline_p, from);
  638. paging_init(mdesc);
  639. request_standard_resources(&meminfo, mdesc);
  640. #ifdef CONFIG_SMP
  641. smp_init_cpus();
  642. #endif
  643. cpu_init();
  644. tcm_init();
  645. /*
  646. * Set up various architecture-specific pointers
  647. */
  648. init_arch_irq = mdesc->init_irq;
  649. system_timer = mdesc->timer;
  650. init_machine = mdesc->init_machine;
  651. #ifdef CONFIG_VT
  652. #if defined(CONFIG_VGA_CONSOLE)
  653. conswitchp = &vga_con;
  654. #elif defined(CONFIG_DUMMY_CONSOLE)
  655. conswitchp = &dummy_con;
  656. #endif
  657. #endif
  658. early_trap_init();
  659. }
  660. static int __init topology_init(void)
  661. {
  662. int cpu;
  663. for_each_possible_cpu(cpu) {
  664. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  665. cpuinfo->cpu.hotpluggable = 1;
  666. register_cpu(&cpuinfo->cpu, cpu);
  667. }
  668. return 0;
  669. }
  670. subsys_initcall(topology_init);
  671. static const char *hwcap_str[] = {
  672. "swp",
  673. "half",
  674. "thumb",
  675. "26bit",
  676. "fastmult",
  677. "fpa",
  678. "vfp",
  679. "edsp",
  680. "java",
  681. "iwmmxt",
  682. "crunch",
  683. "thumbee",
  684. "neon",
  685. "vfpv3",
  686. "vfpv3d16",
  687. NULL
  688. };
  689. static int c_show(struct seq_file *m, void *v)
  690. {
  691. int i;
  692. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  693. cpu_name, read_cpuid_id() & 15, elf_platform);
  694. #if defined(CONFIG_SMP)
  695. for_each_online_cpu(i) {
  696. /*
  697. * glibc reads /proc/cpuinfo to determine the number of
  698. * online processors, looking for lines beginning with
  699. * "processor". Give glibc what it expects.
  700. */
  701. seq_printf(m, "processor\t: %d\n", i);
  702. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  703. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  704. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  705. }
  706. #else /* CONFIG_SMP */
  707. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  708. loops_per_jiffy / (500000/HZ),
  709. (loops_per_jiffy / (5000/HZ)) % 100);
  710. #endif
  711. /* dump out the processor features */
  712. seq_puts(m, "Features\t: ");
  713. for (i = 0; hwcap_str[i]; i++)
  714. if (elf_hwcap & (1 << i))
  715. seq_printf(m, "%s ", hwcap_str[i]);
  716. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  717. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  718. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  719. /* pre-ARM7 */
  720. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  721. } else {
  722. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  723. /* ARM7 */
  724. seq_printf(m, "CPU variant\t: 0x%02x\n",
  725. (read_cpuid_id() >> 16) & 127);
  726. } else {
  727. /* post-ARM7 */
  728. seq_printf(m, "CPU variant\t: 0x%x\n",
  729. (read_cpuid_id() >> 20) & 15);
  730. }
  731. seq_printf(m, "CPU part\t: 0x%03x\n",
  732. (read_cpuid_id() >> 4) & 0xfff);
  733. }
  734. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  735. seq_puts(m, "\n");
  736. seq_printf(m, "Hardware\t: %s\n", machine_name);
  737. seq_printf(m, "Revision\t: %04x\n", system_rev);
  738. seq_printf(m, "Serial\t\t: %08x%08x\n",
  739. system_serial_high, system_serial_low);
  740. return 0;
  741. }
  742. static void *c_start(struct seq_file *m, loff_t *pos)
  743. {
  744. return *pos < 1 ? (void *)1 : NULL;
  745. }
  746. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  747. {
  748. ++*pos;
  749. return NULL;
  750. }
  751. static void c_stop(struct seq_file *m, void *v)
  752. {
  753. }
  754. const struct seq_operations cpuinfo_op = {
  755. .start = c_start,
  756. .next = c_next,
  757. .stop = c_stop,
  758. .show = c_show
  759. };