entry-header.S 4.4 KB

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  1. #include <linux/init.h>
  2. #include <linux/linkage.h>
  3. #include <asm/assembler.h>
  4. #include <asm/asm-offsets.h>
  5. #include <asm/errno.h>
  6. #include <asm/thread_info.h>
  7. @ Bad Abort numbers
  8. @ -----------------
  9. @
  10. #define BAD_PREFETCH 0
  11. #define BAD_DATA 1
  12. #define BAD_ADDREXCPTN 2
  13. #define BAD_IRQ 3
  14. #define BAD_UNDEFINSTR 4
  15. @
  16. @ Most of the stack format comes from struct pt_regs, but with
  17. @ the addition of 8 bytes for storing syscall args 5 and 6.
  18. @ This _must_ remain a multiple of 8 for EABI.
  19. @
  20. #define S_OFF 8
  21. /*
  22. * The SWI code relies on the fact that R0 is at the bottom of the stack
  23. * (due to slow/fast restore user regs).
  24. */
  25. #if S_R0 != 0
  26. #error "Please fix"
  27. #endif
  28. .macro zero_fp
  29. #ifdef CONFIG_FRAME_POINTER
  30. mov fp, #0
  31. #endif
  32. .endm
  33. .macro alignment_trap, rtemp
  34. #ifdef CONFIG_ALIGNMENT_TRAP
  35. ldr \rtemp, .LCcralign
  36. ldr \rtemp, [\rtemp]
  37. mcr p15, 0, \rtemp, c1, c0
  38. #endif
  39. .endm
  40. @
  41. @ Store/load the USER SP and LR registers by switching to the SYS
  42. @ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
  43. @ available. Should only be called from SVC mode
  44. @
  45. .macro store_user_sp_lr, rd, rtemp, offset = 0
  46. mrs \rtemp, cpsr
  47. eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
  48. msr cpsr_c, \rtemp @ switch to the SYS mode
  49. str sp, [\rd, #\offset] @ save sp_usr
  50. str lr, [\rd, #\offset + 4] @ save lr_usr
  51. eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
  52. msr cpsr_c, \rtemp @ switch back to the SVC mode
  53. .endm
  54. .macro load_user_sp_lr, rd, rtemp, offset = 0
  55. mrs \rtemp, cpsr
  56. eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
  57. msr cpsr_c, \rtemp @ switch to the SYS mode
  58. ldr sp, [\rd, #\offset] @ load sp_usr
  59. ldr lr, [\rd, #\offset + 4] @ load lr_usr
  60. eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
  61. msr cpsr_c, \rtemp @ switch back to the SVC mode
  62. .endm
  63. #ifndef CONFIG_THUMB2_KERNEL
  64. .macro svc_exit, rpsr
  65. msr spsr_cxsf, \rpsr
  66. #if defined(CONFIG_CPU_32v6K)
  67. clrex @ clear the exclusive monitor
  68. ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
  69. #elif defined (CONFIG_CPU_V6)
  70. ldr r0, [sp]
  71. strex r1, r2, [sp] @ clear the exclusive monitor
  72. ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
  73. #else
  74. ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
  75. #endif
  76. .endm
  77. .macro restore_user_regs, fast = 0, offset = 0
  78. ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
  79. ldr lr, [sp, #\offset + S_PC]! @ get pc
  80. msr spsr_cxsf, r1 @ save in spsr_svc
  81. #if defined(CONFIG_CPU_32v6K)
  82. clrex @ clear the exclusive monitor
  83. #elif defined (CONFIG_CPU_V6)
  84. strex r1, r2, [sp] @ clear the exclusive monitor
  85. #endif
  86. .if \fast
  87. ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
  88. .else
  89. ldmdb sp, {r0 - lr}^ @ get calling r0 - lr
  90. .endif
  91. add sp, sp, #S_FRAME_SIZE - S_PC
  92. movs pc, lr @ return & move spsr_svc into cpsr
  93. .endm
  94. .macro get_thread_info, rd
  95. mov \rd, sp, lsr #13
  96. mov \rd, \rd, lsl #13
  97. .endm
  98. @
  99. @ 32-bit wide "mov pc, reg"
  100. @
  101. .macro movw_pc, reg
  102. mov pc, \reg
  103. .endm
  104. #else /* CONFIG_THUMB2_KERNEL */
  105. .macro svc_exit, rpsr
  106. clrex @ clear the exclusive monitor
  107. ldr r0, [sp, #S_SP] @ top of the stack
  108. ldr r1, [sp, #S_PC] @ return address
  109. tst r0, #4 @ orig stack 8-byte aligned?
  110. stmdb r0, {r1, \rpsr} @ rfe context
  111. ldmia sp, {r0 - r12}
  112. ldr lr, [sp, #S_LR]
  113. addeq sp, sp, #S_FRAME_SIZE - 8 @ aligned
  114. addne sp, sp, #S_FRAME_SIZE - 4 @ not aligned
  115. rfeia sp!
  116. .endm
  117. .macro restore_user_regs, fast = 0, offset = 0
  118. clrex @ clear the exclusive monitor
  119. mov r2, sp
  120. load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
  121. ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
  122. ldr lr, [sp, #\offset + S_PC] @ get pc
  123. add sp, sp, #\offset + S_SP
  124. msr spsr_cxsf, r1 @ save in spsr_svc
  125. .if \fast
  126. ldmdb sp, {r1 - r12} @ get calling r1 - r12
  127. .else
  128. ldmdb sp, {r0 - r12} @ get calling r0 - r12
  129. .endif
  130. add sp, sp, #S_FRAME_SIZE - S_SP
  131. movs pc, lr @ return & move spsr_svc into cpsr
  132. .endm
  133. .macro get_thread_info, rd
  134. mov \rd, sp
  135. lsr \rd, \rd, #13
  136. mov \rd, \rd, lsl #13
  137. .endm
  138. @
  139. @ 32-bit wide "mov pc, reg"
  140. @
  141. .macro movw_pc, reg
  142. mov pc, \reg
  143. nop
  144. .endm
  145. #endif /* !CONFIG_THUMB2_KERNEL */
  146. /*
  147. * These are the registers used in the syscall handler, and allow us to
  148. * have in theory up to 7 arguments to a function - r0 to r6.
  149. *
  150. * r7 is reserved for the system call number for thumb mode.
  151. *
  152. * Note that tbl == why is intentional.
  153. *
  154. * We must set at least "tsk" and "why" when calling ret_with_reschedule.
  155. */
  156. scno .req r7 @ syscall number
  157. tbl .req r8 @ syscall table pointer
  158. why .req r8 @ Linux syscall (!= 0)
  159. tsk .req r9 @ current thread_info