sleep.S 1.6 KB

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  1. /*
  2. * arch/arm/mach-tegra/sleep.S
  3. *
  4. * Copyright (c) 2010-2011, NVIDIA Corporation.
  5. * Copyright (c) 2011, Google, Inc.
  6. *
  7. * Author: Colin Cross <ccross@android.com>
  8. * Gary King <gking@nvidia.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but WITHOUT
  16. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  18. * more details.
  19. *
  20. * You should have received a copy of the GNU General Public License along
  21. * with this program; if not, write to the Free Software Foundation, Inc.,
  22. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  23. */
  24. #include <linux/linkage.h>
  25. #include <asm/assembler.h>
  26. #include <asm/cp15.h>
  27. #include "iomap.h"
  28. #include "flowctrl.h"
  29. #include "sleep.h"
  30. #ifdef CONFIG_PM_SLEEP
  31. /*
  32. * tegra_disable_clean_inv_dcache
  33. *
  34. * disable, clean & invalidate the D-cache
  35. *
  36. * Corrupted registers: r1-r3, r6, r8, r9-r11
  37. */
  38. ENTRY(tegra_disable_clean_inv_dcache)
  39. stmfd sp!, {r0, r4-r5, r7, r9-r11, lr}
  40. dmb @ ensure ordering
  41. /* Disable the D-cache */
  42. mrc p15, 0, r2, c1, c0, 0
  43. bic r2, r2, #CR_C
  44. mcr p15, 0, r2, c1, c0, 0
  45. isb
  46. /* Flush the D-cache */
  47. bl v7_flush_dcache_louis
  48. /* Trun off coherency */
  49. exit_smp r4, r5
  50. ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc}
  51. ENDPROC(tegra_disable_clean_inv_dcache)
  52. #endif