ad1848_lib.c 38 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of AD1848/AD1847/CS4248
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define SNDRV_MAIN_OBJECT_FILE
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/slab.h>
  27. #include <linux/ioport.h>
  28. #include <sound/core.h>
  29. #include <sound/ad1848.h>
  30. #include <sound/control.h>
  31. #include <sound/tlv.h>
  32. #include <sound/pcm_params.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  36. MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
  37. MODULE_LICENSE("GPL");
  38. #if 0
  39. #define SNDRV_DEBUG_MCE
  40. #endif
  41. /*
  42. * Some variables
  43. */
  44. static unsigned char freq_bits[14] = {
  45. /* 5510 */ 0x00 | AD1848_XTAL2,
  46. /* 6620 */ 0x0E | AD1848_XTAL2,
  47. /* 8000 */ 0x00 | AD1848_XTAL1,
  48. /* 9600 */ 0x0E | AD1848_XTAL1,
  49. /* 11025 */ 0x02 | AD1848_XTAL2,
  50. /* 16000 */ 0x02 | AD1848_XTAL1,
  51. /* 18900 */ 0x04 | AD1848_XTAL2,
  52. /* 22050 */ 0x06 | AD1848_XTAL2,
  53. /* 27042 */ 0x04 | AD1848_XTAL1,
  54. /* 32000 */ 0x06 | AD1848_XTAL1,
  55. /* 33075 */ 0x0C | AD1848_XTAL2,
  56. /* 37800 */ 0x08 | AD1848_XTAL2,
  57. /* 44100 */ 0x0A | AD1848_XTAL2,
  58. /* 48000 */ 0x0C | AD1848_XTAL1
  59. };
  60. static unsigned int rates[14] = {
  61. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  62. 27042, 32000, 33075, 37800, 44100, 48000
  63. };
  64. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  65. .count = ARRAY_SIZE(rates),
  66. .list = rates,
  67. .mask = 0,
  68. };
  69. static unsigned char snd_ad1848_original_image[16] =
  70. {
  71. 0x00, /* 00 - lic */
  72. 0x00, /* 01 - ric */
  73. 0x9f, /* 02 - la1ic */
  74. 0x9f, /* 03 - ra1ic */
  75. 0x9f, /* 04 - la2ic */
  76. 0x9f, /* 05 - ra2ic */
  77. 0xbf, /* 06 - loc */
  78. 0xbf, /* 07 - roc */
  79. 0x20, /* 08 - dfr */
  80. AD1848_AUTOCALIB, /* 09 - ic */
  81. 0x00, /* 0a - pc */
  82. 0x00, /* 0b - ti */
  83. 0x00, /* 0c - mi */
  84. 0x00, /* 0d - lbc */
  85. 0x00, /* 0e - dru */
  86. 0x00, /* 0f - drl */
  87. };
  88. /*
  89. * Basic I/O functions
  90. */
  91. static void snd_ad1848_wait(struct snd_ad1848 *chip)
  92. {
  93. int timeout;
  94. for (timeout = 250; timeout > 0; timeout--) {
  95. if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
  96. break;
  97. udelay(100);
  98. }
  99. }
  100. void snd_ad1848_out(struct snd_ad1848 *chip,
  101. unsigned char reg,
  102. unsigned char value)
  103. {
  104. snd_ad1848_wait(chip);
  105. #ifdef CONFIG_SND_DEBUG
  106. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  107. snd_printk(KERN_WARNING "auto calibration time out - "
  108. "reg = 0x%x, value = 0x%x\n", reg, value);
  109. #endif
  110. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  111. outb(chip->image[reg] = value, AD1848P(chip, REG));
  112. mb();
  113. snd_printdd("codec out - reg 0x%x = 0x%x\n",
  114. chip->mce_bit | reg, value);
  115. }
  116. EXPORT_SYMBOL(snd_ad1848_out);
  117. static void snd_ad1848_dout(struct snd_ad1848 *chip,
  118. unsigned char reg, unsigned char value)
  119. {
  120. snd_ad1848_wait(chip);
  121. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  122. outb(value, AD1848P(chip, REG));
  123. mb();
  124. }
  125. static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
  126. {
  127. snd_ad1848_wait(chip);
  128. #ifdef CONFIG_SND_DEBUG
  129. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  130. snd_printk(KERN_WARNING "auto calibration time out - "
  131. "reg = 0x%x\n", reg);
  132. #endif
  133. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  134. mb();
  135. return inb(AD1848P(chip, REG));
  136. }
  137. #if 0
  138. static void snd_ad1848_debug(struct snd_ad1848 *chip)
  139. {
  140. printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
  141. printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
  142. printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
  143. printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
  144. printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
  145. printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
  146. printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
  147. printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
  148. printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
  149. printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
  150. printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
  151. printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
  152. printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
  153. printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
  154. printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
  155. printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
  156. printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
  157. printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
  158. }
  159. #endif
  160. /*
  161. * AD1848 detection / MCE routines
  162. */
  163. static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
  164. {
  165. unsigned long flags;
  166. int timeout;
  167. snd_ad1848_wait(chip);
  168. #ifdef CONFIG_SND_DEBUG
  169. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  170. snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
  171. #endif
  172. spin_lock_irqsave(&chip->reg_lock, flags);
  173. chip->mce_bit |= AD1848_MCE;
  174. timeout = inb(AD1848P(chip, REGSEL));
  175. if (timeout == 0x80)
  176. snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
  177. if (!(timeout & AD1848_MCE))
  178. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  179. spin_unlock_irqrestore(&chip->reg_lock, flags);
  180. }
  181. static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
  182. {
  183. unsigned long flags;
  184. int timeout;
  185. signed long time;
  186. spin_lock_irqsave(&chip->reg_lock, flags);
  187. for (timeout = 5; timeout > 0; timeout--)
  188. inb(AD1848P(chip, REGSEL));
  189. /* end of cleanup sequence */
  190. for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  191. udelay(100);
  192. snd_printdd("(1) timeout = %d\n", timeout);
  193. #ifdef CONFIG_SND_DEBUG
  194. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  195. snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
  196. #endif
  197. chip->mce_bit &= ~AD1848_MCE;
  198. timeout = inb(AD1848P(chip, REGSEL));
  199. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  200. if (timeout == 0x80)
  201. snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
  202. if ((timeout & AD1848_MCE) == 0) {
  203. spin_unlock_irqrestore(&chip->reg_lock, flags);
  204. return;
  205. }
  206. /*
  207. * Wait for (possible -- during init auto-calibration may not be set)
  208. * calibration process to start. Needs upto 5 sample periods on AD1848
  209. * which at the slowest possible rate of 5.5125 kHz means 907 us.
  210. */
  211. msleep(1);
  212. snd_printdd("(2) jiffies = %lu\n", jiffies);
  213. time = msecs_to_jiffies(250);
  214. while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
  215. spin_unlock_irqrestore(&chip->reg_lock, flags);
  216. if (time <= 0) {
  217. snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
  218. return;
  219. }
  220. time = schedule_timeout(time);
  221. spin_lock_irqsave(&chip->reg_lock, flags);
  222. }
  223. snd_printdd("(3) jiffies = %lu\n", jiffies);
  224. time = msecs_to_jiffies(100);
  225. while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
  226. spin_unlock_irqrestore(&chip->reg_lock, flags);
  227. if (time <= 0) {
  228. snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
  229. return;
  230. }
  231. time = schedule_timeout(time);
  232. spin_lock_irqsave(&chip->reg_lock, flags);
  233. }
  234. spin_unlock_irqrestore(&chip->reg_lock, flags);
  235. snd_printdd("(4) jiffies = %lu\n", jiffies);
  236. snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
  237. }
  238. static unsigned int snd_ad1848_get_count(unsigned char format,
  239. unsigned int size)
  240. {
  241. switch (format & 0xe0) {
  242. case AD1848_LINEAR_16:
  243. size >>= 1;
  244. break;
  245. }
  246. if (format & AD1848_STEREO)
  247. size >>= 1;
  248. return size;
  249. }
  250. static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
  251. int channel, int cmd)
  252. {
  253. int result = 0;
  254. #if 0
  255. printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
  256. #endif
  257. spin_lock(&chip->reg_lock);
  258. if (cmd == SNDRV_PCM_TRIGGER_START) {
  259. if (chip->image[AD1848_IFACE_CTRL] & what) {
  260. spin_unlock(&chip->reg_lock);
  261. return 0;
  262. }
  263. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
  264. chip->mode |= AD1848_MODE_RUNNING;
  265. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  266. if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
  267. spin_unlock(&chip->reg_lock);
  268. return 0;
  269. }
  270. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
  271. chip->mode &= ~AD1848_MODE_RUNNING;
  272. } else {
  273. result = -EINVAL;
  274. }
  275. spin_unlock(&chip->reg_lock);
  276. return result;
  277. }
  278. /*
  279. * CODEC I/O
  280. */
  281. static unsigned char snd_ad1848_get_rate(unsigned int rate)
  282. {
  283. int i;
  284. for (i = 0; i < ARRAY_SIZE(rates); i++)
  285. if (rate == rates[i])
  286. return freq_bits[i];
  287. snd_BUG();
  288. return freq_bits[ARRAY_SIZE(rates) - 1];
  289. }
  290. static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
  291. unsigned int cmd, void *arg)
  292. {
  293. return snd_pcm_lib_ioctl(substream, cmd, arg);
  294. }
  295. static unsigned char snd_ad1848_get_format(int format, int channels)
  296. {
  297. unsigned char rformat;
  298. rformat = AD1848_LINEAR_8;
  299. switch (format) {
  300. case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
  301. case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
  302. case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
  303. }
  304. if (channels > 1)
  305. rformat |= AD1848_STEREO;
  306. #if 0
  307. snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
  308. #endif
  309. return rformat;
  310. }
  311. static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
  312. {
  313. unsigned long flags;
  314. mute = mute ? 1 : 0;
  315. spin_lock_irqsave(&chip->reg_lock, flags);
  316. if (chip->calibrate_mute == mute) {
  317. spin_unlock_irqrestore(&chip->reg_lock, flags);
  318. return;
  319. }
  320. if (!mute) {
  321. snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
  322. snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
  323. }
  324. snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
  325. snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
  326. snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
  327. snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
  328. snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
  329. snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
  330. chip->calibrate_mute = mute;
  331. spin_unlock_irqrestore(&chip->reg_lock, flags);
  332. }
  333. static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
  334. {
  335. if (hw_params == NULL) {
  336. chip->image[AD1848_DATA_FORMAT] = 0x20;
  337. } else {
  338. chip->image[AD1848_DATA_FORMAT] =
  339. snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
  340. snd_ad1848_get_rate(params_rate(hw_params));
  341. }
  342. // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
  343. }
  344. static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
  345. {
  346. unsigned long flags;
  347. mutex_lock(&chip->open_mutex);
  348. if (chip->mode & AD1848_MODE_OPEN) {
  349. mutex_unlock(&chip->open_mutex);
  350. return -EAGAIN;
  351. }
  352. snd_ad1848_mce_down(chip);
  353. #ifdef SNDRV_DEBUG_MCE
  354. snd_printk("open: (1)\n");
  355. #endif
  356. snd_ad1848_mce_up(chip);
  357. spin_lock_irqsave(&chip->reg_lock, flags);
  358. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  359. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
  360. AD1848_CALIB_MODE);
  361. chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
  362. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  363. spin_unlock_irqrestore(&chip->reg_lock, flags);
  364. snd_ad1848_mce_down(chip);
  365. #ifdef SNDRV_DEBUG_MCE
  366. snd_printk("open: (2)\n");
  367. #endif
  368. snd_ad1848_set_data_format(chip, NULL);
  369. snd_ad1848_mce_up(chip);
  370. spin_lock_irqsave(&chip->reg_lock, flags);
  371. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  372. spin_unlock_irqrestore(&chip->reg_lock, flags);
  373. snd_ad1848_mce_down(chip);
  374. #ifdef SNDRV_DEBUG_MCE
  375. snd_printk("open: (3)\n");
  376. #endif
  377. /* ok. now enable and ack CODEC IRQ */
  378. spin_lock_irqsave(&chip->reg_lock, flags);
  379. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  380. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  381. chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
  382. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  383. spin_unlock_irqrestore(&chip->reg_lock, flags);
  384. chip->mode = mode;
  385. mutex_unlock(&chip->open_mutex);
  386. return 0;
  387. }
  388. static void snd_ad1848_close(struct snd_ad1848 *chip)
  389. {
  390. unsigned long flags;
  391. mutex_lock(&chip->open_mutex);
  392. if (!chip->mode) {
  393. mutex_unlock(&chip->open_mutex);
  394. return;
  395. }
  396. /* disable IRQ */
  397. spin_lock_irqsave(&chip->reg_lock, flags);
  398. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  399. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  400. chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
  401. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  402. spin_unlock_irqrestore(&chip->reg_lock, flags);
  403. /* now disable capture & playback */
  404. snd_ad1848_mce_up(chip);
  405. spin_lock_irqsave(&chip->reg_lock, flags);
  406. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  407. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  408. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  409. spin_unlock_irqrestore(&chip->reg_lock, flags);
  410. snd_ad1848_mce_down(chip);
  411. /* clear IRQ again */
  412. spin_lock_irqsave(&chip->reg_lock, flags);
  413. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  414. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  415. spin_unlock_irqrestore(&chip->reg_lock, flags);
  416. chip->mode = 0;
  417. mutex_unlock(&chip->open_mutex);
  418. }
  419. /*
  420. * ok.. exported functions..
  421. */
  422. static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
  423. int cmd)
  424. {
  425. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  426. return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
  427. }
  428. static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
  429. int cmd)
  430. {
  431. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  432. return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
  433. }
  434. static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
  435. struct snd_pcm_hw_params *hw_params)
  436. {
  437. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  438. unsigned long flags;
  439. int err;
  440. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  441. return err;
  442. snd_ad1848_calibrate_mute(chip, 1);
  443. snd_ad1848_set_data_format(chip, hw_params);
  444. snd_ad1848_mce_up(chip);
  445. spin_lock_irqsave(&chip->reg_lock, flags);
  446. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  447. spin_unlock_irqrestore(&chip->reg_lock, flags);
  448. snd_ad1848_mce_down(chip);
  449. snd_ad1848_calibrate_mute(chip, 0);
  450. return 0;
  451. }
  452. static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
  453. {
  454. return snd_pcm_lib_free_pages(substream);
  455. }
  456. static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
  457. {
  458. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  459. struct snd_pcm_runtime *runtime = substream->runtime;
  460. unsigned long flags;
  461. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  462. unsigned int count = snd_pcm_lib_period_bytes(substream);
  463. chip->dma_size = size;
  464. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
  465. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  466. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  467. spin_lock_irqsave(&chip->reg_lock, flags);
  468. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  469. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  470. spin_unlock_irqrestore(&chip->reg_lock, flags);
  471. return 0;
  472. }
  473. static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
  474. struct snd_pcm_hw_params *hw_params)
  475. {
  476. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  477. unsigned long flags;
  478. int err;
  479. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  480. return err;
  481. snd_ad1848_calibrate_mute(chip, 1);
  482. snd_ad1848_set_data_format(chip, hw_params);
  483. snd_ad1848_mce_up(chip);
  484. spin_lock_irqsave(&chip->reg_lock, flags);
  485. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  486. spin_unlock_irqrestore(&chip->reg_lock, flags);
  487. snd_ad1848_mce_down(chip);
  488. snd_ad1848_calibrate_mute(chip, 0);
  489. return 0;
  490. }
  491. static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
  492. {
  493. return snd_pcm_lib_free_pages(substream);
  494. }
  495. static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
  496. {
  497. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  498. struct snd_pcm_runtime *runtime = substream->runtime;
  499. unsigned long flags;
  500. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  501. unsigned int count = snd_pcm_lib_period_bytes(substream);
  502. chip->dma_size = size;
  503. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  504. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  505. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  506. spin_lock_irqsave(&chip->reg_lock, flags);
  507. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  508. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  509. spin_unlock_irqrestore(&chip->reg_lock, flags);
  510. return 0;
  511. }
  512. static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
  513. {
  514. struct snd_ad1848 *chip = dev_id;
  515. if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
  516. (chip->mode & AD1848_MODE_RUNNING))
  517. snd_pcm_period_elapsed(chip->playback_substream);
  518. if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
  519. (chip->mode & AD1848_MODE_RUNNING))
  520. snd_pcm_period_elapsed(chip->capture_substream);
  521. outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
  522. return IRQ_HANDLED;
  523. }
  524. static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
  525. {
  526. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  527. size_t ptr;
  528. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
  529. return 0;
  530. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  531. return bytes_to_frames(substream->runtime, ptr);
  532. }
  533. static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
  534. {
  535. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  536. size_t ptr;
  537. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
  538. return 0;
  539. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  540. return bytes_to_frames(substream->runtime, ptr);
  541. }
  542. /*
  543. */
  544. static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
  545. int tmp;
  546. if (!chip->thinkpad_flag) return;
  547. outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
  548. tmp = inb(AD1848_THINKPAD_CTL_PORT2);
  549. if (on)
  550. /* turn it on */
  551. tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
  552. else
  553. /* turn it off */
  554. tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
  555. outb(tmp, AD1848_THINKPAD_CTL_PORT2);
  556. }
  557. #ifdef CONFIG_PM
  558. static void snd_ad1848_suspend(struct snd_ad1848 *chip)
  559. {
  560. snd_pcm_suspend_all(chip->pcm);
  561. if (chip->thinkpad_flag)
  562. snd_ad1848_thinkpad_twiddle(chip, 0);
  563. }
  564. static void snd_ad1848_resume(struct snd_ad1848 *chip)
  565. {
  566. int i;
  567. if (chip->thinkpad_flag)
  568. snd_ad1848_thinkpad_twiddle(chip, 1);
  569. /* clear any pendings IRQ */
  570. inb(AD1848P(chip, STATUS));
  571. outb(0, AD1848P(chip, STATUS));
  572. mb();
  573. snd_ad1848_mce_down(chip);
  574. for (i = 0; i < 16; i++)
  575. snd_ad1848_out(chip, i, chip->image[i]);
  576. snd_ad1848_mce_up(chip);
  577. snd_ad1848_mce_down(chip);
  578. }
  579. #endif /* CONFIG_PM */
  580. static int snd_ad1848_probe(struct snd_ad1848 * chip)
  581. {
  582. unsigned long flags;
  583. int i, id, rev, ad1847;
  584. unsigned char *ptr;
  585. #if 0
  586. snd_ad1848_debug(chip);
  587. #endif
  588. id = ad1847 = 0;
  589. for (i = 0; i < 1000; i++) {
  590. mb();
  591. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  592. udelay(500);
  593. else {
  594. spin_lock_irqsave(&chip->reg_lock, flags);
  595. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  596. snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
  597. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
  598. rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
  599. if (rev == 0x65) {
  600. spin_unlock_irqrestore(&chip->reg_lock, flags);
  601. id = 1;
  602. ad1847 = 1;
  603. break;
  604. }
  605. if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
  606. spin_unlock_irqrestore(&chip->reg_lock, flags);
  607. id = 1;
  608. break;
  609. }
  610. spin_unlock_irqrestore(&chip->reg_lock, flags);
  611. }
  612. }
  613. if (id != 1)
  614. return -ENODEV; /* no valid device found */
  615. if (chip->hardware == AD1848_HW_DETECT) {
  616. if (ad1847) {
  617. chip->hardware = AD1848_HW_AD1847;
  618. } else {
  619. chip->hardware = AD1848_HW_AD1848;
  620. rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
  621. if (rev & 0x80) {
  622. chip->hardware = AD1848_HW_CS4248;
  623. } else if ((rev & 0x0f) == 0x0a) {
  624. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
  625. for (i = 0; i < 16; ++i) {
  626. if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
  627. chip->hardware = AD1848_HW_CMI8330;
  628. break;
  629. }
  630. }
  631. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  632. }
  633. }
  634. }
  635. spin_lock_irqsave(&chip->reg_lock, flags);
  636. inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
  637. outb(0, AD1848P(chip, STATUS));
  638. mb();
  639. spin_unlock_irqrestore(&chip->reg_lock, flags);
  640. chip->image[AD1848_MISC_INFO] = 0x00;
  641. chip->image[AD1848_IFACE_CTRL] =
  642. (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
  643. ptr = (unsigned char *) &chip->image;
  644. snd_ad1848_mce_down(chip);
  645. spin_lock_irqsave(&chip->reg_lock, flags);
  646. for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
  647. snd_ad1848_out(chip, i, *ptr++);
  648. spin_unlock_irqrestore(&chip->reg_lock, flags);
  649. snd_ad1848_mce_up(chip);
  650. snd_ad1848_mce_down(chip);
  651. return 0; /* all things are ok.. */
  652. }
  653. /*
  654. */
  655. static struct snd_pcm_hardware snd_ad1848_playback =
  656. {
  657. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  658. SNDRV_PCM_INFO_MMAP_VALID),
  659. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  660. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  661. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  662. .rate_min = 5510,
  663. .rate_max = 48000,
  664. .channels_min = 1,
  665. .channels_max = 2,
  666. .buffer_bytes_max = (128*1024),
  667. .period_bytes_min = 64,
  668. .period_bytes_max = (128*1024),
  669. .periods_min = 1,
  670. .periods_max = 1024,
  671. .fifo_size = 0,
  672. };
  673. static struct snd_pcm_hardware snd_ad1848_capture =
  674. {
  675. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  676. SNDRV_PCM_INFO_MMAP_VALID),
  677. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  678. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  679. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  680. .rate_min = 5510,
  681. .rate_max = 48000,
  682. .channels_min = 1,
  683. .channels_max = 2,
  684. .buffer_bytes_max = (128*1024),
  685. .period_bytes_min = 64,
  686. .period_bytes_max = (128*1024),
  687. .periods_min = 1,
  688. .periods_max = 1024,
  689. .fifo_size = 0,
  690. };
  691. /*
  692. */
  693. static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
  694. {
  695. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  696. struct snd_pcm_runtime *runtime = substream->runtime;
  697. int err;
  698. if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
  699. return err;
  700. chip->playback_substream = substream;
  701. runtime->hw = snd_ad1848_playback;
  702. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  703. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  704. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  705. return 0;
  706. }
  707. static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
  708. {
  709. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  710. struct snd_pcm_runtime *runtime = substream->runtime;
  711. int err;
  712. if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
  713. return err;
  714. chip->capture_substream = substream;
  715. runtime->hw = snd_ad1848_capture;
  716. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  717. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  718. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  719. return 0;
  720. }
  721. static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
  722. {
  723. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  724. chip->mode &= ~AD1848_MODE_PLAY;
  725. chip->playback_substream = NULL;
  726. snd_ad1848_close(chip);
  727. return 0;
  728. }
  729. static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
  730. {
  731. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  732. chip->mode &= ~AD1848_MODE_CAPTURE;
  733. chip->capture_substream = NULL;
  734. snd_ad1848_close(chip);
  735. return 0;
  736. }
  737. static int snd_ad1848_free(struct snd_ad1848 *chip)
  738. {
  739. release_and_free_resource(chip->res_port);
  740. if (chip->irq >= 0)
  741. free_irq(chip->irq, (void *) chip);
  742. if (chip->dma >= 0) {
  743. snd_dma_disable(chip->dma);
  744. free_dma(chip->dma);
  745. }
  746. kfree(chip);
  747. return 0;
  748. }
  749. static int snd_ad1848_dev_free(struct snd_device *device)
  750. {
  751. struct snd_ad1848 *chip = device->device_data;
  752. return snd_ad1848_free(chip);
  753. }
  754. static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
  755. {
  756. switch (chip->hardware) {
  757. case AD1848_HW_AD1847: return "AD1847";
  758. case AD1848_HW_AD1848: return "AD1848";
  759. case AD1848_HW_CS4248: return "CS4248";
  760. case AD1848_HW_CMI8330: return "CMI8330/C3D";
  761. default: return "???";
  762. }
  763. }
  764. int snd_ad1848_create(struct snd_card *card,
  765. unsigned long port,
  766. int irq, int dma,
  767. unsigned short hardware,
  768. struct snd_ad1848 ** rchip)
  769. {
  770. static struct snd_device_ops ops = {
  771. .dev_free = snd_ad1848_dev_free,
  772. };
  773. struct snd_ad1848 *chip;
  774. int err;
  775. *rchip = NULL;
  776. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  777. if (chip == NULL)
  778. return -ENOMEM;
  779. spin_lock_init(&chip->reg_lock);
  780. mutex_init(&chip->open_mutex);
  781. chip->card = card;
  782. chip->port = port;
  783. chip->irq = -1;
  784. chip->dma = -1;
  785. chip->hardware = hardware;
  786. memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
  787. if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
  788. snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
  789. snd_ad1848_free(chip);
  790. return -EBUSY;
  791. }
  792. if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
  793. snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
  794. snd_ad1848_free(chip);
  795. return -EBUSY;
  796. }
  797. chip->irq = irq;
  798. if (request_dma(dma, "AD1848")) {
  799. snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
  800. snd_ad1848_free(chip);
  801. return -EBUSY;
  802. }
  803. chip->dma = dma;
  804. if (hardware == AD1848_HW_THINKPAD) {
  805. chip->thinkpad_flag = 1;
  806. chip->hardware = AD1848_HW_DETECT; /* reset */
  807. snd_ad1848_thinkpad_twiddle(chip, 1);
  808. }
  809. if (snd_ad1848_probe(chip) < 0) {
  810. snd_ad1848_free(chip);
  811. return -ENODEV;
  812. }
  813. /* Register device */
  814. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  815. snd_ad1848_free(chip);
  816. return err;
  817. }
  818. #ifdef CONFIG_PM
  819. chip->suspend = snd_ad1848_suspend;
  820. chip->resume = snd_ad1848_resume;
  821. #endif
  822. *rchip = chip;
  823. return 0;
  824. }
  825. EXPORT_SYMBOL(snd_ad1848_create);
  826. static struct snd_pcm_ops snd_ad1848_playback_ops = {
  827. .open = snd_ad1848_playback_open,
  828. .close = snd_ad1848_playback_close,
  829. .ioctl = snd_ad1848_ioctl,
  830. .hw_params = snd_ad1848_playback_hw_params,
  831. .hw_free = snd_ad1848_playback_hw_free,
  832. .prepare = snd_ad1848_playback_prepare,
  833. .trigger = snd_ad1848_playback_trigger,
  834. .pointer = snd_ad1848_playback_pointer,
  835. };
  836. static struct snd_pcm_ops snd_ad1848_capture_ops = {
  837. .open = snd_ad1848_capture_open,
  838. .close = snd_ad1848_capture_close,
  839. .ioctl = snd_ad1848_ioctl,
  840. .hw_params = snd_ad1848_capture_hw_params,
  841. .hw_free = snd_ad1848_capture_hw_free,
  842. .prepare = snd_ad1848_capture_prepare,
  843. .trigger = snd_ad1848_capture_trigger,
  844. .pointer = snd_ad1848_capture_pointer,
  845. };
  846. int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
  847. {
  848. struct snd_pcm *pcm;
  849. int err;
  850. if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
  851. return err;
  852. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
  853. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
  854. pcm->private_data = chip;
  855. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  856. strcpy(pcm->name, snd_ad1848_chip_id(chip));
  857. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  858. snd_dma_isa_data(),
  859. 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
  860. chip->pcm = pcm;
  861. if (rpcm)
  862. *rpcm = pcm;
  863. return 0;
  864. }
  865. EXPORT_SYMBOL(snd_ad1848_pcm);
  866. const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
  867. {
  868. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  869. &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
  870. }
  871. EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
  872. /*
  873. * MIXER part
  874. */
  875. static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  876. {
  877. static char *texts[4] = {
  878. "Line", "Aux", "Mic", "Mix"
  879. };
  880. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  881. uinfo->count = 2;
  882. uinfo->value.enumerated.items = 4;
  883. if (uinfo->value.enumerated.item > 3)
  884. uinfo->value.enumerated.item = 3;
  885. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  886. return 0;
  887. }
  888. static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  889. {
  890. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  891. unsigned long flags;
  892. spin_lock_irqsave(&chip->reg_lock, flags);
  893. ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
  894. ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
  895. spin_unlock_irqrestore(&chip->reg_lock, flags);
  896. return 0;
  897. }
  898. static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  899. {
  900. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  901. unsigned long flags;
  902. unsigned short left, right;
  903. int change;
  904. if (ucontrol->value.enumerated.item[0] > 3 ||
  905. ucontrol->value.enumerated.item[1] > 3)
  906. return -EINVAL;
  907. left = ucontrol->value.enumerated.item[0] << 6;
  908. right = ucontrol->value.enumerated.item[1] << 6;
  909. spin_lock_irqsave(&chip->reg_lock, flags);
  910. left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
  911. right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
  912. change = left != chip->image[AD1848_LEFT_INPUT] ||
  913. right != chip->image[AD1848_RIGHT_INPUT];
  914. snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
  915. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
  916. spin_unlock_irqrestore(&chip->reg_lock, flags);
  917. return change;
  918. }
  919. static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  920. {
  921. int mask = (kcontrol->private_value >> 16) & 0xff;
  922. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  923. uinfo->count = 1;
  924. uinfo->value.integer.min = 0;
  925. uinfo->value.integer.max = mask;
  926. return 0;
  927. }
  928. static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  929. {
  930. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  931. unsigned long flags;
  932. int reg = kcontrol->private_value & 0xff;
  933. int shift = (kcontrol->private_value >> 8) & 0xff;
  934. int mask = (kcontrol->private_value >> 16) & 0xff;
  935. int invert = (kcontrol->private_value >> 24) & 0xff;
  936. spin_lock_irqsave(&chip->reg_lock, flags);
  937. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  938. spin_unlock_irqrestore(&chip->reg_lock, flags);
  939. if (invert)
  940. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  941. return 0;
  942. }
  943. static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  944. {
  945. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  946. unsigned long flags;
  947. int reg = kcontrol->private_value & 0xff;
  948. int shift = (kcontrol->private_value >> 8) & 0xff;
  949. int mask = (kcontrol->private_value >> 16) & 0xff;
  950. int invert = (kcontrol->private_value >> 24) & 0xff;
  951. int change;
  952. unsigned short val;
  953. val = (ucontrol->value.integer.value[0] & mask);
  954. if (invert)
  955. val = mask - val;
  956. val <<= shift;
  957. spin_lock_irqsave(&chip->reg_lock, flags);
  958. val = (chip->image[reg] & ~(mask << shift)) | val;
  959. change = val != chip->image[reg];
  960. snd_ad1848_out(chip, reg, val);
  961. spin_unlock_irqrestore(&chip->reg_lock, flags);
  962. return change;
  963. }
  964. static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  965. {
  966. int mask = (kcontrol->private_value >> 24) & 0xff;
  967. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  968. uinfo->count = 2;
  969. uinfo->value.integer.min = 0;
  970. uinfo->value.integer.max = mask;
  971. return 0;
  972. }
  973. static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  974. {
  975. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  976. unsigned long flags;
  977. int left_reg = kcontrol->private_value & 0xff;
  978. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  979. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  980. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  981. int mask = (kcontrol->private_value >> 24) & 0xff;
  982. int invert = (kcontrol->private_value >> 22) & 1;
  983. spin_lock_irqsave(&chip->reg_lock, flags);
  984. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  985. ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
  986. spin_unlock_irqrestore(&chip->reg_lock, flags);
  987. if (invert) {
  988. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  989. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  990. }
  991. return 0;
  992. }
  993. static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  994. {
  995. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  996. unsigned long flags;
  997. int left_reg = kcontrol->private_value & 0xff;
  998. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  999. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1000. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1001. int mask = (kcontrol->private_value >> 24) & 0xff;
  1002. int invert = (kcontrol->private_value >> 22) & 1;
  1003. int change;
  1004. unsigned short val1, val2;
  1005. val1 = ucontrol->value.integer.value[0] & mask;
  1006. val2 = ucontrol->value.integer.value[1] & mask;
  1007. if (invert) {
  1008. val1 = mask - val1;
  1009. val2 = mask - val2;
  1010. }
  1011. val1 <<= shift_left;
  1012. val2 <<= shift_right;
  1013. spin_lock_irqsave(&chip->reg_lock, flags);
  1014. if (left_reg != right_reg) {
  1015. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1016. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1017. change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
  1018. snd_ad1848_out(chip, left_reg, val1);
  1019. snd_ad1848_out(chip, right_reg, val2);
  1020. } else {
  1021. val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1022. change = val1 != chip->image[left_reg];
  1023. snd_ad1848_out(chip, left_reg, val1);
  1024. }
  1025. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1026. return change;
  1027. }
  1028. /*
  1029. */
  1030. int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
  1031. const struct ad1848_mix_elem *c)
  1032. {
  1033. static struct snd_kcontrol_new newctls[] = {
  1034. [AD1848_MIX_SINGLE] = {
  1035. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1036. .info = snd_ad1848_info_single,
  1037. .get = snd_ad1848_get_single,
  1038. .put = snd_ad1848_put_single,
  1039. },
  1040. [AD1848_MIX_DOUBLE] = {
  1041. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1042. .info = snd_ad1848_info_double,
  1043. .get = snd_ad1848_get_double,
  1044. .put = snd_ad1848_put_double,
  1045. },
  1046. [AD1848_MIX_CAPTURE] = {
  1047. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1048. .info = snd_ad1848_info_mux,
  1049. .get = snd_ad1848_get_mux,
  1050. .put = snd_ad1848_put_mux,
  1051. },
  1052. };
  1053. struct snd_kcontrol *ctl;
  1054. int err;
  1055. ctl = snd_ctl_new1(&newctls[c->type], chip);
  1056. if (! ctl)
  1057. return -ENOMEM;
  1058. strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
  1059. ctl->id.index = c->index;
  1060. ctl->private_value = c->private_value;
  1061. if (c->tlv) {
  1062. ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  1063. ctl->tlv.p = c->tlv;
  1064. }
  1065. if ((err = snd_ctl_add(chip->card, ctl)) < 0)
  1066. return err;
  1067. return 0;
  1068. }
  1069. EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
  1070. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  1071. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  1072. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  1073. static struct ad1848_mix_elem snd_ad1848_controls[] = {
  1074. AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
  1075. AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
  1076. db_scale_6bit),
  1077. AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1078. AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  1079. db_scale_5bit_12db_max),
  1080. AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1081. AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  1082. db_scale_5bit_12db_max),
  1083. AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
  1084. db_scale_rec_gain),
  1085. {
  1086. .name = "Capture Source",
  1087. .type = AD1848_MIX_CAPTURE,
  1088. },
  1089. AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
  1090. AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
  1091. db_scale_6bit),
  1092. };
  1093. int snd_ad1848_mixer(struct snd_ad1848 *chip)
  1094. {
  1095. struct snd_card *card;
  1096. struct snd_pcm *pcm;
  1097. unsigned int idx;
  1098. int err;
  1099. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1100. pcm = chip->pcm;
  1101. card = chip->card;
  1102. strcpy(card->mixername, pcm->name);
  1103. for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
  1104. if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
  1105. return err;
  1106. return 0;
  1107. }
  1108. EXPORT_SYMBOL(snd_ad1848_mixer);
  1109. /*
  1110. * INIT part
  1111. */
  1112. static int __init alsa_ad1848_init(void)
  1113. {
  1114. return 0;
  1115. }
  1116. static void __exit alsa_ad1848_exit(void)
  1117. {
  1118. }
  1119. module_init(alsa_ad1848_init)
  1120. module_exit(alsa_ad1848_exit)