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linux-vybrid_pu...
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arch
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arm
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mach-spear3xx
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include
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mach
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spear.h

spear.h 2.2 KB
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  1. /*
    2. 

  2.  * SPEAr3xx/6xx Machine family specific definition
    3. 

  3.  *
    4. 

  4.  * Copyright (C) 2009,2012 ST Microelectronics
    5. 

  5.  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
    6. 

  6.  * Viresh Kumar <viresh.linux@gmail.com>
    7. 

  7.  *
    8. 

  8.  * This file is licensed under the terms of the GNU General Public
    9. 

  9.  * License version 2. This program is licensed "as is" without any
    10. 

  10.  * warranty of any kind, whether express or implied.
    11. 

  11.  */
    12. 

  12. 

  13. #ifndef __MACH_SPEAR_H
    14. 

  14. #define __MACH_SPEAR_H
    15. 

  15. 

  16. #include <asm/memory.h>
    17. 

  17. 

  18. /* ICM1 - Low speed connection */
    19. 

  19. #define SPEAR_ICM1_2_BASE		UL(0xD0000000)
    20. 

  20. #define VA_SPEAR_ICM1_2_BASE		UL(0xFD000000)
    21. 

  21. #define SPEAR_ICM1_UART_BASE		UL(0xD0000000)
    22. 

  22. #define VA_SPEAR_ICM1_UART_BASE		(VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
    23. 

  23. #define SPEAR3XX_ICM1_SSP_BASE		UL(0xD0100000)
    24. 

  24. 

  25. /* ML-1, 2 - Multi Layer CPU Subsystem */
    26. 

  26. #define SPEAR_ICM3_ML1_2_BASE		UL(0xF0000000)
    27. 

  27. #define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)
    28. 

  28. 

  29. /* ICM3 - Basic Subsystem */
    30. 

  30. #define SPEAR_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
    31. 

  31. #define VA_SPEAR_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
    32. 

  32. #define SPEAR_ICM3_DMA_BASE		UL(0xFC400000)
    33. 

  33. #define SPEAR_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)
    34. 

  34. #define VA_SPEAR_ICM3_SYS_CTRL_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
    35. 

  35. #define SPEAR_ICM3_MISC_REG_BASE	UL(0xFCA80000)
    36. 

  36. #define VA_SPEAR_ICM3_MISC_REG_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
    37. 

  37. 

  38. /* Debug uart for linux, will be used for debug and uncompress messages */
    39. 

  39. #define SPEAR_DBG_UART_BASE		SPEAR_ICM1_UART_BASE
    40. 

  40. #define VA_SPEAR_DBG_UART_BASE		VA_SPEAR_ICM1_UART_BASE
    41. 

  41. 

  42. /* Sysctl base for spear platform */
    43. 

  43. #define SPEAR_SYS_CTRL_BASE		SPEAR_ICM3_SYS_CTRL_BASE
    44. 

  44. #define VA_SPEAR_SYS_CTRL_BASE		VA_SPEAR_ICM3_SYS_CTRL_BASE
    45. 

  45. 

  46. /* SPEAr320 Macros */
    47. 

  47. #define SPEAR320_SOC_CONFIG_BASE	UL(0xB3000000)
    48. 

  48. #define VA_SPEAR320_SOC_CONFIG_BASE	UL(0xFE000000)
    49. 

  49. #define SPEAR320_CONTROL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
    50. 

  50. #define SPEAR320_EXT_CTRL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
    51. 

  51. 	#define SPEAR320_UARTX_PCLK_MASK		0x1
    52. 

  52. 	#define SPEAR320_UART2_PCLK_SHIFT		8
    53. 

  53. 	#define SPEAR320_UART3_PCLK_SHIFT		9
    54. 

  54. 	#define SPEAR320_UART4_PCLK_SHIFT		10
    55. 

  55. 	#define SPEAR320_UART5_PCLK_SHIFT		11
    56. 

  56. 	#define SPEAR320_UART6_PCLK_SHIFT		12
    57. 

  57. 	#define SPEAR320_RS485_PCLK_SHIFT		13
    58. 

  58. 

  59. #endif /* __MACH_SPEAR_H */
    60.