vmwgfx_kms.c 49 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  31. {
  32. if (du->cursor_surface)
  33. vmw_surface_unreference(&du->cursor_surface);
  34. if (du->cursor_dmabuf)
  35. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  36. drm_crtc_cleanup(&du->crtc);
  37. drm_encoder_cleanup(&du->encoder);
  38. drm_connector_cleanup(&du->connector);
  39. }
  40. /*
  41. * Display Unit Cursor functions
  42. */
  43. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  44. u32 *image, u32 width, u32 height,
  45. u32 hotspotX, u32 hotspotY)
  46. {
  47. struct {
  48. u32 cmd;
  49. SVGAFifoCmdDefineAlphaCursor cursor;
  50. } *cmd;
  51. u32 image_size = width * height * 4;
  52. u32 cmd_size = sizeof(*cmd) + image_size;
  53. if (!image)
  54. return -EINVAL;
  55. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  56. if (unlikely(cmd == NULL)) {
  57. DRM_ERROR("Fifo reserve failed.\n");
  58. return -ENOMEM;
  59. }
  60. memset(cmd, 0, sizeof(*cmd));
  61. memcpy(&cmd[1], image, image_size);
  62. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  63. cmd->cursor.id = cpu_to_le32(0);
  64. cmd->cursor.width = cpu_to_le32(width);
  65. cmd->cursor.height = cpu_to_le32(height);
  66. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  67. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  68. vmw_fifo_commit(dev_priv, cmd_size);
  69. return 0;
  70. }
  71. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  72. bool show, int x, int y)
  73. {
  74. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  75. uint32_t count;
  76. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  77. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  78. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  79. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  80. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  81. }
  82. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  83. uint32_t handle, uint32_t width, uint32_t height)
  84. {
  85. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  86. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  87. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  88. struct vmw_surface *surface = NULL;
  89. struct vmw_dma_buffer *dmabuf = NULL;
  90. int ret;
  91. if (handle) {
  92. ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
  93. handle, &surface);
  94. if (!ret) {
  95. if (!surface->snooper.image) {
  96. DRM_ERROR("surface not suitable for cursor\n");
  97. vmw_surface_unreference(&surface);
  98. return -EINVAL;
  99. }
  100. } else {
  101. ret = vmw_user_dmabuf_lookup(tfile,
  102. handle, &dmabuf);
  103. if (ret) {
  104. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  105. return -EINVAL;
  106. }
  107. }
  108. }
  109. /* takedown old cursor */
  110. if (du->cursor_surface) {
  111. du->cursor_surface->snooper.crtc = NULL;
  112. vmw_surface_unreference(&du->cursor_surface);
  113. }
  114. if (du->cursor_dmabuf)
  115. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  116. /* setup new image */
  117. if (surface) {
  118. /* vmw_user_surface_lookup takes one reference */
  119. du->cursor_surface = surface;
  120. du->cursor_surface->snooper.crtc = crtc;
  121. du->cursor_age = du->cursor_surface->snooper.age;
  122. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  123. 64, 64, du->hotspot_x, du->hotspot_y);
  124. } else if (dmabuf) {
  125. struct ttm_bo_kmap_obj map;
  126. unsigned long kmap_offset;
  127. unsigned long kmap_num;
  128. void *virtual;
  129. bool dummy;
  130. /* vmw_user_surface_lookup takes one reference */
  131. du->cursor_dmabuf = dmabuf;
  132. kmap_offset = 0;
  133. kmap_num = (64*64*4) >> PAGE_SHIFT;
  134. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  135. if (unlikely(ret != 0)) {
  136. DRM_ERROR("reserve failed\n");
  137. return -EINVAL;
  138. }
  139. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  140. if (unlikely(ret != 0))
  141. goto err_unreserve;
  142. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  143. vmw_cursor_update_image(dev_priv, virtual, 64, 64,
  144. du->hotspot_x, du->hotspot_y);
  145. ttm_bo_kunmap(&map);
  146. err_unreserve:
  147. ttm_bo_unreserve(&dmabuf->base);
  148. } else {
  149. vmw_cursor_update_position(dev_priv, false, 0, 0);
  150. return 0;
  151. }
  152. vmw_cursor_update_position(dev_priv, true,
  153. du->cursor_x + du->hotspot_x,
  154. du->cursor_y + du->hotspot_y);
  155. return 0;
  156. }
  157. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  158. {
  159. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  160. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  161. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  162. du->cursor_x = x + crtc->x;
  163. du->cursor_y = y + crtc->y;
  164. vmw_cursor_update_position(dev_priv, shown,
  165. du->cursor_x + du->hotspot_x,
  166. du->cursor_y + du->hotspot_y);
  167. return 0;
  168. }
  169. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  170. struct ttm_object_file *tfile,
  171. struct ttm_buffer_object *bo,
  172. SVGA3dCmdHeader *header)
  173. {
  174. struct ttm_bo_kmap_obj map;
  175. unsigned long kmap_offset;
  176. unsigned long kmap_num;
  177. SVGA3dCopyBox *box;
  178. unsigned box_count;
  179. void *virtual;
  180. bool dummy;
  181. struct vmw_dma_cmd {
  182. SVGA3dCmdHeader header;
  183. SVGA3dCmdSurfaceDMA dma;
  184. } *cmd;
  185. int ret;
  186. cmd = container_of(header, struct vmw_dma_cmd, header);
  187. /* No snooper installed */
  188. if (!srf->snooper.image)
  189. return;
  190. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  191. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  192. return;
  193. }
  194. if (cmd->header.size < 64) {
  195. DRM_ERROR("at least one full copy box must be given\n");
  196. return;
  197. }
  198. box = (SVGA3dCopyBox *)&cmd[1];
  199. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  200. sizeof(SVGA3dCopyBox);
  201. if (cmd->dma.guest.pitch != (64 * 4) ||
  202. cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  203. box->x != 0 || box->y != 0 || box->z != 0 ||
  204. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  205. box->w != 64 || box->h != 64 || box->d != 1 ||
  206. box_count != 1) {
  207. /* TODO handle none page aligned offsets */
  208. /* TODO handle partial uploads and pitch != 256 */
  209. /* TODO handle more then one copy (size != 64) */
  210. DRM_ERROR("lazy programmer, can't handle weird stuff\n");
  211. return;
  212. }
  213. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  214. kmap_num = (64*64*4) >> PAGE_SHIFT;
  215. ret = ttm_bo_reserve(bo, true, false, false, 0);
  216. if (unlikely(ret != 0)) {
  217. DRM_ERROR("reserve failed\n");
  218. return;
  219. }
  220. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  221. if (unlikely(ret != 0))
  222. goto err_unreserve;
  223. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  224. memcpy(srf->snooper.image, virtual, 64*64*4);
  225. srf->snooper.age++;
  226. /* we can't call this function from this function since execbuf has
  227. * reserved fifo space.
  228. *
  229. * if (srf->snooper.crtc)
  230. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  231. * srf->snooper.image, 64, 64,
  232. * du->hotspot_x, du->hotspot_y);
  233. */
  234. ttm_bo_kunmap(&map);
  235. err_unreserve:
  236. ttm_bo_unreserve(bo);
  237. }
  238. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  239. {
  240. struct drm_device *dev = dev_priv->dev;
  241. struct vmw_display_unit *du;
  242. struct drm_crtc *crtc;
  243. mutex_lock(&dev->mode_config.mutex);
  244. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  245. du = vmw_crtc_to_du(crtc);
  246. if (!du->cursor_surface ||
  247. du->cursor_age == du->cursor_surface->snooper.age)
  248. continue;
  249. du->cursor_age = du->cursor_surface->snooper.age;
  250. vmw_cursor_update_image(dev_priv,
  251. du->cursor_surface->snooper.image,
  252. 64, 64, du->hotspot_x, du->hotspot_y);
  253. }
  254. mutex_unlock(&dev->mode_config.mutex);
  255. }
  256. /*
  257. * Generic framebuffer code
  258. */
  259. int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
  260. struct drm_file *file_priv,
  261. unsigned int *handle)
  262. {
  263. if (handle)
  264. handle = 0;
  265. return 0;
  266. }
  267. /*
  268. * Surface framebuffer code
  269. */
  270. #define vmw_framebuffer_to_vfbs(x) \
  271. container_of(x, struct vmw_framebuffer_surface, base.base)
  272. struct vmw_framebuffer_surface {
  273. struct vmw_framebuffer base;
  274. struct vmw_surface *surface;
  275. struct vmw_dma_buffer *buffer;
  276. struct list_head head;
  277. struct drm_master *master;
  278. };
  279. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  280. {
  281. struct vmw_framebuffer_surface *vfbs =
  282. vmw_framebuffer_to_vfbs(framebuffer);
  283. struct vmw_master *vmaster = vmw_master(vfbs->master);
  284. mutex_lock(&vmaster->fb_surf_mutex);
  285. list_del(&vfbs->head);
  286. mutex_unlock(&vmaster->fb_surf_mutex);
  287. drm_master_put(&vfbs->master);
  288. drm_framebuffer_cleanup(framebuffer);
  289. vmw_surface_unreference(&vfbs->surface);
  290. ttm_base_object_unref(&vfbs->base.user_obj);
  291. kfree(vfbs);
  292. }
  293. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  294. struct drm_file *file_priv,
  295. struct vmw_framebuffer *framebuffer,
  296. unsigned flags, unsigned color,
  297. struct drm_clip_rect *clips,
  298. unsigned num_clips, int inc)
  299. {
  300. struct drm_clip_rect *clips_ptr;
  301. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  302. struct drm_crtc *crtc;
  303. size_t fifo_size;
  304. int i, num_units;
  305. int ret = 0; /* silence warning */
  306. int left, right, top, bottom;
  307. struct {
  308. SVGA3dCmdHeader header;
  309. SVGA3dCmdBlitSurfaceToScreen body;
  310. } *cmd;
  311. SVGASignedRect *blits;
  312. num_units = 0;
  313. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  314. head) {
  315. if (crtc->fb != &framebuffer->base)
  316. continue;
  317. units[num_units++] = vmw_crtc_to_du(crtc);
  318. }
  319. BUG_ON(!clips || !num_clips);
  320. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  321. cmd = kzalloc(fifo_size, GFP_KERNEL);
  322. if (unlikely(cmd == NULL)) {
  323. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  324. return -ENOMEM;
  325. }
  326. left = clips->x1;
  327. right = clips->x2;
  328. top = clips->y1;
  329. bottom = clips->y2;
  330. clips_ptr = clips;
  331. for (i = 1; i < num_clips; i++, clips_ptr += inc) {
  332. left = min_t(int, left, (int)clips_ptr->x1);
  333. right = max_t(int, right, (int)clips_ptr->x2);
  334. top = min_t(int, top, (int)clips_ptr->y1);
  335. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  336. }
  337. /* only need to do this once */
  338. memset(cmd, 0, fifo_size);
  339. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  340. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  341. cmd->body.srcRect.left = left;
  342. cmd->body.srcRect.right = right;
  343. cmd->body.srcRect.top = top;
  344. cmd->body.srcRect.bottom = bottom;
  345. clips_ptr = clips;
  346. blits = (SVGASignedRect *)&cmd[1];
  347. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  348. blits[i].left = clips_ptr->x1 - left;
  349. blits[i].right = clips_ptr->x2 - left;
  350. blits[i].top = clips_ptr->y1 - top;
  351. blits[i].bottom = clips_ptr->y2 - top;
  352. }
  353. /* do per unit writing, reuse fifo for each */
  354. for (i = 0; i < num_units; i++) {
  355. struct vmw_display_unit *unit = units[i];
  356. int clip_x1 = left - unit->crtc.x;
  357. int clip_y1 = top - unit->crtc.y;
  358. int clip_x2 = right - unit->crtc.x;
  359. int clip_y2 = bottom - unit->crtc.y;
  360. /* skip any crtcs that misses the clip region */
  361. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  362. clip_y1 >= unit->crtc.mode.vdisplay ||
  363. clip_x2 <= 0 || clip_y2 <= 0)
  364. continue;
  365. /* need to reset sid as it is changed by execbuf */
  366. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  367. cmd->body.destScreenId = unit->unit;
  368. /*
  369. * The blit command is a lot more resilient then the
  370. * readback command when it comes to clip rects. So its
  371. * okay to go out of bounds.
  372. */
  373. cmd->body.destRect.left = clip_x1;
  374. cmd->body.destRect.right = clip_x2;
  375. cmd->body.destRect.top = clip_y1;
  376. cmd->body.destRect.bottom = clip_y2;
  377. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  378. fifo_size, 0, NULL);
  379. if (unlikely(ret != 0))
  380. break;
  381. }
  382. kfree(cmd);
  383. return ret;
  384. }
  385. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  386. struct drm_file *file_priv,
  387. unsigned flags, unsigned color,
  388. struct drm_clip_rect *clips,
  389. unsigned num_clips)
  390. {
  391. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  392. struct vmw_master *vmaster = vmw_master(file_priv->master);
  393. struct vmw_framebuffer_surface *vfbs =
  394. vmw_framebuffer_to_vfbs(framebuffer);
  395. struct drm_clip_rect norect;
  396. int ret, inc = 1;
  397. if (unlikely(vfbs->master != file_priv->master))
  398. return -EINVAL;
  399. /* Require ScreenObject support for 3D */
  400. if (!dev_priv->sou_priv)
  401. return -EINVAL;
  402. ret = ttm_read_lock(&vmaster->lock, true);
  403. if (unlikely(ret != 0))
  404. return ret;
  405. if (!num_clips) {
  406. num_clips = 1;
  407. clips = &norect;
  408. norect.x1 = norect.y1 = 0;
  409. norect.x2 = framebuffer->width;
  410. norect.y2 = framebuffer->height;
  411. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  412. num_clips /= 2;
  413. inc = 2; /* skip source rects */
  414. }
  415. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  416. flags, color,
  417. clips, num_clips, inc);
  418. ttm_read_unlock(&vmaster->lock);
  419. return 0;
  420. }
  421. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  422. .destroy = vmw_framebuffer_surface_destroy,
  423. .dirty = vmw_framebuffer_surface_dirty,
  424. .create_handle = vmw_framebuffer_create_handle,
  425. };
  426. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  427. struct drm_file *file_priv,
  428. struct vmw_surface *surface,
  429. struct vmw_framebuffer **out,
  430. const struct drm_mode_fb_cmd
  431. *mode_cmd)
  432. {
  433. struct drm_device *dev = dev_priv->dev;
  434. struct vmw_framebuffer_surface *vfbs;
  435. enum SVGA3dSurfaceFormat format;
  436. struct vmw_master *vmaster = vmw_master(file_priv->master);
  437. int ret;
  438. /* 3D is only supported on HWv8 hosts which supports screen objects */
  439. if (!dev_priv->sou_priv)
  440. return -ENOSYS;
  441. /*
  442. * Sanity checks.
  443. */
  444. if (unlikely(surface->mip_levels[0] != 1 ||
  445. surface->num_sizes != 1 ||
  446. surface->sizes[0].width < mode_cmd->width ||
  447. surface->sizes[0].height < mode_cmd->height ||
  448. surface->sizes[0].depth != 1)) {
  449. DRM_ERROR("Incompatible surface dimensions "
  450. "for requested mode.\n");
  451. return -EINVAL;
  452. }
  453. switch (mode_cmd->depth) {
  454. case 32:
  455. format = SVGA3D_A8R8G8B8;
  456. break;
  457. case 24:
  458. format = SVGA3D_X8R8G8B8;
  459. break;
  460. case 16:
  461. format = SVGA3D_R5G6B5;
  462. break;
  463. case 15:
  464. format = SVGA3D_A1R5G5B5;
  465. break;
  466. case 8:
  467. format = SVGA3D_LUMINANCE8;
  468. break;
  469. default:
  470. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  471. return -EINVAL;
  472. }
  473. if (unlikely(format != surface->format)) {
  474. DRM_ERROR("Invalid surface format for requested mode.\n");
  475. return -EINVAL;
  476. }
  477. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  478. if (!vfbs) {
  479. ret = -ENOMEM;
  480. goto out_err1;
  481. }
  482. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  483. &vmw_framebuffer_surface_funcs);
  484. if (ret)
  485. goto out_err2;
  486. if (!vmw_surface_reference(surface)) {
  487. DRM_ERROR("failed to reference surface %p\n", surface);
  488. goto out_err3;
  489. }
  490. /* XXX get the first 3 from the surface info */
  491. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  492. vfbs->base.base.pitch = mode_cmd->pitch;
  493. vfbs->base.base.depth = mode_cmd->depth;
  494. vfbs->base.base.width = mode_cmd->width;
  495. vfbs->base.base.height = mode_cmd->height;
  496. vfbs->surface = surface;
  497. vfbs->base.user_handle = mode_cmd->handle;
  498. vfbs->master = drm_master_get(file_priv->master);
  499. mutex_lock(&vmaster->fb_surf_mutex);
  500. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  501. mutex_unlock(&vmaster->fb_surf_mutex);
  502. *out = &vfbs->base;
  503. return 0;
  504. out_err3:
  505. drm_framebuffer_cleanup(&vfbs->base.base);
  506. out_err2:
  507. kfree(vfbs);
  508. out_err1:
  509. return ret;
  510. }
  511. /*
  512. * Dmabuf framebuffer code
  513. */
  514. #define vmw_framebuffer_to_vfbd(x) \
  515. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  516. struct vmw_framebuffer_dmabuf {
  517. struct vmw_framebuffer base;
  518. struct vmw_dma_buffer *buffer;
  519. };
  520. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  521. {
  522. struct vmw_framebuffer_dmabuf *vfbd =
  523. vmw_framebuffer_to_vfbd(framebuffer);
  524. drm_framebuffer_cleanup(framebuffer);
  525. vmw_dmabuf_unreference(&vfbd->buffer);
  526. ttm_base_object_unref(&vfbd->base.user_obj);
  527. kfree(vfbd);
  528. }
  529. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  530. struct vmw_framebuffer *framebuffer,
  531. unsigned flags, unsigned color,
  532. struct drm_clip_rect *clips,
  533. unsigned num_clips, int increment)
  534. {
  535. size_t fifo_size;
  536. int i;
  537. struct {
  538. uint32_t header;
  539. SVGAFifoCmdUpdate body;
  540. } *cmd;
  541. fifo_size = sizeof(*cmd) * num_clips;
  542. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  543. if (unlikely(cmd == NULL)) {
  544. DRM_ERROR("Fifo reserve failed.\n");
  545. return -ENOMEM;
  546. }
  547. memset(cmd, 0, fifo_size);
  548. for (i = 0; i < num_clips; i++, clips += increment) {
  549. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  550. cmd[i].body.x = cpu_to_le32(clips->x1);
  551. cmd[i].body.y = cpu_to_le32(clips->y1);
  552. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  553. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  554. }
  555. vmw_fifo_commit(dev_priv, fifo_size);
  556. return 0;
  557. }
  558. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  559. struct vmw_private *dev_priv,
  560. struct vmw_framebuffer *framebuffer)
  561. {
  562. int depth = framebuffer->base.depth;
  563. size_t fifo_size;
  564. int ret;
  565. struct {
  566. uint32_t header;
  567. SVGAFifoCmdDefineGMRFB body;
  568. } *cmd;
  569. /* Emulate RGBA support, contrary to svga_reg.h this is not
  570. * supported by hosts. This is only a problem if we are reading
  571. * this value later and expecting what we uploaded back.
  572. */
  573. if (depth == 32)
  574. depth = 24;
  575. fifo_size = sizeof(*cmd);
  576. cmd = kmalloc(fifo_size, GFP_KERNEL);
  577. if (unlikely(cmd == NULL)) {
  578. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  579. return -ENOMEM;
  580. }
  581. memset(cmd, 0, fifo_size);
  582. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  583. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  584. cmd->body.format.colorDepth = depth;
  585. cmd->body.format.reserved = 0;
  586. cmd->body.bytesPerLine = framebuffer->base.pitch;
  587. cmd->body.ptr.gmrId = framebuffer->user_handle;
  588. cmd->body.ptr.offset = 0;
  589. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  590. fifo_size, 0, NULL);
  591. kfree(cmd);
  592. return ret;
  593. }
  594. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  595. struct vmw_private *dev_priv,
  596. struct vmw_framebuffer *framebuffer,
  597. unsigned flags, unsigned color,
  598. struct drm_clip_rect *clips,
  599. unsigned num_clips, int increment)
  600. {
  601. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  602. struct drm_clip_rect *clips_ptr;
  603. int i, k, num_units, ret;
  604. struct drm_crtc *crtc;
  605. size_t fifo_size;
  606. struct {
  607. uint32_t header;
  608. SVGAFifoCmdBlitGMRFBToScreen body;
  609. } *blits;
  610. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  611. if (unlikely(ret != 0))
  612. return ret; /* define_gmrfb prints warnings */
  613. fifo_size = sizeof(*blits) * num_clips;
  614. blits = kmalloc(fifo_size, GFP_KERNEL);
  615. if (unlikely(blits == NULL)) {
  616. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  617. return -ENOMEM;
  618. }
  619. num_units = 0;
  620. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  621. if (crtc->fb != &framebuffer->base)
  622. continue;
  623. units[num_units++] = vmw_crtc_to_du(crtc);
  624. }
  625. for (k = 0; k < num_units; k++) {
  626. struct vmw_display_unit *unit = units[k];
  627. int hit_num = 0;
  628. clips_ptr = clips;
  629. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  630. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  631. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  632. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  633. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  634. /* skip any crtcs that misses the clip region */
  635. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  636. clip_y1 >= unit->crtc.mode.vdisplay ||
  637. clip_x2 <= 0 || clip_y2 <= 0)
  638. continue;
  639. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  640. blits[hit_num].body.destScreenId = unit->unit;
  641. blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
  642. blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
  643. blits[hit_num].body.destRect.left = clip_x1;
  644. blits[hit_num].body.destRect.top = clip_y1;
  645. blits[hit_num].body.destRect.right = clip_x2;
  646. blits[hit_num].body.destRect.bottom = clip_y2;
  647. hit_num++;
  648. }
  649. /* no clips hit the crtc */
  650. if (hit_num == 0)
  651. continue;
  652. fifo_size = sizeof(*blits) * hit_num;
  653. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  654. fifo_size, 0, NULL);
  655. if (unlikely(ret != 0))
  656. break;
  657. }
  658. kfree(blits);
  659. return ret;
  660. }
  661. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  662. struct drm_file *file_priv,
  663. unsigned flags, unsigned color,
  664. struct drm_clip_rect *clips,
  665. unsigned num_clips)
  666. {
  667. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  668. struct vmw_master *vmaster = vmw_master(file_priv->master);
  669. struct vmw_framebuffer_dmabuf *vfbd =
  670. vmw_framebuffer_to_vfbd(framebuffer);
  671. struct drm_clip_rect norect;
  672. int ret, increment = 1;
  673. ret = ttm_read_lock(&vmaster->lock, true);
  674. if (unlikely(ret != 0))
  675. return ret;
  676. if (!num_clips) {
  677. num_clips = 1;
  678. clips = &norect;
  679. norect.x1 = norect.y1 = 0;
  680. norect.x2 = framebuffer->width;
  681. norect.y2 = framebuffer->height;
  682. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  683. num_clips /= 2;
  684. increment = 2;
  685. }
  686. if (dev_priv->ldu_priv) {
  687. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  688. flags, color,
  689. clips, num_clips, increment);
  690. } else {
  691. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  692. flags, color,
  693. clips, num_clips, increment);
  694. }
  695. ttm_read_unlock(&vmaster->lock);
  696. return ret;
  697. }
  698. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  699. .destroy = vmw_framebuffer_dmabuf_destroy,
  700. .dirty = vmw_framebuffer_dmabuf_dirty,
  701. .create_handle = vmw_framebuffer_create_handle,
  702. };
  703. /**
  704. * Pin the dmabuffer to the start of vram.
  705. */
  706. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  707. {
  708. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  709. struct vmw_framebuffer_dmabuf *vfbd =
  710. vmw_framebuffer_to_vfbd(&vfb->base);
  711. int ret;
  712. /* This code should not be used with screen objects */
  713. BUG_ON(dev_priv->sou_priv);
  714. vmw_overlay_pause_all(dev_priv);
  715. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  716. vmw_overlay_resume_all(dev_priv);
  717. WARN_ON(ret != 0);
  718. return 0;
  719. }
  720. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  721. {
  722. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  723. struct vmw_framebuffer_dmabuf *vfbd =
  724. vmw_framebuffer_to_vfbd(&vfb->base);
  725. if (!vfbd->buffer) {
  726. WARN_ON(!vfbd->buffer);
  727. return 0;
  728. }
  729. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  730. }
  731. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  732. struct vmw_dma_buffer *dmabuf,
  733. struct vmw_framebuffer **out,
  734. const struct drm_mode_fb_cmd
  735. *mode_cmd)
  736. {
  737. struct drm_device *dev = dev_priv->dev;
  738. struct vmw_framebuffer_dmabuf *vfbd;
  739. unsigned int requested_size;
  740. int ret;
  741. requested_size = mode_cmd->height * mode_cmd->pitch;
  742. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  743. DRM_ERROR("Screen buffer object size is too small "
  744. "for requested mode.\n");
  745. return -EINVAL;
  746. }
  747. /* Limited framebuffer color depth support for screen objects */
  748. if (dev_priv->sou_priv) {
  749. switch (mode_cmd->depth) {
  750. case 32:
  751. case 24:
  752. /* Only support 32 bpp for 32 and 24 depth fbs */
  753. if (mode_cmd->bpp == 32)
  754. break;
  755. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  756. mode_cmd->depth, mode_cmd->bpp);
  757. return -EINVAL;
  758. case 16:
  759. case 15:
  760. /* Only support 16 bpp for 16 and 15 depth fbs */
  761. if (mode_cmd->bpp == 16)
  762. break;
  763. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  764. mode_cmd->depth, mode_cmd->bpp);
  765. return -EINVAL;
  766. default:
  767. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  768. return -EINVAL;
  769. }
  770. }
  771. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  772. if (!vfbd) {
  773. ret = -ENOMEM;
  774. goto out_err1;
  775. }
  776. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  777. &vmw_framebuffer_dmabuf_funcs);
  778. if (ret)
  779. goto out_err2;
  780. if (!vmw_dmabuf_reference(dmabuf)) {
  781. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  782. goto out_err3;
  783. }
  784. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  785. vfbd->base.base.pitch = mode_cmd->pitch;
  786. vfbd->base.base.depth = mode_cmd->depth;
  787. vfbd->base.base.width = mode_cmd->width;
  788. vfbd->base.base.height = mode_cmd->height;
  789. if (!dev_priv->sou_priv) {
  790. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  791. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  792. }
  793. vfbd->base.dmabuf = true;
  794. vfbd->buffer = dmabuf;
  795. vfbd->base.user_handle = mode_cmd->handle;
  796. *out = &vfbd->base;
  797. return 0;
  798. out_err3:
  799. drm_framebuffer_cleanup(&vfbd->base.base);
  800. out_err2:
  801. kfree(vfbd);
  802. out_err1:
  803. return ret;
  804. }
  805. /*
  806. * Generic Kernel modesetting functions
  807. */
  808. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  809. struct drm_file *file_priv,
  810. struct drm_mode_fb_cmd *mode_cmd)
  811. {
  812. struct vmw_private *dev_priv = vmw_priv(dev);
  813. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  814. struct vmw_framebuffer *vfb = NULL;
  815. struct vmw_surface *surface = NULL;
  816. struct vmw_dma_buffer *bo = NULL;
  817. struct ttm_base_object *user_obj;
  818. u64 required_size;
  819. int ret;
  820. /**
  821. * This code should be conditioned on Screen Objects not being used.
  822. * If screen objects are used, we can allocate a GMR to hold the
  823. * requested framebuffer.
  824. */
  825. required_size = mode_cmd->pitch * mode_cmd->height;
  826. if (unlikely(required_size > (u64) dev_priv->vram_size)) {
  827. DRM_ERROR("VRAM size is too small for requested mode.\n");
  828. return ERR_PTR(-ENOMEM);
  829. }
  830. /*
  831. * Take a reference on the user object of the resource
  832. * backing the kms fb. This ensures that user-space handle
  833. * lookups on that resource will always work as long as
  834. * it's registered with a kms framebuffer. This is important,
  835. * since vmw_execbuf_process identifies resources in the
  836. * command stream using user-space handles.
  837. */
  838. user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
  839. if (unlikely(user_obj == NULL)) {
  840. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  841. return ERR_PTR(-ENOENT);
  842. }
  843. /**
  844. * End conditioned code.
  845. */
  846. ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
  847. mode_cmd->handle, &surface);
  848. if (ret)
  849. goto try_dmabuf;
  850. if (!surface->scanout)
  851. goto err_not_scanout;
  852. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
  853. &vfb, mode_cmd);
  854. /* vmw_user_surface_lookup takes one ref so does new_fb */
  855. vmw_surface_unreference(&surface);
  856. if (ret) {
  857. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  858. ttm_base_object_unref(&user_obj);
  859. return ERR_PTR(ret);
  860. } else
  861. vfb->user_obj = user_obj;
  862. return &vfb->base;
  863. try_dmabuf:
  864. DRM_INFO("%s: trying buffer\n", __func__);
  865. ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
  866. if (ret) {
  867. DRM_ERROR("failed to find buffer: %i\n", ret);
  868. return ERR_PTR(-ENOENT);
  869. }
  870. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  871. mode_cmd);
  872. /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
  873. vmw_dmabuf_unreference(&bo);
  874. if (ret) {
  875. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  876. ttm_base_object_unref(&user_obj);
  877. return ERR_PTR(ret);
  878. } else
  879. vfb->user_obj = user_obj;
  880. return &vfb->base;
  881. err_not_scanout:
  882. DRM_ERROR("surface not marked as scanout\n");
  883. /* vmw_user_surface_lookup takes one ref */
  884. vmw_surface_unreference(&surface);
  885. ttm_base_object_unref(&user_obj);
  886. return ERR_PTR(-EINVAL);
  887. }
  888. static struct drm_mode_config_funcs vmw_kms_funcs = {
  889. .fb_create = vmw_kms_fb_create,
  890. };
  891. int vmw_kms_present(struct vmw_private *dev_priv,
  892. struct drm_file *file_priv,
  893. struct vmw_framebuffer *vfb,
  894. struct vmw_surface *surface,
  895. uint32_t sid,
  896. int32_t destX, int32_t destY,
  897. struct drm_vmw_rect *clips,
  898. uint32_t num_clips)
  899. {
  900. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  901. struct drm_crtc *crtc;
  902. size_t fifo_size;
  903. int i, k, num_units;
  904. int ret = 0; /* silence warning */
  905. struct {
  906. SVGA3dCmdHeader header;
  907. SVGA3dCmdBlitSurfaceToScreen body;
  908. } *cmd;
  909. SVGASignedRect *blits;
  910. num_units = 0;
  911. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  912. if (crtc->fb != &vfb->base)
  913. continue;
  914. units[num_units++] = vmw_crtc_to_du(crtc);
  915. }
  916. BUG_ON(surface == NULL);
  917. BUG_ON(!clips || !num_clips);
  918. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  919. cmd = kmalloc(fifo_size, GFP_KERNEL);
  920. if (unlikely(cmd == NULL)) {
  921. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  922. return -ENOMEM;
  923. }
  924. /* only need to do this once */
  925. memset(cmd, 0, fifo_size);
  926. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  927. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  928. cmd->body.srcRect.left = 0;
  929. cmd->body.srcRect.right = surface->sizes[0].width;
  930. cmd->body.srcRect.top = 0;
  931. cmd->body.srcRect.bottom = surface->sizes[0].height;
  932. blits = (SVGASignedRect *)&cmd[1];
  933. for (i = 0; i < num_clips; i++) {
  934. blits[i].left = clips[i].x;
  935. blits[i].right = clips[i].x + clips[i].w;
  936. blits[i].top = clips[i].y;
  937. blits[i].bottom = clips[i].y + clips[i].h;
  938. }
  939. for (k = 0; k < num_units; k++) {
  940. struct vmw_display_unit *unit = units[k];
  941. int clip_x1 = destX - unit->crtc.x;
  942. int clip_y1 = destY - unit->crtc.y;
  943. int clip_x2 = clip_x1 + surface->sizes[0].width;
  944. int clip_y2 = clip_y1 + surface->sizes[0].height;
  945. /* skip any crtcs that misses the clip region */
  946. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  947. clip_y1 >= unit->crtc.mode.vdisplay ||
  948. clip_x2 <= 0 || clip_y2 <= 0)
  949. continue;
  950. /* need to reset sid as it is changed by execbuf */
  951. cmd->body.srcImage.sid = sid;
  952. cmd->body.destScreenId = unit->unit;
  953. /*
  954. * The blit command is a lot more resilient then the
  955. * readback command when it comes to clip rects. So its
  956. * okay to go out of bounds.
  957. */
  958. cmd->body.destRect.left = clip_x1;
  959. cmd->body.destRect.right = clip_x2;
  960. cmd->body.destRect.top = clip_y1;
  961. cmd->body.destRect.bottom = clip_y2;
  962. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  963. fifo_size, 0, NULL);
  964. if (unlikely(ret != 0))
  965. break;
  966. }
  967. kfree(cmd);
  968. return ret;
  969. }
  970. int vmw_kms_readback(struct vmw_private *dev_priv,
  971. struct drm_file *file_priv,
  972. struct vmw_framebuffer *vfb,
  973. struct drm_vmw_fence_rep __user *user_fence_rep,
  974. struct drm_vmw_rect *clips,
  975. uint32_t num_clips)
  976. {
  977. struct vmw_framebuffer_dmabuf *vfbd =
  978. vmw_framebuffer_to_vfbd(&vfb->base);
  979. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  980. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  981. struct drm_crtc *crtc;
  982. size_t fifo_size;
  983. int i, k, ret, num_units, blits_pos;
  984. struct {
  985. uint32_t header;
  986. SVGAFifoCmdDefineGMRFB body;
  987. } *cmd;
  988. struct {
  989. uint32_t header;
  990. SVGAFifoCmdBlitScreenToGMRFB body;
  991. } *blits;
  992. num_units = 0;
  993. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  994. if (crtc->fb != &vfb->base)
  995. continue;
  996. units[num_units++] = vmw_crtc_to_du(crtc);
  997. }
  998. BUG_ON(dmabuf == NULL);
  999. BUG_ON(!clips || !num_clips);
  1000. /* take a safe guess at fifo size */
  1001. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1002. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1003. if (unlikely(cmd == NULL)) {
  1004. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1005. return -ENOMEM;
  1006. }
  1007. memset(cmd, 0, fifo_size);
  1008. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1009. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1010. cmd->body.format.colorDepth = vfb->base.depth;
  1011. cmd->body.format.reserved = 0;
  1012. cmd->body.bytesPerLine = vfb->base.pitch;
  1013. cmd->body.ptr.gmrId = vfb->user_handle;
  1014. cmd->body.ptr.offset = 0;
  1015. blits = (void *)&cmd[1];
  1016. blits_pos = 0;
  1017. for (i = 0; i < num_units; i++) {
  1018. struct drm_vmw_rect *c = clips;
  1019. for (k = 0; k < num_clips; k++, c++) {
  1020. /* transform clip coords to crtc origin based coords */
  1021. int clip_x1 = c->x - units[i]->crtc.x;
  1022. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1023. int clip_y1 = c->y - units[i]->crtc.y;
  1024. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1025. int dest_x = c->x;
  1026. int dest_y = c->y;
  1027. /* compensate for clipping, we negate
  1028. * a negative number and add that.
  1029. */
  1030. if (clip_x1 < 0)
  1031. dest_x += -clip_x1;
  1032. if (clip_y1 < 0)
  1033. dest_y += -clip_y1;
  1034. /* clip */
  1035. clip_x1 = max(clip_x1, 0);
  1036. clip_y1 = max(clip_y1, 0);
  1037. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1038. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1039. /* and cull any rects that misses the crtc */
  1040. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1041. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1042. clip_x2 <= 0 || clip_y2 <= 0)
  1043. continue;
  1044. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1045. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1046. blits[blits_pos].body.destOrigin.x = dest_x;
  1047. blits[blits_pos].body.destOrigin.y = dest_y;
  1048. blits[blits_pos].body.srcRect.left = clip_x1;
  1049. blits[blits_pos].body.srcRect.top = clip_y1;
  1050. blits[blits_pos].body.srcRect.right = clip_x2;
  1051. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1052. blits_pos++;
  1053. }
  1054. }
  1055. /* reset size here and use calculated exact size from loops */
  1056. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1057. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1058. 0, user_fence_rep);
  1059. kfree(cmd);
  1060. return ret;
  1061. }
  1062. int vmw_kms_init(struct vmw_private *dev_priv)
  1063. {
  1064. struct drm_device *dev = dev_priv->dev;
  1065. int ret;
  1066. drm_mode_config_init(dev);
  1067. dev->mode_config.funcs = &vmw_kms_funcs;
  1068. dev->mode_config.min_width = 1;
  1069. dev->mode_config.min_height = 1;
  1070. /* assumed largest fb size */
  1071. dev->mode_config.max_width = 8192;
  1072. dev->mode_config.max_height = 8192;
  1073. ret = vmw_kms_init_screen_object_display(dev_priv);
  1074. if (ret) /* Fallback */
  1075. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1076. return 0;
  1077. }
  1078. int vmw_kms_close(struct vmw_private *dev_priv)
  1079. {
  1080. /*
  1081. * Docs says we should take the lock before calling this function
  1082. * but since it destroys encoders and our destructor calls
  1083. * drm_encoder_cleanup which takes the lock we deadlock.
  1084. */
  1085. drm_mode_config_cleanup(dev_priv->dev);
  1086. vmw_kms_close_legacy_display_system(dev_priv);
  1087. return 0;
  1088. }
  1089. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1090. struct drm_file *file_priv)
  1091. {
  1092. struct drm_vmw_cursor_bypass_arg *arg = data;
  1093. struct vmw_display_unit *du;
  1094. struct drm_mode_object *obj;
  1095. struct drm_crtc *crtc;
  1096. int ret = 0;
  1097. mutex_lock(&dev->mode_config.mutex);
  1098. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1099. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1100. du = vmw_crtc_to_du(crtc);
  1101. du->hotspot_x = arg->xhot;
  1102. du->hotspot_y = arg->yhot;
  1103. }
  1104. mutex_unlock(&dev->mode_config.mutex);
  1105. return 0;
  1106. }
  1107. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1108. if (!obj) {
  1109. ret = -EINVAL;
  1110. goto out;
  1111. }
  1112. crtc = obj_to_crtc(obj);
  1113. du = vmw_crtc_to_du(crtc);
  1114. du->hotspot_x = arg->xhot;
  1115. du->hotspot_y = arg->yhot;
  1116. out:
  1117. mutex_unlock(&dev->mode_config.mutex);
  1118. return ret;
  1119. }
  1120. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1121. unsigned width, unsigned height, unsigned pitch,
  1122. unsigned bpp, unsigned depth)
  1123. {
  1124. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1125. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1126. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1127. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1128. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1129. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1130. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1131. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1132. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1133. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1134. return -EINVAL;
  1135. }
  1136. return 0;
  1137. }
  1138. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1139. {
  1140. struct vmw_vga_topology_state *save;
  1141. uint32_t i;
  1142. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1143. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1144. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1145. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1146. vmw_priv->vga_pitchlock =
  1147. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1148. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1149. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1150. SVGA_FIFO_PITCHLOCK);
  1151. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1152. return 0;
  1153. vmw_priv->num_displays = vmw_read(vmw_priv,
  1154. SVGA_REG_NUM_GUEST_DISPLAYS);
  1155. if (vmw_priv->num_displays == 0)
  1156. vmw_priv->num_displays = 1;
  1157. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1158. save = &vmw_priv->vga_save[i];
  1159. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1160. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1161. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1162. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1163. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1164. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1165. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1166. if (i == 0 && vmw_priv->num_displays == 1 &&
  1167. save->width == 0 && save->height == 0) {
  1168. /*
  1169. * It should be fairly safe to assume that these
  1170. * values are uninitialized.
  1171. */
  1172. save->width = vmw_priv->vga_width - save->pos_x;
  1173. save->height = vmw_priv->vga_height - save->pos_y;
  1174. }
  1175. }
  1176. return 0;
  1177. }
  1178. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1179. {
  1180. struct vmw_vga_topology_state *save;
  1181. uint32_t i;
  1182. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1183. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1184. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1185. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1186. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1187. vmw_priv->vga_pitchlock);
  1188. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1189. iowrite32(vmw_priv->vga_pitchlock,
  1190. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1191. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1192. return 0;
  1193. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1194. save = &vmw_priv->vga_save[i];
  1195. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1196. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1197. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1198. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1199. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1200. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1201. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1202. }
  1203. return 0;
  1204. }
  1205. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1206. uint32_t pitch,
  1207. uint32_t height)
  1208. {
  1209. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1210. }
  1211. /**
  1212. * Function called by DRM code called with vbl_lock held.
  1213. */
  1214. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1215. {
  1216. return 0;
  1217. }
  1218. /**
  1219. * Function called by DRM code called with vbl_lock held.
  1220. */
  1221. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1222. {
  1223. return -ENOSYS;
  1224. }
  1225. /**
  1226. * Function called by DRM code called with vbl_lock held.
  1227. */
  1228. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1229. {
  1230. }
  1231. /*
  1232. * Small shared kms functions.
  1233. */
  1234. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1235. struct drm_vmw_rect *rects)
  1236. {
  1237. struct drm_device *dev = dev_priv->dev;
  1238. struct vmw_display_unit *du;
  1239. struct drm_connector *con;
  1240. mutex_lock(&dev->mode_config.mutex);
  1241. #if 0
  1242. {
  1243. unsigned int i;
  1244. DRM_INFO("%s: new layout ", __func__);
  1245. for (i = 0; i < num; i++)
  1246. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1247. rects[i].w, rects[i].h);
  1248. DRM_INFO("\n");
  1249. }
  1250. #endif
  1251. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1252. du = vmw_connector_to_du(con);
  1253. if (num > du->unit) {
  1254. du->pref_width = rects[du->unit].w;
  1255. du->pref_height = rects[du->unit].h;
  1256. du->pref_active = true;
  1257. du->gui_x = rects[du->unit].x;
  1258. du->gui_y = rects[du->unit].y;
  1259. } else {
  1260. du->pref_width = 800;
  1261. du->pref_height = 600;
  1262. du->pref_active = false;
  1263. }
  1264. con->status = vmw_du_connector_detect(con, true);
  1265. }
  1266. mutex_unlock(&dev->mode_config.mutex);
  1267. return 0;
  1268. }
  1269. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1270. {
  1271. }
  1272. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1273. {
  1274. }
  1275. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1276. u16 *r, u16 *g, u16 *b,
  1277. uint32_t start, uint32_t size)
  1278. {
  1279. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1280. int i;
  1281. for (i = 0; i < size; i++) {
  1282. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1283. r[i], g[i], b[i]);
  1284. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1285. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1286. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1287. }
  1288. }
  1289. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1290. {
  1291. }
  1292. void vmw_du_connector_save(struct drm_connector *connector)
  1293. {
  1294. }
  1295. void vmw_du_connector_restore(struct drm_connector *connector)
  1296. {
  1297. }
  1298. enum drm_connector_status
  1299. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1300. {
  1301. uint32_t num_displays;
  1302. struct drm_device *dev = connector->dev;
  1303. struct vmw_private *dev_priv = vmw_priv(dev);
  1304. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1305. mutex_lock(&dev_priv->hw_mutex);
  1306. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1307. mutex_unlock(&dev_priv->hw_mutex);
  1308. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1309. du->pref_active) ?
  1310. connector_status_connected : connector_status_disconnected);
  1311. }
  1312. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1313. /* 640x480@60Hz */
  1314. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1315. 752, 800, 0, 480, 489, 492, 525, 0,
  1316. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1317. /* 800x600@60Hz */
  1318. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1319. 968, 1056, 0, 600, 601, 605, 628, 0,
  1320. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1321. /* 1024x768@60Hz */
  1322. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1323. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1324. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1325. /* 1152x864@75Hz */
  1326. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1327. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1328. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1329. /* 1280x768@60Hz */
  1330. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1331. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1332. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1333. /* 1280x800@60Hz */
  1334. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1335. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1336. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1337. /* 1280x960@60Hz */
  1338. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1339. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1340. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1341. /* 1280x1024@60Hz */
  1342. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1343. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1344. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1345. /* 1360x768@60Hz */
  1346. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1347. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1348. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1349. /* 1440x1050@60Hz */
  1350. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1351. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1352. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1353. /* 1440x900@60Hz */
  1354. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1355. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1356. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1357. /* 1600x1200@60Hz */
  1358. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1359. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1360. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1361. /* 1680x1050@60Hz */
  1362. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1363. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1364. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1365. /* 1792x1344@60Hz */
  1366. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1367. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1368. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1369. /* 1853x1392@60Hz */
  1370. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1371. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1372. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1373. /* 1920x1200@60Hz */
  1374. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1375. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1376. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1377. /* 1920x1440@60Hz */
  1378. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1379. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1380. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1381. /* 2560x1600@60Hz */
  1382. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1383. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1384. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1385. /* Terminate */
  1386. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1387. };
  1388. /**
  1389. * vmw_guess_mode_timing - Provide fake timings for a
  1390. * 60Hz vrefresh mode.
  1391. *
  1392. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1393. * members filled in.
  1394. */
  1395. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1396. {
  1397. mode->hsync_start = mode->hdisplay + 50;
  1398. mode->hsync_end = mode->hsync_start + 50;
  1399. mode->htotal = mode->hsync_end + 50;
  1400. mode->vsync_start = mode->vdisplay + 50;
  1401. mode->vsync_end = mode->vsync_start + 50;
  1402. mode->vtotal = mode->vsync_end + 50;
  1403. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1404. mode->vrefresh = drm_mode_vrefresh(mode);
  1405. }
  1406. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1407. uint32_t max_width, uint32_t max_height)
  1408. {
  1409. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1410. struct drm_device *dev = connector->dev;
  1411. struct vmw_private *dev_priv = vmw_priv(dev);
  1412. struct drm_display_mode *mode = NULL;
  1413. struct drm_display_mode *bmode;
  1414. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1415. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1416. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1417. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1418. };
  1419. int i;
  1420. /* Add preferred mode */
  1421. {
  1422. mode = drm_mode_duplicate(dev, &prefmode);
  1423. if (!mode)
  1424. return 0;
  1425. mode->hdisplay = du->pref_width;
  1426. mode->vdisplay = du->pref_height;
  1427. vmw_guess_mode_timing(mode);
  1428. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1429. mode->vdisplay)) {
  1430. drm_mode_probed_add(connector, mode);
  1431. } else {
  1432. drm_mode_destroy(dev, mode);
  1433. mode = NULL;
  1434. }
  1435. if (du->pref_mode) {
  1436. list_del_init(&du->pref_mode->head);
  1437. drm_mode_destroy(dev, du->pref_mode);
  1438. }
  1439. /* mode might be null here, this is intended */
  1440. du->pref_mode = mode;
  1441. }
  1442. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1443. bmode = &vmw_kms_connector_builtin[i];
  1444. if (bmode->hdisplay > max_width ||
  1445. bmode->vdisplay > max_height)
  1446. continue;
  1447. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1448. bmode->vdisplay))
  1449. continue;
  1450. mode = drm_mode_duplicate(dev, bmode);
  1451. if (!mode)
  1452. return 0;
  1453. mode->vrefresh = drm_mode_vrefresh(mode);
  1454. drm_mode_probed_add(connector, mode);
  1455. }
  1456. /* Move the prefered mode first, help apps pick the right mode. */
  1457. if (du->pref_mode)
  1458. list_move(&du->pref_mode->head, &connector->probed_modes);
  1459. drm_mode_connector_list_update(connector);
  1460. return 1;
  1461. }
  1462. int vmw_du_connector_set_property(struct drm_connector *connector,
  1463. struct drm_property *property,
  1464. uint64_t val)
  1465. {
  1466. return 0;
  1467. }
  1468. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1469. struct drm_file *file_priv)
  1470. {
  1471. struct vmw_private *dev_priv = vmw_priv(dev);
  1472. struct drm_vmw_update_layout_arg *arg =
  1473. (struct drm_vmw_update_layout_arg *)data;
  1474. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1475. void __user *user_rects;
  1476. struct drm_vmw_rect *rects;
  1477. unsigned rects_size;
  1478. int ret;
  1479. int i;
  1480. struct drm_mode_config *mode_config = &dev->mode_config;
  1481. ret = ttm_read_lock(&vmaster->lock, true);
  1482. if (unlikely(ret != 0))
  1483. return ret;
  1484. if (!arg->num_outputs) {
  1485. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1486. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1487. goto out_unlock;
  1488. }
  1489. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1490. rects = kzalloc(rects_size, GFP_KERNEL);
  1491. if (unlikely(!rects)) {
  1492. ret = -ENOMEM;
  1493. goto out_unlock;
  1494. }
  1495. user_rects = (void __user *)(unsigned long)arg->rects;
  1496. ret = copy_from_user(rects, user_rects, rects_size);
  1497. if (unlikely(ret != 0)) {
  1498. DRM_ERROR("Failed to get rects.\n");
  1499. ret = -EFAULT;
  1500. goto out_free;
  1501. }
  1502. for (i = 0; i < arg->num_outputs; ++i) {
  1503. if (rects->x < 0 ||
  1504. rects->y < 0 ||
  1505. rects->x + rects->w > mode_config->max_width ||
  1506. rects->y + rects->h > mode_config->max_height) {
  1507. DRM_ERROR("Invalid GUI layout.\n");
  1508. ret = -EINVAL;
  1509. goto out_free;
  1510. }
  1511. }
  1512. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1513. out_free:
  1514. kfree(rects);
  1515. out_unlock:
  1516. ttm_read_unlock(&vmaster->lock);
  1517. return ret;
  1518. }