bfin-t350mcqb-fb.c 16 KB

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  1. /*
  2. * File: drivers/video/bfin-t350mcqb-fb.c
  3. * Based on:
  4. * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
  5. *
  6. * Created:
  7. * Description: Blackfin LCD Framebufer driver
  8. *
  9. *
  10. * Modified:
  11. * Copyright 2004-2007 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/errno.h>
  33. #include <linux/string.h>
  34. #include <linux/fb.h>
  35. #include <linux/init.h>
  36. #include <linux/types.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/device.h>
  39. #include <linux/backlight.h>
  40. #include <linux/lcd.h>
  41. #include <linux/dma-mapping.h>
  42. #include <linux/platform_device.h>
  43. #include <asm/blackfin.h>
  44. #include <asm/irq.h>
  45. #include <asm/dma-mapping.h>
  46. #include <asm/dma.h>
  47. #include <asm/portmux.h>
  48. #include <asm/gptimers.h>
  49. #define NO_BL_SUPPORT
  50. #define LCD_X_RES 320 /* Horizontal Resolution */
  51. #define LCD_Y_RES 240 /* Vertical Resolution */
  52. #define LCD_BPP 24 /* Bit Per Pixel */
  53. #define DMA_BUS_SIZE 16
  54. #define LCD_CLK (12*1000*1000) /* 12MHz */
  55. #define CLOCKS_PER_PIX 3
  56. /*
  57. * HS and VS timing parameters (all in number of PPI clk ticks)
  58. */
  59. #define U_LINE 1 /* Blanking Lines */
  60. #define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
  61. #define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
  62. #define H_PULSE 90 /* HS pulse width */
  63. #define H_START 204 /* first valid pixel */
  64. #define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
  65. #define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
  66. #define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
  67. #define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
  68. #define BFIN_LCD_NBR_PALETTE_ENTRIES 256
  69. #define DRIVER_NAME "bfin-t350mcqb"
  70. static char driver_name[] = DRIVER_NAME;
  71. struct bfin_t350mcqbfb_info {
  72. struct fb_info *fb;
  73. struct device *dev;
  74. unsigned char *fb_buffer; /* RGB Buffer */
  75. dma_addr_t dma_handle;
  76. int lq043_open_cnt;
  77. int irq;
  78. spinlock_t lock; /* lock */
  79. u32 pseudo_pal[16];
  80. };
  81. static int nocursor;
  82. module_param(nocursor, int, 0644);
  83. MODULE_PARM_DESC(nocursor, "cursor enable/disable");
  84. #define PPI_TX_MODE 0x2
  85. #define PPI_XFER_TYPE_11 0xC
  86. #define PPI_PORT_CFG_01 0x10
  87. #define PPI_PACK_EN 0x80
  88. #define PPI_POLS_1 0x8000
  89. static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
  90. {
  91. bfin_write_PPI_DELAY(H_START);
  92. bfin_write_PPI_COUNT(H_ACTPIX-1);
  93. bfin_write_PPI_FRAME(V_LINES);
  94. bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
  95. PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
  96. PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
  97. PPI_PACK_EN | /* packing enabled PACK_EN */
  98. PPI_POLS_1); /* faling edge syncs POLS */
  99. }
  100. static inline void bfin_t350mcqb_disable_ppi(void)
  101. {
  102. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  103. }
  104. static inline void bfin_t350mcqb_enable_ppi(void)
  105. {
  106. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  107. }
  108. static void bfin_t350mcqb_start_timers(void)
  109. {
  110. unsigned long flags;
  111. local_irq_save(flags);
  112. enable_gptimers(TIMER1bit);
  113. enable_gptimers(TIMER0bit);
  114. local_irq_restore(flags);
  115. }
  116. static void bfin_t350mcqb_stop_timers(void)
  117. {
  118. disable_gptimers(TIMER0bit | TIMER1bit);
  119. set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
  120. TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
  121. TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);
  122. }
  123. static void bfin_t350mcqb_init_timers(void)
  124. {
  125. bfin_t350mcqb_stop_timers();
  126. set_gptimer_period(TIMER0_id, H_PERIOD);
  127. set_gptimer_pwidth(TIMER0_id, H_PULSE);
  128. set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  129. TIMER_TIN_SEL | TIMER_CLK_SEL|
  130. TIMER_EMU_RUN);
  131. set_gptimer_period(TIMER1_id, V_PERIOD);
  132. set_gptimer_pwidth(TIMER1_id, V_PULSE);
  133. set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  134. TIMER_TIN_SEL | TIMER_CLK_SEL |
  135. TIMER_EMU_RUN);
  136. }
  137. static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
  138. {
  139. set_dma_config(CH_PPI,
  140. set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
  141. INTR_DISABLE, DIMENSION_2D,
  142. DATA_SIZE_16,
  143. DMA_NOSYNC_KEEP_DMA_BUF));
  144. set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
  145. set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
  146. set_dma_y_count(CH_PPI, V_LINES);
  147. set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
  148. set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
  149. }
  150. static u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  151. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
  152. P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
  153. P_PPI0_D6, P_PPI0_D7, 0};
  154. static int bfin_t350mcqb_request_ports(int action)
  155. {
  156. if (action) {
  157. if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
  158. printk(KERN_ERR "Requesting Peripherals faild\n");
  159. return -EFAULT;
  160. }
  161. } else
  162. peripheral_free_list(ppi0_req_8);
  163. return 0;
  164. }
  165. static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
  166. {
  167. struct bfin_t350mcqbfb_info *fbi = info->par;
  168. spin_lock(&fbi->lock);
  169. fbi->lq043_open_cnt++;
  170. if (fbi->lq043_open_cnt <= 1) {
  171. bfin_t350mcqb_disable_ppi();
  172. SSYNC();
  173. bfin_t350mcqb_config_dma(fbi);
  174. bfin_t350mcqb_config_ppi(fbi);
  175. bfin_t350mcqb_init_timers();
  176. /* start dma */
  177. enable_dma(CH_PPI);
  178. bfin_t350mcqb_enable_ppi();
  179. bfin_t350mcqb_start_timers();
  180. }
  181. spin_unlock(&fbi->lock);
  182. return 0;
  183. }
  184. static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
  185. {
  186. struct bfin_t350mcqbfb_info *fbi = info->par;
  187. spin_lock(&fbi->lock);
  188. fbi->lq043_open_cnt--;
  189. if (fbi->lq043_open_cnt <= 0) {
  190. bfin_t350mcqb_disable_ppi();
  191. SSYNC();
  192. disable_dma(CH_PPI);
  193. bfin_t350mcqb_stop_timers();
  194. }
  195. spin_unlock(&fbi->lock);
  196. return 0;
  197. }
  198. static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
  199. struct fb_info *info)
  200. {
  201. switch (var->bits_per_pixel) {
  202. case 24:/* TRUECOLOUR, 16m */
  203. var->red.offset = 0;
  204. var->green.offset = 8;
  205. var->blue.offset = 16;
  206. var->red.length = var->green.length = var->blue.length = 8;
  207. var->transp.offset = 0;
  208. var->transp.length = 0;
  209. var->transp.msb_right = 0;
  210. var->red.msb_right = 0;
  211. var->green.msb_right = 0;
  212. var->blue.msb_right = 0;
  213. break;
  214. default:
  215. pr_debug("%s: depth not supported: %u BPP\n", __func__,
  216. var->bits_per_pixel);
  217. return -EINVAL;
  218. }
  219. if (info->var.xres != var->xres || info->var.yres != var->yres ||
  220. info->var.xres_virtual != var->xres_virtual ||
  221. info->var.yres_virtual != var->yres_virtual) {
  222. pr_debug("%s: Resolution not supported: X%u x Y%u \n",
  223. __func__, var->xres, var->yres);
  224. return -EINVAL;
  225. }
  226. /*
  227. * Memory limit
  228. */
  229. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  230. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  231. __func__, var->yres_virtual);
  232. return -ENOMEM;
  233. }
  234. return 0;
  235. }
  236. int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  237. {
  238. if (nocursor)
  239. return 0;
  240. else
  241. return -EINVAL; /* just to force soft_cursor() call */
  242. }
  243. static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
  244. u_int blue, u_int transp,
  245. struct fb_info *info)
  246. {
  247. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  248. return -EINVAL;
  249. if (info->var.grayscale) {
  250. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  251. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  252. }
  253. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  254. u32 value;
  255. /* Place color in the pseudopalette */
  256. if (regno > 16)
  257. return -EINVAL;
  258. red >>= (16 - info->var.red.length);
  259. green >>= (16 - info->var.green.length);
  260. blue >>= (16 - info->var.blue.length);
  261. value = (red << info->var.red.offset) |
  262. (green << info->var.green.offset) |
  263. (blue << info->var.blue.offset);
  264. value &= 0xFFFFFF;
  265. ((u32 *) (info->pseudo_palette))[regno] = value;
  266. }
  267. return 0;
  268. }
  269. static struct fb_ops bfin_t350mcqb_fb_ops = {
  270. .owner = THIS_MODULE,
  271. .fb_open = bfin_t350mcqb_fb_open,
  272. .fb_release = bfin_t350mcqb_fb_release,
  273. .fb_check_var = bfin_t350mcqb_fb_check_var,
  274. .fb_fillrect = cfb_fillrect,
  275. .fb_copyarea = cfb_copyarea,
  276. .fb_imageblit = cfb_imageblit,
  277. .fb_cursor = bfin_t350mcqb_fb_cursor,
  278. .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
  279. };
  280. #ifndef NO_BL_SUPPORT
  281. static int bl_get_brightness(struct backlight_device *bd)
  282. {
  283. return 0;
  284. }
  285. static struct backlight_ops bfin_lq043fb_bl_ops = {
  286. .get_brightness = bl_get_brightness,
  287. };
  288. static struct backlight_device *bl_dev;
  289. static int bfin_lcd_get_power(struct lcd_device *dev)
  290. {
  291. return 0;
  292. }
  293. static int bfin_lcd_set_power(struct lcd_device *dev, int power)
  294. {
  295. return 0;
  296. }
  297. static int bfin_lcd_get_contrast(struct lcd_device *dev)
  298. {
  299. return 0;
  300. }
  301. static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
  302. {
  303. return 0;
  304. }
  305. static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
  306. {
  307. if (!fi || (fi == &bfin_t350mcqb_fb))
  308. return 1;
  309. return 0;
  310. }
  311. static struct lcd_ops bfin_lcd_ops = {
  312. .get_power = bfin_lcd_get_power,
  313. .set_power = bfin_lcd_set_power,
  314. .get_contrast = bfin_lcd_get_contrast,
  315. .set_contrast = bfin_lcd_set_contrast,
  316. .check_fb = bfin_lcd_check_fb,
  317. };
  318. static struct lcd_device *lcd_dev;
  319. #endif
  320. static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
  321. {
  322. /*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/
  323. u16 status = bfin_read_PPI_STATUS();
  324. bfin_write_PPI_STATUS(0xFFFF);
  325. if (status) {
  326. bfin_t350mcqb_disable_ppi();
  327. disable_dma(CH_PPI);
  328. /* start dma */
  329. enable_dma(CH_PPI);
  330. bfin_t350mcqb_enable_ppi();
  331. bfin_write_PPI_STATUS(0xFFFF);
  332. }
  333. return IRQ_HANDLED;
  334. }
  335. static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
  336. {
  337. struct bfin_t350mcqbfb_info *info;
  338. struct fb_info *fbinfo;
  339. int ret;
  340. printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
  341. LCD_X_RES, LCD_Y_RES, LCD_BPP);
  342. if (request_dma(CH_PPI, "CH_PPI") < 0) {
  343. printk(KERN_ERR DRIVER_NAME
  344. ": couldn't request CH_PPI DMA\n");
  345. ret = -EFAULT;
  346. goto out1;
  347. }
  348. fbinfo =
  349. framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
  350. if (!fbinfo) {
  351. ret = -ENOMEM;
  352. goto out2;
  353. }
  354. info = fbinfo->par;
  355. info->fb = fbinfo;
  356. info->dev = &pdev->dev;
  357. platform_set_drvdata(pdev, fbinfo);
  358. strcpy(fbinfo->fix.id, driver_name);
  359. fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
  360. fbinfo->fix.type_aux = 0;
  361. fbinfo->fix.xpanstep = 0;
  362. fbinfo->fix.ypanstep = 0;
  363. fbinfo->fix.ywrapstep = 0;
  364. fbinfo->fix.accel = FB_ACCEL_NONE;
  365. fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
  366. fbinfo->var.nonstd = 0;
  367. fbinfo->var.activate = FB_ACTIVATE_NOW;
  368. fbinfo->var.height = 53;
  369. fbinfo->var.width = 70;
  370. fbinfo->var.accel_flags = 0;
  371. fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
  372. fbinfo->var.xres = LCD_X_RES;
  373. fbinfo->var.xres_virtual = LCD_X_RES;
  374. fbinfo->var.yres = LCD_Y_RES;
  375. fbinfo->var.yres_virtual = LCD_Y_RES;
  376. fbinfo->var.bits_per_pixel = LCD_BPP;
  377. fbinfo->var.red.offset = 0;
  378. fbinfo->var.green.offset = 8;
  379. fbinfo->var.blue.offset = 16;
  380. fbinfo->var.transp.offset = 0;
  381. fbinfo->var.red.length = 8;
  382. fbinfo->var.green.length = 8;
  383. fbinfo->var.blue.length = 8;
  384. fbinfo->var.transp.length = 0;
  385. fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
  386. fbinfo->fix.line_length = fbinfo->var.xres_virtual *
  387. fbinfo->var.bits_per_pixel / 8;
  388. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  389. fbinfo->flags = FBINFO_FLAG_DEFAULT;
  390. info->fb_buffer =
  391. dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
  392. GFP_KERNEL);
  393. if (NULL == info->fb_buffer) {
  394. printk(KERN_ERR DRIVER_NAME
  395. ": couldn't allocate dma buffer.\n");
  396. ret = -ENOMEM;
  397. goto out3;
  398. }
  399. fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  400. fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  401. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  402. fbinfo->pseudo_palette = &info->pseudo_pal;
  403. if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
  404. < 0) {
  405. printk(KERN_ERR DRIVER_NAME
  406. "Fail to allocate colormap (%d entries)\n",
  407. BFIN_LCD_NBR_PALETTE_ENTRIES);
  408. ret = -EFAULT;
  409. goto out4;
  410. }
  411. if (bfin_t350mcqb_request_ports(1)) {
  412. printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
  413. ret = -EFAULT;
  414. goto out6;
  415. }
  416. info->irq = platform_get_irq(pdev, 0);
  417. if (info->irq < 0) {
  418. ret = -EINVAL;
  419. goto out7;
  420. }
  421. ret = request_irq(info->irq, bfin_t350mcqb_irq_error, IRQF_DISABLED,
  422. "PPI ERROR", info);
  423. if (ret < 0) {
  424. printk(KERN_ERR DRIVER_NAME
  425. ": unable to request PPI ERROR IRQ\n");
  426. goto out7;
  427. }
  428. if (register_framebuffer(fbinfo) < 0) {
  429. printk(KERN_ERR DRIVER_NAME
  430. ": unable to register framebuffer.\n");
  431. ret = -EINVAL;
  432. goto out8;
  433. }
  434. #ifndef NO_BL_SUPPORT
  435. bl_dev =
  436. backlight_device_register("bf52x-bl", NULL, NULL,
  437. &bfin_lq043fb_bl_ops);
  438. bl_dev->props.max_brightness = 255;
  439. lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
  440. lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
  441. #endif
  442. return 0;
  443. out8:
  444. free_irq(info->irq, info);
  445. out7:
  446. bfin_t350mcqb_request_ports(0);
  447. out6:
  448. fb_dealloc_cmap(&fbinfo->cmap);
  449. out4:
  450. dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
  451. info->dma_handle);
  452. out3:
  453. framebuffer_release(fbinfo);
  454. out2:
  455. free_dma(CH_PPI);
  456. out1:
  457. platform_set_drvdata(pdev, NULL);
  458. return ret;
  459. }
  460. static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
  461. {
  462. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  463. struct bfin_t350mcqbfb_info *info = fbinfo->par;
  464. unregister_framebuffer(fbinfo);
  465. free_dma(CH_PPI);
  466. free_irq(info->irq, info);
  467. if (info->fb_buffer != NULL)
  468. dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
  469. info->dma_handle);
  470. fb_dealloc_cmap(&fbinfo->cmap);
  471. #ifndef NO_BL_SUPPORT
  472. lcd_device_unregister(lcd_dev);
  473. backlight_device_unregister(bl_dev);
  474. #endif
  475. bfin_t350mcqb_request_ports(0);
  476. platform_set_drvdata(pdev, NULL);
  477. framebuffer_release(fbinfo);
  478. printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
  479. return 0;
  480. }
  481. #ifdef CONFIG_PM
  482. static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
  483. {
  484. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  485. struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
  486. if (fbi->lq043_open_cnt) {
  487. bfin_t350mcqb_disable_ppi();
  488. disable_dma(CH_PPI);
  489. bfin_t350mcqb_stop_timers();
  490. bfin_write_PPI_STATUS(-1);
  491. }
  492. return 0;
  493. }
  494. static int bfin_t350mcqb_resume(struct platform_device *pdev)
  495. {
  496. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  497. struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
  498. if (fbi->lq043_open_cnt) {
  499. bfin_t350mcqb_config_dma(fbi);
  500. bfin_t350mcqb_config_ppi(fbi);
  501. bfin_t350mcqb_init_timers();
  502. /* start dma */
  503. enable_dma(CH_PPI);
  504. bfin_t350mcqb_enable_ppi();
  505. bfin_t350mcqb_start_timers();
  506. }
  507. return 0;
  508. }
  509. #else
  510. #define bfin_t350mcqb_suspend NULL
  511. #define bfin_t350mcqb_resume NULL
  512. #endif
  513. static struct platform_driver bfin_t350mcqb_driver = {
  514. .probe = bfin_t350mcqb_probe,
  515. .remove = __devexit_p(bfin_t350mcqb_remove),
  516. .suspend = bfin_t350mcqb_suspend,
  517. .resume = bfin_t350mcqb_resume,
  518. .driver = {
  519. .name = DRIVER_NAME,
  520. .owner = THIS_MODULE,
  521. },
  522. };
  523. static int __init bfin_t350mcqb_driver_init(void)
  524. {
  525. return platform_driver_register(&bfin_t350mcqb_driver);
  526. }
  527. static void __exit bfin_t350mcqb_driver_cleanup(void)
  528. {
  529. platform_driver_unregister(&bfin_t350mcqb_driver);
  530. }
  531. MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
  532. MODULE_LICENSE("GPL");
  533. module_init(bfin_t350mcqb_driver_init);
  534. module_exit(bfin_t350mcqb_driver_cleanup);