pasemi-cpufreq.c 6.6 KB

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  1. /*
  2. * Copyright (C) 2007 PA Semi, Inc
  3. *
  4. * Authors: Egor Martovetsky <egor@pasemi.com>
  5. * Olof Johansson <olof@lixom.net>
  6. *
  7. * Maintained by: Olof Johansson <olof@lixom.net>
  8. *
  9. * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
  10. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. #include <linux/cpufreq.h>
  28. #include <linux/timer.h>
  29. #include <linux/module.h>
  30. #include <asm/hw_irq.h>
  31. #include <asm/io.h>
  32. #include <asm/prom.h>
  33. #include <asm/time.h>
  34. #include <asm/smp.h>
  35. #define SDCASR_REG 0x0100
  36. #define SDCASR_REG_STRIDE 0x1000
  37. #define SDCPWR_CFGA0_REG 0x0100
  38. #define SDCPWR_PWST0_REG 0x0000
  39. #define SDCPWR_GIZTIME_REG 0x0440
  40. /* SDCPWR_GIZTIME_REG fields */
  41. #define SDCPWR_GIZTIME_GR 0x80000000
  42. #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
  43. /* Offset of ASR registers from SDC base */
  44. #define SDCASR_OFFSET 0x120000
  45. static void __iomem *sdcpwr_mapbase;
  46. static void __iomem *sdcasr_mapbase;
  47. /* Current astate, is used when waking up from power savings on
  48. * one core, in case the other core has switched states during
  49. * the idle time.
  50. */
  51. static int current_astate;
  52. /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
  53. static struct cpufreq_frequency_table pas_freqs[] = {
  54. {0, 0},
  55. {1, 0},
  56. {2, 0},
  57. {3, 0},
  58. {4, 0},
  59. {0, CPUFREQ_TABLE_END},
  60. };
  61. /*
  62. * hardware specific functions
  63. */
  64. static int get_astate_freq(int astate)
  65. {
  66. u32 ret;
  67. ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
  68. return ret & 0x3f;
  69. }
  70. static int get_cur_astate(int cpu)
  71. {
  72. u32 ret;
  73. ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
  74. ret = (ret >> (cpu * 4)) & 0x7;
  75. return ret;
  76. }
  77. static int get_gizmo_latency(void)
  78. {
  79. u32 giztime, ret;
  80. giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
  81. /* just provide the upper bound */
  82. if (giztime & SDCPWR_GIZTIME_GR)
  83. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
  84. else
  85. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
  86. return ret;
  87. }
  88. static void set_astate(int cpu, unsigned int astate)
  89. {
  90. unsigned long flags;
  91. /* Return if called before init has run */
  92. if (unlikely(!sdcasr_mapbase))
  93. return;
  94. local_irq_save(flags);
  95. out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
  96. local_irq_restore(flags);
  97. }
  98. int check_astate(void)
  99. {
  100. return get_cur_astate(hard_smp_processor_id());
  101. }
  102. void restore_astate(int cpu)
  103. {
  104. set_astate(cpu, current_astate);
  105. }
  106. /*
  107. * cpufreq functions
  108. */
  109. static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
  110. {
  111. const u32 *max_freqp;
  112. u32 max_freq;
  113. int i, cur_astate;
  114. struct resource res;
  115. struct device_node *cpu, *dn;
  116. int err = -ENODEV;
  117. cpu = of_get_cpu_node(policy->cpu, NULL);
  118. if (!cpu)
  119. goto out;
  120. dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
  121. if (!dn)
  122. dn = of_find_compatible_node(NULL, NULL,
  123. "pasemi,pwrficient-sdc");
  124. if (!dn)
  125. goto out;
  126. err = of_address_to_resource(dn, 0, &res);
  127. of_node_put(dn);
  128. if (err)
  129. goto out;
  130. sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
  131. if (!sdcasr_mapbase) {
  132. err = -EINVAL;
  133. goto out;
  134. }
  135. dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
  136. if (!dn)
  137. dn = of_find_compatible_node(NULL, NULL,
  138. "pasemi,pwrficient-gizmo");
  139. if (!dn) {
  140. err = -ENODEV;
  141. goto out_unmap_sdcasr;
  142. }
  143. err = of_address_to_resource(dn, 0, &res);
  144. of_node_put(dn);
  145. if (err)
  146. goto out_unmap_sdcasr;
  147. sdcpwr_mapbase = ioremap(res.start, 0x1000);
  148. if (!sdcpwr_mapbase) {
  149. err = -EINVAL;
  150. goto out_unmap_sdcasr;
  151. }
  152. pr_debug("init cpufreq on CPU %d\n", policy->cpu);
  153. max_freqp = of_get_property(cpu, "clock-frequency", NULL);
  154. if (!max_freqp) {
  155. err = -EINVAL;
  156. goto out_unmap_sdcpwr;
  157. }
  158. /* we need the freq in kHz */
  159. max_freq = *max_freqp / 1000;
  160. pr_debug("max clock-frequency is at %u kHz\n", max_freq);
  161. pr_debug("initializing frequency table\n");
  162. /* initialize frequency table */
  163. for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
  164. pas_freqs[i].frequency =
  165. get_astate_freq(pas_freqs[i].driver_data) * 100000;
  166. pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
  167. }
  168. cur_astate = get_cur_astate(policy->cpu);
  169. pr_debug("current astate is at %d\n",cur_astate);
  170. policy->cur = pas_freqs[cur_astate].frequency;
  171. ppc_proc_freq = policy->cur * 1000ul;
  172. return cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
  173. out_unmap_sdcpwr:
  174. iounmap(sdcpwr_mapbase);
  175. out_unmap_sdcasr:
  176. iounmap(sdcasr_mapbase);
  177. out:
  178. return err;
  179. }
  180. static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  181. {
  182. /*
  183. * We don't support CPU hotplug. Don't unmap after the system
  184. * has already made it to a running state.
  185. */
  186. if (system_state != SYSTEM_BOOTING)
  187. return 0;
  188. if (sdcasr_mapbase)
  189. iounmap(sdcasr_mapbase);
  190. if (sdcpwr_mapbase)
  191. iounmap(sdcpwr_mapbase);
  192. cpufreq_frequency_table_put_attr(policy->cpu);
  193. return 0;
  194. }
  195. static int pas_cpufreq_target(struct cpufreq_policy *policy,
  196. unsigned int pas_astate_new)
  197. {
  198. int i;
  199. pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
  200. policy->cpu,
  201. pas_freqs[pas_astate_new].frequency,
  202. pas_freqs[pas_astate_new].driver_data);
  203. current_astate = pas_astate_new;
  204. for_each_online_cpu(i)
  205. set_astate(i, pas_astate_new);
  206. ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul;
  207. return 0;
  208. }
  209. static struct cpufreq_driver pas_cpufreq_driver = {
  210. .name = "pas-cpufreq",
  211. .flags = CPUFREQ_CONST_LOOPS,
  212. .init = pas_cpufreq_cpu_init,
  213. .exit = pas_cpufreq_cpu_exit,
  214. .verify = cpufreq_generic_frequency_table_verify,
  215. .target_index = pas_cpufreq_target,
  216. .attr = cpufreq_generic_attr,
  217. };
  218. /*
  219. * module init and destoy
  220. */
  221. static int __init pas_cpufreq_init(void)
  222. {
  223. if (!of_machine_is_compatible("PA6T-1682M") &&
  224. !of_machine_is_compatible("pasemi,pwrficient"))
  225. return -ENODEV;
  226. return cpufreq_register_driver(&pas_cpufreq_driver);
  227. }
  228. static void __exit pas_cpufreq_exit(void)
  229. {
  230. cpufreq_unregister_driver(&pas_cpufreq_driver);
  231. }
  232. module_init(pas_cpufreq_init);
  233. module_exit(pas_cpufreq_exit);
  234. MODULE_LICENSE("GPL");
  235. MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");