tce.h 2.2 KB

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  1. /*
  2. * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
  3. * Rewrite, cleanup:
  4. * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #ifndef _ASM_POWERPC_TCE_H
  21. #define _ASM_POWERPC_TCE_H
  22. /*
  23. * Tces come in two formats, one for the virtual bus and a different
  24. * format for PCI
  25. */
  26. #define TCE_VB 0
  27. #define TCE_PCI 1
  28. /* TCE page size is 4096 bytes (1 << 12) */
  29. #define TCE_SHIFT 12
  30. #define TCE_PAGE_SIZE (1 << TCE_SHIFT)
  31. #define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
  32. /* tce_entry
  33. * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
  34. * abstracted so layout is irrelevant.
  35. */
  36. union tce_entry {
  37. unsigned long te_word;
  38. struct {
  39. unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
  40. unsigned int tb_rsvd :6;
  41. unsigned long tb_rpn :40; /* Real page number */
  42. unsigned int tb_valid :1; /* Tce is valid (vb only) */
  43. unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
  44. unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
  45. unsigned int tb_pciwr :1; /* Write allowed (pci only) */
  46. unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
  47. } te_bits;
  48. #define te_cacheBits te_bits.tb_cacheBits
  49. #define te_rpn te_bits.tb_rpn
  50. #define te_valid te_bits.tb_valid
  51. #define te_allio te_bits.tb_allio
  52. #define te_lpindex te_bits.tb_lpindex
  53. #define te_pciwr te_bits.tb_pciwr
  54. #define te_rdwr te_bits.tb_rdwr
  55. };
  56. #endif /* _ASM_POWERPC_TCE_H */