setup-common.c 16 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/utsname.h>
  26. #include <linux/screen_info.h>
  27. #include <linux/root_dev.h>
  28. #include <linux/notifier.h>
  29. #include <linux/cpu.h>
  30. #include <linux/unistd.h>
  31. #include <linux/serial.h>
  32. #include <linux/serial_8250.h>
  33. #include <linux/debugfs.h>
  34. #include <linux/percpu.h>
  35. #include <linux/lmb.h>
  36. #include <linux/of_platform.h>
  37. #include <linux/platform_device.h>
  38. #include <asm/io.h>
  39. #include <asm/prom.h>
  40. #include <asm/processor.h>
  41. #include <asm/vdso_datapage.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/smp.h>
  44. #include <asm/elf.h>
  45. #include <asm/machdep.h>
  46. #include <asm/time.h>
  47. #include <asm/cputable.h>
  48. #include <asm/sections.h>
  49. #include <asm/firmware.h>
  50. #include <asm/btext.h>
  51. #include <asm/nvram.h>
  52. #include <asm/setup.h>
  53. #include <asm/system.h>
  54. #include <asm/rtas.h>
  55. #include <asm/iommu.h>
  56. #include <asm/serial.h>
  57. #include <asm/cache.h>
  58. #include <asm/page.h>
  59. #include <asm/mmu.h>
  60. #include <asm/xmon.h>
  61. #include <asm/cputhreads.h>
  62. #include <mm/mmu_decl.h>
  63. #include "setup.h"
  64. #ifdef DEBUG
  65. #include <asm/udbg.h>
  66. #define DBG(fmt...) udbg_printf(fmt)
  67. #else
  68. #define DBG(fmt...)
  69. #endif
  70. /* The main machine-dep calls structure
  71. */
  72. struct machdep_calls ppc_md;
  73. EXPORT_SYMBOL(ppc_md);
  74. struct machdep_calls *machine_id;
  75. EXPORT_SYMBOL(machine_id);
  76. unsigned long klimit = (unsigned long) _end;
  77. char cmd_line[COMMAND_LINE_SIZE];
  78. /*
  79. * This still seems to be needed... -- paulus
  80. */
  81. struct screen_info screen_info = {
  82. .orig_x = 0,
  83. .orig_y = 25,
  84. .orig_video_cols = 80,
  85. .orig_video_lines = 25,
  86. .orig_video_isVGA = 1,
  87. .orig_video_points = 16
  88. };
  89. #ifdef __DO_IRQ_CANON
  90. /* XXX should go elsewhere eventually */
  91. int ppc_do_canonicalize_irqs;
  92. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  93. #endif
  94. /* also used by kexec */
  95. void machine_shutdown(void)
  96. {
  97. if (ppc_md.machine_shutdown)
  98. ppc_md.machine_shutdown();
  99. }
  100. void machine_restart(char *cmd)
  101. {
  102. machine_shutdown();
  103. if (ppc_md.restart)
  104. ppc_md.restart(cmd);
  105. #ifdef CONFIG_SMP
  106. smp_send_stop();
  107. #endif
  108. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  109. local_irq_disable();
  110. while (1) ;
  111. }
  112. void machine_power_off(void)
  113. {
  114. machine_shutdown();
  115. if (ppc_md.power_off)
  116. ppc_md.power_off();
  117. #ifdef CONFIG_SMP
  118. smp_send_stop();
  119. #endif
  120. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  121. local_irq_disable();
  122. while (1) ;
  123. }
  124. /* Used by the G5 thermal driver */
  125. EXPORT_SYMBOL_GPL(machine_power_off);
  126. void (*pm_power_off)(void) = machine_power_off;
  127. EXPORT_SYMBOL_GPL(pm_power_off);
  128. void machine_halt(void)
  129. {
  130. machine_shutdown();
  131. if (ppc_md.halt)
  132. ppc_md.halt();
  133. #ifdef CONFIG_SMP
  134. smp_send_stop();
  135. #endif
  136. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  137. local_irq_disable();
  138. while (1) ;
  139. }
  140. #ifdef CONFIG_TAU
  141. extern u32 cpu_temp(unsigned long cpu);
  142. extern u32 cpu_temp_both(unsigned long cpu);
  143. #endif /* CONFIG_TAU */
  144. #ifdef CONFIG_SMP
  145. DEFINE_PER_CPU(unsigned int, pvr);
  146. #endif
  147. static int show_cpuinfo(struct seq_file *m, void *v)
  148. {
  149. unsigned long cpu_id = (unsigned long)v - 1;
  150. unsigned int pvr;
  151. unsigned short maj;
  152. unsigned short min;
  153. if (cpu_id == NR_CPUS) {
  154. struct device_node *root;
  155. const char *model = NULL;
  156. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  157. unsigned long bogosum = 0;
  158. int i;
  159. for_each_online_cpu(i)
  160. bogosum += loops_per_jiffy;
  161. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  162. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  163. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  164. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  165. if (ppc_md.name)
  166. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  167. root = of_find_node_by_path("/");
  168. if (root)
  169. model = of_get_property(root, "model", NULL);
  170. if (model)
  171. seq_printf(m, "model\t\t: %s\n", model);
  172. of_node_put(root);
  173. if (ppc_md.show_cpuinfo != NULL)
  174. ppc_md.show_cpuinfo(m);
  175. #ifdef CONFIG_PPC32
  176. /* Display the amount of memory */
  177. seq_printf(m, "Memory\t\t: %d MB\n",
  178. (unsigned int)(total_memory / (1024 * 1024)));
  179. #endif
  180. return 0;
  181. }
  182. /* We only show online cpus: disable preempt (overzealous, I
  183. * knew) to prevent cpu going down. */
  184. preempt_disable();
  185. if (!cpu_online(cpu_id)) {
  186. preempt_enable();
  187. return 0;
  188. }
  189. #ifdef CONFIG_SMP
  190. pvr = per_cpu(pvr, cpu_id);
  191. #else
  192. pvr = mfspr(SPRN_PVR);
  193. #endif
  194. maj = (pvr >> 8) & 0xFF;
  195. min = pvr & 0xFF;
  196. seq_printf(m, "processor\t: %lu\n", cpu_id);
  197. seq_printf(m, "cpu\t\t: ");
  198. if (cur_cpu_spec->pvr_mask)
  199. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  200. else
  201. seq_printf(m, "unknown (%08x)", pvr);
  202. #ifdef CONFIG_ALTIVEC
  203. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  204. seq_printf(m, ", altivec supported");
  205. #endif /* CONFIG_ALTIVEC */
  206. seq_printf(m, "\n");
  207. #ifdef CONFIG_TAU
  208. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  209. #ifdef CONFIG_TAU_AVERAGE
  210. /* more straightforward, but potentially misleading */
  211. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  212. cpu_temp(cpu_id));
  213. #else
  214. /* show the actual temp sensor range */
  215. u32 temp;
  216. temp = cpu_temp_both(cpu_id);
  217. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  218. temp & 0xff, temp >> 16);
  219. #endif
  220. }
  221. #endif /* CONFIG_TAU */
  222. /*
  223. * Assume here that all clock rates are the same in a
  224. * smp system. -- Cort
  225. */
  226. if (ppc_proc_freq)
  227. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  228. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  229. if (ppc_md.show_percpuinfo != NULL)
  230. ppc_md.show_percpuinfo(m, cpu_id);
  231. /* If we are a Freescale core do a simple check so
  232. * we dont have to keep adding cases in the future */
  233. if (PVR_VER(pvr) & 0x8000) {
  234. switch (PVR_VER(pvr)) {
  235. case 0x8000: /* 7441/7450/7451, Voyager */
  236. case 0x8001: /* 7445/7455, Apollo 6 */
  237. case 0x8002: /* 7447/7457, Apollo 7 */
  238. case 0x8003: /* 7447A, Apollo 7 PM */
  239. case 0x8004: /* 7448, Apollo 8 */
  240. case 0x800c: /* 7410, Nitro */
  241. maj = ((pvr >> 8) & 0xF);
  242. min = PVR_MIN(pvr);
  243. break;
  244. default: /* e500/book-e */
  245. maj = PVR_MAJ(pvr);
  246. min = PVR_MIN(pvr);
  247. break;
  248. }
  249. } else {
  250. switch (PVR_VER(pvr)) {
  251. case 0x0020: /* 403 family */
  252. maj = PVR_MAJ(pvr) + 1;
  253. min = PVR_MIN(pvr);
  254. break;
  255. case 0x1008: /* 740P/750P ?? */
  256. maj = ((pvr >> 8) & 0xFF) - 1;
  257. min = pvr & 0xFF;
  258. break;
  259. default:
  260. maj = (pvr >> 8) & 0xFF;
  261. min = pvr & 0xFF;
  262. break;
  263. }
  264. }
  265. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  266. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  267. #ifdef CONFIG_PPC32
  268. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  269. loops_per_jiffy / (500000/HZ),
  270. (loops_per_jiffy / (5000/HZ)) % 100);
  271. #endif
  272. #ifdef CONFIG_SMP
  273. seq_printf(m, "\n");
  274. #endif
  275. preempt_enable();
  276. return 0;
  277. }
  278. static void *c_start(struct seq_file *m, loff_t *pos)
  279. {
  280. unsigned long i = *pos;
  281. return i <= NR_CPUS ? (void *)(i + 1) : NULL;
  282. }
  283. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  284. {
  285. ++*pos;
  286. return c_start(m, pos);
  287. }
  288. static void c_stop(struct seq_file *m, void *v)
  289. {
  290. }
  291. struct seq_operations cpuinfo_op = {
  292. .start =c_start,
  293. .next = c_next,
  294. .stop = c_stop,
  295. .show = show_cpuinfo,
  296. };
  297. void __init check_for_initrd(void)
  298. {
  299. #ifdef CONFIG_BLK_DEV_INITRD
  300. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  301. initrd_start, initrd_end);
  302. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  303. * look sensible. If not, clear initrd reference.
  304. */
  305. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  306. initrd_end > initrd_start)
  307. ROOT_DEV = Root_RAM0;
  308. else
  309. initrd_start = initrd_end = 0;
  310. if (initrd_start)
  311. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  312. DBG(" <- check_for_initrd()\n");
  313. #endif /* CONFIG_BLK_DEV_INITRD */
  314. }
  315. #ifdef CONFIG_SMP
  316. int threads_per_core, threads_shift;
  317. cpumask_t threads_core_mask;
  318. static void __init cpu_init_thread_core_maps(int tpc)
  319. {
  320. int i;
  321. threads_per_core = tpc;
  322. threads_core_mask = CPU_MASK_NONE;
  323. /* This implementation only supports power of 2 number of threads
  324. * for simplicity and performance
  325. */
  326. threads_shift = ilog2(tpc);
  327. BUG_ON(tpc != (1 << threads_shift));
  328. for (i = 0; i < tpc; i++)
  329. cpu_set(i, threads_core_mask);
  330. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  331. tpc, tpc > 1 ? "s" : "");
  332. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  333. }
  334. /**
  335. * setup_cpu_maps - initialize the following cpu maps:
  336. * cpu_possible_map
  337. * cpu_present_map
  338. *
  339. * Having the possible map set up early allows us to restrict allocations
  340. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  341. *
  342. * We do not initialize the online map here; cpus set their own bits in
  343. * cpu_online_map as they come up.
  344. *
  345. * This function is valid only for Open Firmware systems. finish_device_tree
  346. * must be called before using this.
  347. *
  348. * While we're here, we may as well set the "physical" cpu ids in the paca.
  349. *
  350. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  351. */
  352. void __init smp_setup_cpu_maps(void)
  353. {
  354. struct device_node *dn = NULL;
  355. int cpu = 0;
  356. int nthreads = 1;
  357. DBG("smp_setup_cpu_maps()\n");
  358. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  359. const int *intserv;
  360. int j, len;
  361. DBG(" * %s...\n", dn->full_name);
  362. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  363. &len);
  364. if (intserv) {
  365. nthreads = len / sizeof(int);
  366. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  367. nthreads);
  368. } else {
  369. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  370. intserv = of_get_property(dn, "reg", NULL);
  371. if (!intserv)
  372. intserv = &cpu; /* assume logical == phys */
  373. }
  374. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  375. DBG(" thread %d -> cpu %d (hard id %d)\n",
  376. j, cpu, intserv[j]);
  377. cpu_set(cpu, cpu_present_map);
  378. set_hard_smp_processor_id(cpu, intserv[j]);
  379. cpu_set(cpu, cpu_possible_map);
  380. cpu++;
  381. }
  382. }
  383. /* If no SMT supported, nthreads is forced to 1 */
  384. if (!cpu_has_feature(CPU_FTR_SMT)) {
  385. DBG(" SMT disabled ! nthreads forced to 1\n");
  386. nthreads = 1;
  387. }
  388. #ifdef CONFIG_PPC64
  389. /*
  390. * On pSeries LPAR, we need to know how many cpus
  391. * could possibly be added to this partition.
  392. */
  393. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  394. (dn = of_find_node_by_path("/rtas"))) {
  395. int num_addr_cell, num_size_cell, maxcpus;
  396. const unsigned int *ireg;
  397. num_addr_cell = of_n_addr_cells(dn);
  398. num_size_cell = of_n_size_cells(dn);
  399. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  400. if (!ireg)
  401. goto out;
  402. maxcpus = ireg[num_addr_cell + num_size_cell];
  403. /* Double maxcpus for processors which have SMT capability */
  404. if (cpu_has_feature(CPU_FTR_SMT))
  405. maxcpus *= nthreads;
  406. if (maxcpus > NR_CPUS) {
  407. printk(KERN_WARNING
  408. "Partition configured for %d cpus, "
  409. "operating system maximum is %d.\n",
  410. maxcpus, NR_CPUS);
  411. maxcpus = NR_CPUS;
  412. } else
  413. printk(KERN_INFO "Partition configured for %d cpus.\n",
  414. maxcpus);
  415. for (cpu = 0; cpu < maxcpus; cpu++)
  416. cpu_set(cpu, cpu_possible_map);
  417. out:
  418. of_node_put(dn);
  419. }
  420. vdso_data->processorCount = num_present_cpus();
  421. #endif /* CONFIG_PPC64 */
  422. /* Initialize CPU <=> thread mapping/
  423. *
  424. * WARNING: We assume that the number of threads is the same for
  425. * every CPU in the system. If that is not the case, then some code
  426. * here will have to be reworked
  427. */
  428. cpu_init_thread_core_maps(nthreads);
  429. }
  430. #endif /* CONFIG_SMP */
  431. #ifdef CONFIG_PCSPKR_PLATFORM
  432. static __init int add_pcspkr(void)
  433. {
  434. struct device_node *np;
  435. struct platform_device *pd;
  436. int ret;
  437. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  438. of_node_put(np);
  439. if (!np)
  440. return -ENODEV;
  441. pd = platform_device_alloc("pcspkr", -1);
  442. if (!pd)
  443. return -ENOMEM;
  444. ret = platform_device_add(pd);
  445. if (ret)
  446. platform_device_put(pd);
  447. return ret;
  448. }
  449. device_initcall(add_pcspkr);
  450. #endif /* CONFIG_PCSPKR_PLATFORM */
  451. void probe_machine(void)
  452. {
  453. extern struct machdep_calls __machine_desc_start;
  454. extern struct machdep_calls __machine_desc_end;
  455. /*
  456. * Iterate all ppc_md structures until we find the proper
  457. * one for the current machine type
  458. */
  459. DBG("Probing machine type ...\n");
  460. for (machine_id = &__machine_desc_start;
  461. machine_id < &__machine_desc_end;
  462. machine_id++) {
  463. DBG(" %s ...", machine_id->name);
  464. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  465. if (ppc_md.probe()) {
  466. DBG(" match !\n");
  467. break;
  468. }
  469. DBG("\n");
  470. }
  471. /* What can we do if we didn't find ? */
  472. if (machine_id >= &__machine_desc_end) {
  473. DBG("No suitable machine found !\n");
  474. for (;;);
  475. }
  476. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  477. }
  478. /* Match a class of boards, not a specific device configuration. */
  479. int check_legacy_ioport(unsigned long base_port)
  480. {
  481. struct device_node *parent, *np = NULL;
  482. int ret = -ENODEV;
  483. switch(base_port) {
  484. case I8042_DATA_REG:
  485. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  486. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  487. if (np) {
  488. parent = of_get_parent(np);
  489. of_node_put(np);
  490. np = parent;
  491. break;
  492. }
  493. np = of_find_node_by_type(NULL, "8042");
  494. /* Pegasos has no device_type on its 8042 node, look for the
  495. * name instead */
  496. if (!np)
  497. np = of_find_node_by_name(NULL, "8042");
  498. break;
  499. case FDC_BASE: /* FDC1 */
  500. np = of_find_node_by_type(NULL, "fdc");
  501. break;
  502. #ifdef CONFIG_PPC_PREP
  503. case _PIDXR:
  504. case _PNPWRP:
  505. case PNPBIOS_BASE:
  506. /* implement me */
  507. #endif
  508. default:
  509. /* ipmi is supposed to fail here */
  510. break;
  511. }
  512. if (!np)
  513. return ret;
  514. parent = of_get_parent(np);
  515. if (parent) {
  516. if (strcmp(parent->type, "isa") == 0)
  517. ret = 0;
  518. of_node_put(parent);
  519. }
  520. of_node_put(np);
  521. return ret;
  522. }
  523. EXPORT_SYMBOL(check_legacy_ioport);
  524. static int ppc_panic_event(struct notifier_block *this,
  525. unsigned long event, void *ptr)
  526. {
  527. ppc_md.panic(ptr); /* May not return */
  528. return NOTIFY_DONE;
  529. }
  530. static struct notifier_block ppc_panic_block = {
  531. .notifier_call = ppc_panic_event,
  532. .priority = INT_MIN /* may not return; must be done last */
  533. };
  534. void __init setup_panic(void)
  535. {
  536. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  537. }
  538. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  539. /*
  540. * For platforms that have configurable cache-coherency. This function
  541. * checks that the cache coherency setting of the kernel matches the setting
  542. * left by the firmware, as indicated in the device tree. Since a mismatch
  543. * will eventually result in DMA failures, we print * and error and call
  544. * BUG() in that case.
  545. */
  546. #ifdef CONFIG_NOT_COHERENT_CACHE
  547. #define KERNEL_COHERENCY 0
  548. #else
  549. #define KERNEL_COHERENCY 1
  550. #endif
  551. static int __init check_cache_coherency(void)
  552. {
  553. struct device_node *np;
  554. const void *prop;
  555. int devtree_coherency;
  556. np = of_find_node_by_path("/");
  557. prop = of_get_property(np, "coherency-off", NULL);
  558. of_node_put(np);
  559. devtree_coherency = prop ? 0 : 1;
  560. if (devtree_coherency != KERNEL_COHERENCY) {
  561. printk(KERN_ERR
  562. "kernel coherency:%s != device tree_coherency:%s\n",
  563. KERNEL_COHERENCY ? "on" : "off",
  564. devtree_coherency ? "on" : "off");
  565. BUG();
  566. }
  567. return 0;
  568. }
  569. late_initcall(check_cache_coherency);
  570. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  571. #ifdef CONFIG_DEBUG_FS
  572. struct dentry *powerpc_debugfs_root;
  573. static int powerpc_debugfs_init(void)
  574. {
  575. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  576. return powerpc_debugfs_root == NULL;
  577. }
  578. arch_initcall(powerpc_debugfs_init);
  579. #endif
  580. static int ppc_dflt_bus_notify(struct notifier_block *nb,
  581. unsigned long action, void *data)
  582. {
  583. struct device *dev = data;
  584. /* We are only intereted in device addition */
  585. if (action != BUS_NOTIFY_ADD_DEVICE)
  586. return 0;
  587. set_dma_ops(dev, &dma_direct_ops);
  588. return NOTIFY_DONE;
  589. }
  590. static struct notifier_block ppc_dflt_plat_bus_notifier = {
  591. .notifier_call = ppc_dflt_bus_notify,
  592. .priority = INT_MAX,
  593. };
  594. static struct notifier_block ppc_dflt_of_bus_notifier = {
  595. .notifier_call = ppc_dflt_bus_notify,
  596. .priority = INT_MAX,
  597. };
  598. static int __init setup_bus_notifier(void)
  599. {
  600. bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
  601. bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier);
  602. return 0;
  603. }
  604. arch_initcall(setup_bus_notifier);