irq_handler.S 1.5 KB

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  1. /*
  2. * linux/arch/mips/tx4938/common/handler.S
  3. *
  4. * Primary interrupt handler for tx4938 based systems
  5. * Copyright (C) 2000-2001 Toshiba Corporation
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
  8. * terms of the GNU General Public License version 2. This program is
  9. * licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. *
  12. * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  13. */
  14. #include <asm/asm.h>
  15. #include <asm/mipsregs.h>
  16. #include <asm/addrspace.h>
  17. #include <asm/regdef.h>
  18. #include <asm/stackframe.h>
  19. #include <asm/tx4938/rbtx4938.h>
  20. .align 5
  21. NESTED(tx4938_irq_handler, PT_SIZE, sp)
  22. SAVE_ALL
  23. CLI
  24. .set at
  25. mfc0 t0, CP0_CAUSE
  26. mfc0 t1, CP0_STATUS
  27. and t0, t1
  28. andi t1, t0, STATUSF_IP7 /* cpu timer */
  29. bnez t1, ll_ip7
  30. /* IP6..IP3 multiplexed -- do not use */
  31. andi t1, t0, STATUSF_IP2 /* tx4938 pic */
  32. bnez t1, ll_ip2
  33. andi t1, t0, STATUSF_IP1 /* user line 1 */
  34. bnez t1, ll_ip1
  35. andi t1, t0, STATUSF_IP0 /* user line 0 */
  36. bnez t1, ll_ip0
  37. .set reorder
  38. nop
  39. END(tx4938_irq_handler)
  40. .align 5
  41. ll_ip7:
  42. li a0, TX4938_IRQ_CPU_TIMER
  43. move a1, sp
  44. jal do_IRQ
  45. j ret_from_irq
  46. ll_ip2:
  47. jal tx4938_irq_nested
  48. nop
  49. beqz v0, goto_spurious_interrupt
  50. nop
  51. move a0, v0
  52. move a1, sp
  53. jal do_IRQ
  54. j ret_from_irq
  55. goto_spurious_interrupt:
  56. j ret_from_irq
  57. ll_ip1:
  58. li a0, TX4938_IRQ_USER1
  59. move a1, sp
  60. jal do_IRQ
  61. j ret_from_irq
  62. ll_ip0:
  63. li a0, TX4938_IRQ_USER0
  64. move a1, sp
  65. jal do_IRQ
  66. j ret_from_irq