rtl8187_dev.c 24 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187 USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Realtek */
  31. {USB_DEVICE(0x0bda, 0x8187)},
  32. /* Netgear */
  33. {USB_DEVICE(0x0846, 0x6100)},
  34. {USB_DEVICE(0x0846, 0x6a00)},
  35. /* HP */
  36. {USB_DEVICE(0x03f0, 0xca02)},
  37. /* Sitecom */
  38. {USB_DEVICE(0x0df6, 0x000d)},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  42. static const struct ieee80211_rate rtl818x_rates[] = {
  43. { .bitrate = 10, .hw_value = 0, },
  44. { .bitrate = 20, .hw_value = 1, },
  45. { .bitrate = 55, .hw_value = 2, },
  46. { .bitrate = 110, .hw_value = 3, },
  47. { .bitrate = 60, .hw_value = 4, },
  48. { .bitrate = 90, .hw_value = 5, },
  49. { .bitrate = 120, .hw_value = 6, },
  50. { .bitrate = 180, .hw_value = 7, },
  51. { .bitrate = 240, .hw_value = 8, },
  52. { .bitrate = 360, .hw_value = 9, },
  53. { .bitrate = 480, .hw_value = 10, },
  54. { .bitrate = 540, .hw_value = 11, },
  55. };
  56. static const struct ieee80211_channel rtl818x_channels[] = {
  57. { .center_freq = 2412 },
  58. { .center_freq = 2417 },
  59. { .center_freq = 2422 },
  60. { .center_freq = 2427 },
  61. { .center_freq = 2432 },
  62. { .center_freq = 2437 },
  63. { .center_freq = 2442 },
  64. { .center_freq = 2447 },
  65. { .center_freq = 2452 },
  66. { .center_freq = 2457 },
  67. { .center_freq = 2462 },
  68. { .center_freq = 2467 },
  69. { .center_freq = 2472 },
  70. { .center_freq = 2484 },
  71. };
  72. static void rtl8187_iowrite_async_cb(struct urb *urb)
  73. {
  74. kfree(urb->context);
  75. usb_free_urb(urb);
  76. }
  77. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  78. void *data, u16 len)
  79. {
  80. struct usb_ctrlrequest *dr;
  81. struct urb *urb;
  82. struct rtl8187_async_write_data {
  83. u8 data[4];
  84. struct usb_ctrlrequest dr;
  85. } *buf;
  86. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  87. if (!buf)
  88. return;
  89. urb = usb_alloc_urb(0, GFP_ATOMIC);
  90. if (!urb) {
  91. kfree(buf);
  92. return;
  93. }
  94. dr = &buf->dr;
  95. dr->bRequestType = RTL8187_REQT_WRITE;
  96. dr->bRequest = RTL8187_REQ_SET_REG;
  97. dr->wValue = addr;
  98. dr->wIndex = 0;
  99. dr->wLength = cpu_to_le16(len);
  100. memcpy(buf, data, len);
  101. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  102. (unsigned char *)dr, buf, len,
  103. rtl8187_iowrite_async_cb, buf);
  104. usb_submit_urb(urb, GFP_ATOMIC);
  105. }
  106. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  107. __le32 *addr, u32 val)
  108. {
  109. __le32 buf = cpu_to_le32(val);
  110. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  111. &buf, sizeof(buf));
  112. }
  113. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  114. {
  115. struct rtl8187_priv *priv = dev->priv;
  116. data <<= 8;
  117. data |= addr | 0x80;
  118. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  119. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  120. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  121. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  122. msleep(1);
  123. }
  124. static void rtl8187_tx_cb(struct urb *urb)
  125. {
  126. struct sk_buff *skb = (struct sk_buff *)urb->context;
  127. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  128. struct ieee80211_hw *hw = info->driver_data[0];
  129. usb_free_urb(info->driver_data[1]);
  130. skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
  131. memset(&info->status, 0, sizeof(info->status));
  132. info->flags |= IEEE80211_TX_STAT_ACK;
  133. ieee80211_tx_status_irqsafe(hw, skb);
  134. }
  135. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  136. {
  137. struct rtl8187_priv *priv = dev->priv;
  138. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  139. struct rtl8187_tx_hdr *hdr;
  140. struct urb *urb;
  141. __le16 rts_dur = 0;
  142. u32 flags;
  143. urb = usb_alloc_urb(0, GFP_ATOMIC);
  144. if (!urb) {
  145. kfree_skb(skb);
  146. return 0;
  147. }
  148. flags = skb->len;
  149. flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
  150. flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
  151. if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
  152. flags |= RTL8187_TX_FLAG_MORE_FRAG;
  153. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  154. flags |= RTL8187_TX_FLAG_RTS;
  155. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  156. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  157. skb->len, info);
  158. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  159. flags |= RTL8187_TX_FLAG_CTS;
  160. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  161. }
  162. hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  163. hdr->flags = cpu_to_le32(flags);
  164. hdr->len = 0;
  165. hdr->rts_duration = rts_dur;
  166. hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
  167. info->driver_data[0] = dev;
  168. info->driver_data[1] = urb;
  169. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
  170. hdr, skb->len, rtl8187_tx_cb, skb);
  171. usb_submit_urb(urb, GFP_ATOMIC);
  172. return 0;
  173. }
  174. static void rtl8187_rx_cb(struct urb *urb)
  175. {
  176. struct sk_buff *skb = (struct sk_buff *)urb->context;
  177. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  178. struct ieee80211_hw *dev = info->dev;
  179. struct rtl8187_priv *priv = dev->priv;
  180. struct rtl8187_rx_hdr *hdr;
  181. struct ieee80211_rx_status rx_status = { 0 };
  182. int rate, signal;
  183. u32 flags;
  184. spin_lock(&priv->rx_queue.lock);
  185. if (skb->next)
  186. __skb_unlink(skb, &priv->rx_queue);
  187. else {
  188. spin_unlock(&priv->rx_queue.lock);
  189. return;
  190. }
  191. spin_unlock(&priv->rx_queue.lock);
  192. if (unlikely(urb->status)) {
  193. usb_free_urb(urb);
  194. dev_kfree_skb_irq(skb);
  195. return;
  196. }
  197. skb_put(skb, urb->actual_length);
  198. hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
  199. flags = le32_to_cpu(hdr->flags);
  200. skb_trim(skb, flags & 0x0FFF);
  201. signal = hdr->agc >> 1;
  202. rate = (flags >> 20) & 0xF;
  203. if (rate > 3) { /* OFDM rate */
  204. if (signal > 90)
  205. signal = 90;
  206. else if (signal < 25)
  207. signal = 25;
  208. signal = 90 - signal;
  209. } else { /* CCK rate */
  210. if (signal > 95)
  211. signal = 95;
  212. else if (signal < 30)
  213. signal = 30;
  214. signal = 95 - signal;
  215. }
  216. rx_status.antenna = (hdr->signal >> 7) & 1;
  217. rx_status.qual = 64 - min(hdr->noise, (u8)64);
  218. rx_status.signal = signal;
  219. rx_status.rate_idx = rate;
  220. rx_status.freq = dev->conf.channel->center_freq;
  221. rx_status.band = dev->conf.channel->band;
  222. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  223. rx_status.flag |= RX_FLAG_TSFT;
  224. if (flags & (1 << 13))
  225. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  226. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  227. skb = dev_alloc_skb(RTL8187_MAX_RX);
  228. if (unlikely(!skb)) {
  229. usb_free_urb(urb);
  230. /* TODO check rx queue length and refill *somewhere* */
  231. return;
  232. }
  233. info = (struct rtl8187_rx_info *)skb->cb;
  234. info->urb = urb;
  235. info->dev = dev;
  236. urb->transfer_buffer = skb_tail_pointer(skb);
  237. urb->context = skb;
  238. skb_queue_tail(&priv->rx_queue, skb);
  239. usb_submit_urb(urb, GFP_ATOMIC);
  240. }
  241. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  242. {
  243. struct rtl8187_priv *priv = dev->priv;
  244. struct urb *entry;
  245. struct sk_buff *skb;
  246. struct rtl8187_rx_info *info;
  247. while (skb_queue_len(&priv->rx_queue) < 8) {
  248. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  249. if (!skb)
  250. break;
  251. entry = usb_alloc_urb(0, GFP_KERNEL);
  252. if (!entry) {
  253. kfree_skb(skb);
  254. break;
  255. }
  256. usb_fill_bulk_urb(entry, priv->udev,
  257. usb_rcvbulkpipe(priv->udev, 1),
  258. skb_tail_pointer(skb),
  259. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  260. info = (struct rtl8187_rx_info *)skb->cb;
  261. info->urb = entry;
  262. info->dev = dev;
  263. skb_queue_tail(&priv->rx_queue, skb);
  264. usb_submit_urb(entry, GFP_KERNEL);
  265. }
  266. return 0;
  267. }
  268. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  269. {
  270. struct rtl8187_priv *priv = dev->priv;
  271. u8 reg;
  272. int i;
  273. /* reset */
  274. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  275. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  276. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  277. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  278. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  279. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  280. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  281. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  282. msleep(200);
  283. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  284. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  285. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  286. msleep(200);
  287. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  288. reg &= (1 << 1);
  289. reg |= RTL818X_CMD_RESET;
  290. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  291. i = 10;
  292. do {
  293. msleep(2);
  294. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  295. RTL818X_CMD_RESET))
  296. break;
  297. } while (--i);
  298. if (!i) {
  299. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  300. return -ETIMEDOUT;
  301. }
  302. /* reload registers from eeprom */
  303. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  304. i = 10;
  305. do {
  306. msleep(4);
  307. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  308. RTL818X_EEPROM_CMD_CONFIG))
  309. break;
  310. } while (--i);
  311. if (!i) {
  312. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  313. wiphy_name(dev->wiphy));
  314. return -ETIMEDOUT;
  315. }
  316. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  317. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  318. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  319. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  320. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  321. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  322. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  323. /* setup card */
  324. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  325. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  326. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  327. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  328. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  329. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  330. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  331. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  332. reg &= 0x3F;
  333. reg |= 0x80;
  334. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  335. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  336. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  337. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  338. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  339. // TODO: set RESP_RATE and BRSR properly
  340. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  341. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  342. /* host_usb_init */
  343. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  344. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  345. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  346. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  347. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  348. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  349. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  350. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  351. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  352. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  353. msleep(100);
  354. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  355. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  356. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  357. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  358. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  359. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  360. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  361. msleep(100);
  362. priv->rf->init(dev);
  363. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  364. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  365. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  366. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  367. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  368. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  369. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  370. return 0;
  371. }
  372. static int rtl8187_start(struct ieee80211_hw *dev)
  373. {
  374. struct rtl8187_priv *priv = dev->priv;
  375. u32 reg;
  376. int ret;
  377. ret = rtl8187_init_hw(dev);
  378. if (ret)
  379. return ret;
  380. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  381. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  382. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  383. rtl8187_init_urbs(dev);
  384. reg = RTL818X_RX_CONF_ONLYERLPKT |
  385. RTL818X_RX_CONF_RX_AUTORESETPHY |
  386. RTL818X_RX_CONF_BSSID |
  387. RTL818X_RX_CONF_MGMT |
  388. RTL818X_RX_CONF_DATA |
  389. (7 << 13 /* RX FIFO threshold NONE */) |
  390. (7 << 10 /* MAX RX DMA */) |
  391. RTL818X_RX_CONF_BROADCAST |
  392. RTL818X_RX_CONF_NICMAC;
  393. priv->rx_conf = reg;
  394. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  395. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  396. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  397. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  398. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  399. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  400. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  401. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  402. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  403. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  404. reg = RTL818X_TX_CONF_CW_MIN |
  405. (7 << 21 /* MAX TX DMA */) |
  406. RTL818X_TX_CONF_NO_ICV;
  407. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  408. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  409. reg |= RTL818X_CMD_TX_ENABLE;
  410. reg |= RTL818X_CMD_RX_ENABLE;
  411. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  412. return 0;
  413. }
  414. static void rtl8187_stop(struct ieee80211_hw *dev)
  415. {
  416. struct rtl8187_priv *priv = dev->priv;
  417. struct rtl8187_rx_info *info;
  418. struct sk_buff *skb;
  419. u32 reg;
  420. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  421. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  422. reg &= ~RTL818X_CMD_TX_ENABLE;
  423. reg &= ~RTL818X_CMD_RX_ENABLE;
  424. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  425. priv->rf->stop(dev);
  426. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  427. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  428. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  429. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  430. while ((skb = skb_dequeue(&priv->rx_queue))) {
  431. info = (struct rtl8187_rx_info *)skb->cb;
  432. usb_kill_urb(info->urb);
  433. kfree_skb(skb);
  434. }
  435. return;
  436. }
  437. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  438. struct ieee80211_if_init_conf *conf)
  439. {
  440. struct rtl8187_priv *priv = dev->priv;
  441. int i;
  442. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  443. return -EOPNOTSUPP;
  444. switch (conf->type) {
  445. case IEEE80211_IF_TYPE_STA:
  446. priv->mode = conf->type;
  447. break;
  448. default:
  449. return -EOPNOTSUPP;
  450. }
  451. priv->vif = conf->vif;
  452. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  453. for (i = 0; i < ETH_ALEN; i++)
  454. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  455. ((u8 *)conf->mac_addr)[i]);
  456. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  457. return 0;
  458. }
  459. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  460. struct ieee80211_if_init_conf *conf)
  461. {
  462. struct rtl8187_priv *priv = dev->priv;
  463. priv->mode = IEEE80211_IF_TYPE_MNTR;
  464. priv->vif = NULL;
  465. }
  466. static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  467. {
  468. struct rtl8187_priv *priv = dev->priv;
  469. u32 reg;
  470. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  471. /* Enable TX loopback on MAC level to avoid TX during channel
  472. * changes, as this has be seen to causes problems and the
  473. * card will stop work until next reset
  474. */
  475. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  476. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  477. msleep(10);
  478. priv->rf->set_chan(dev, conf);
  479. msleep(10);
  480. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  481. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  482. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  483. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  484. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  485. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  486. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  487. } else {
  488. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  489. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  490. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  491. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  492. }
  493. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  494. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  495. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  496. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  497. return 0;
  498. }
  499. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  500. struct ieee80211_vif *vif,
  501. struct ieee80211_if_conf *conf)
  502. {
  503. struct rtl8187_priv *priv = dev->priv;
  504. int i;
  505. for (i = 0; i < ETH_ALEN; i++)
  506. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  507. if (is_valid_ether_addr(conf->bssid))
  508. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
  509. else
  510. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
  511. return 0;
  512. }
  513. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  514. unsigned int changed_flags,
  515. unsigned int *total_flags,
  516. int mc_count, struct dev_addr_list *mclist)
  517. {
  518. struct rtl8187_priv *priv = dev->priv;
  519. if (changed_flags & FIF_FCSFAIL)
  520. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  521. if (changed_flags & FIF_CONTROL)
  522. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  523. if (changed_flags & FIF_OTHER_BSS)
  524. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  525. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  526. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  527. else
  528. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  529. *total_flags = 0;
  530. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  531. *total_flags |= FIF_FCSFAIL;
  532. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  533. *total_flags |= FIF_CONTROL;
  534. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  535. *total_flags |= FIF_OTHER_BSS;
  536. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  537. *total_flags |= FIF_ALLMULTI;
  538. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  539. }
  540. static const struct ieee80211_ops rtl8187_ops = {
  541. .tx = rtl8187_tx,
  542. .start = rtl8187_start,
  543. .stop = rtl8187_stop,
  544. .add_interface = rtl8187_add_interface,
  545. .remove_interface = rtl8187_remove_interface,
  546. .config = rtl8187_config,
  547. .config_interface = rtl8187_config_interface,
  548. .configure_filter = rtl8187_configure_filter,
  549. };
  550. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  551. {
  552. struct ieee80211_hw *dev = eeprom->data;
  553. struct rtl8187_priv *priv = dev->priv;
  554. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  555. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  556. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  557. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  558. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  559. }
  560. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  561. {
  562. struct ieee80211_hw *dev = eeprom->data;
  563. struct rtl8187_priv *priv = dev->priv;
  564. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  565. if (eeprom->reg_data_in)
  566. reg |= RTL818X_EEPROM_CMD_WRITE;
  567. if (eeprom->reg_data_out)
  568. reg |= RTL818X_EEPROM_CMD_READ;
  569. if (eeprom->reg_data_clock)
  570. reg |= RTL818X_EEPROM_CMD_CK;
  571. if (eeprom->reg_chip_select)
  572. reg |= RTL818X_EEPROM_CMD_CS;
  573. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  574. udelay(10);
  575. }
  576. static int __devinit rtl8187_probe(struct usb_interface *intf,
  577. const struct usb_device_id *id)
  578. {
  579. struct usb_device *udev = interface_to_usbdev(intf);
  580. struct ieee80211_hw *dev;
  581. struct rtl8187_priv *priv;
  582. struct eeprom_93cx6 eeprom;
  583. struct ieee80211_channel *channel;
  584. u16 txpwr, reg;
  585. int err, i;
  586. DECLARE_MAC_BUF(mac);
  587. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  588. if (!dev) {
  589. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  590. return -ENOMEM;
  591. }
  592. priv = dev->priv;
  593. SET_IEEE80211_DEV(dev, &intf->dev);
  594. usb_set_intfdata(intf, dev);
  595. priv->udev = udev;
  596. usb_get_dev(udev);
  597. skb_queue_head_init(&priv->rx_queue);
  598. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  599. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  600. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  601. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  602. priv->map = (struct rtl818x_csr *)0xFF00;
  603. priv->band.band = IEEE80211_BAND_2GHZ;
  604. priv->band.channels = priv->channels;
  605. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  606. priv->band.bitrates = priv->rates;
  607. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  608. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  609. priv->mode = IEEE80211_IF_TYPE_MNTR;
  610. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  611. IEEE80211_HW_RX_INCLUDES_FCS |
  612. IEEE80211_HW_SIGNAL_UNSPEC;
  613. dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
  614. dev->queues = 1;
  615. dev->max_signal = 65;
  616. eeprom.data = dev;
  617. eeprom.register_read = rtl8187_eeprom_register_read;
  618. eeprom.register_write = rtl8187_eeprom_register_write;
  619. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  620. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  621. else
  622. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  623. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  624. udelay(10);
  625. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  626. (__le16 __force *)dev->wiphy->perm_addr, 3);
  627. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  628. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  629. "generated MAC address\n");
  630. random_ether_addr(dev->wiphy->perm_addr);
  631. }
  632. channel = priv->channels;
  633. for (i = 0; i < 3; i++) {
  634. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  635. &txpwr);
  636. (*channel++).hw_value = txpwr & 0xFF;
  637. (*channel++).hw_value = txpwr >> 8;
  638. }
  639. for (i = 0; i < 2; i++) {
  640. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  641. &txpwr);
  642. (*channel++).hw_value = txpwr & 0xFF;
  643. (*channel++).hw_value = txpwr >> 8;
  644. }
  645. for (i = 0; i < 2; i++) {
  646. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  647. &txpwr);
  648. (*channel++).hw_value = txpwr & 0xFF;
  649. (*channel++).hw_value = txpwr >> 8;
  650. }
  651. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  652. &priv->txpwr_base);
  653. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  654. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  655. /* 0 means asic B-cut, we should use SW 3 wire
  656. * bit-by-bit banging for radio. 1 means we can use
  657. * USB specific request to write radio registers */
  658. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  659. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  660. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  661. priv->rf = rtl8187_detect_rf(dev);
  662. err = ieee80211_register_hw(dev);
  663. if (err) {
  664. printk(KERN_ERR "rtl8187: Cannot register device\n");
  665. goto err_free_dev;
  666. }
  667. printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
  668. wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
  669. priv->asic_rev, priv->rf->name);
  670. return 0;
  671. err_free_dev:
  672. ieee80211_free_hw(dev);
  673. usb_set_intfdata(intf, NULL);
  674. usb_put_dev(udev);
  675. return err;
  676. }
  677. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  678. {
  679. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  680. struct rtl8187_priv *priv;
  681. if (!dev)
  682. return;
  683. ieee80211_unregister_hw(dev);
  684. priv = dev->priv;
  685. usb_put_dev(interface_to_usbdev(intf));
  686. ieee80211_free_hw(dev);
  687. }
  688. static struct usb_driver rtl8187_driver = {
  689. .name = KBUILD_MODNAME,
  690. .id_table = rtl8187_table,
  691. .probe = rtl8187_probe,
  692. .disconnect = rtl8187_disconnect,
  693. };
  694. static int __init rtl8187_init(void)
  695. {
  696. return usb_register(&rtl8187_driver);
  697. }
  698. static void __exit rtl8187_exit(void)
  699. {
  700. usb_deregister(&rtl8187_driver);
  701. }
  702. module_init(rtl8187_init);
  703. module_exit(rtl8187_exit);