lmc_main.c 63 KB

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  1. /*
  2. * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
  3. * All rights reserved. www.lanmedia.com
  4. *
  5. * This code is written by:
  6. * Andrew Stanley-Jones (asj@cban.com)
  7. * Rob Braun (bbraun@vix.com),
  8. * Michael Graff (explorer@vix.com) and
  9. * Matt Thomas (matt@3am-software.com).
  10. *
  11. * With Help By:
  12. * David Boggs
  13. * Ron Crane
  14. * Alan Cox
  15. *
  16. * This software may be used and distributed according to the terms
  17. * of the GNU General Public License version 2, incorporated herein by reference.
  18. *
  19. * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  20. *
  21. * To control link specific options lmcctl is required.
  22. * It can be obtained from ftp.lanmedia.com.
  23. *
  24. * Linux driver notes:
  25. * Linux uses the device struct lmc_private to pass private information
  26. * arround.
  27. *
  28. * The initialization portion of this driver (the lmc_reset() and the
  29. * lmc_dec_reset() functions, as well as the led controls and the
  30. * lmc_initcsrs() functions.
  31. *
  32. * The watchdog function runs every second and checks to see if
  33. * we still have link, and that the timing source is what we expected
  34. * it to be. If link is lost, the interface is marked down, and
  35. * we no longer can transmit.
  36. *
  37. */
  38. /* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */
  39. #include <linux/kernel.h>
  40. #include <linux/module.h>
  41. #include <linux/string.h>
  42. #include <linux/timer.h>
  43. #include <linux/ptrace.h>
  44. #include <linux/errno.h>
  45. #include <linux/ioport.h>
  46. #include <linux/slab.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/pci.h>
  49. #include <linux/delay.h>
  50. #include <linux/init.h>
  51. #include <linux/in.h>
  52. #include <linux/if_arp.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/etherdevice.h>
  55. #include <linux/skbuff.h>
  56. #include <linux/inet.h>
  57. #include <linux/bitops.h>
  58. #include <net/syncppp.h>
  59. #include <asm/processor.h> /* Processor type for cache alignment. */
  60. #include <asm/io.h>
  61. #include <asm/dma.h>
  62. #include <asm/uaccess.h>
  63. //#include <asm/spinlock.h>
  64. #define DRIVER_MAJOR_VERSION 1
  65. #define DRIVER_MINOR_VERSION 34
  66. #define DRIVER_SUB_VERSION 0
  67. #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  68. #include "lmc.h"
  69. #include "lmc_var.h"
  70. #include "lmc_ioctl.h"
  71. #include "lmc_debug.h"
  72. #include "lmc_proto.h"
  73. static int lmc_first_load = 0;
  74. static int LMC_PKT_BUF_SZ = 1542;
  75. static struct pci_device_id lmc_pci_tbl[] = {
  76. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  77. PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  78. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  79. PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  80. { 0 }
  81. };
  82. MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  83. MODULE_LICENSE("GPL");
  84. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
  85. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
  86. static int lmc_rx (struct net_device *dev);
  87. static int lmc_open(struct net_device *dev);
  88. static int lmc_close(struct net_device *dev);
  89. static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  90. static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  91. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  92. static void lmc_softreset(lmc_softc_t * const);
  93. static void lmc_running_reset(struct net_device *dev);
  94. static int lmc_ifdown(struct net_device * const);
  95. static void lmc_watchdog(unsigned long data);
  96. static void lmc_reset(lmc_softc_t * const sc);
  97. static void lmc_dec_reset(lmc_softc_t * const sc);
  98. static void lmc_driver_timeout(struct net_device *dev);
  99. /*
  100. * linux reserves 16 device specific IOCTLs. We call them
  101. * LMCIOC* to control various bits of our world.
  102. */
  103. int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
  104. {
  105. lmc_softc_t *sc;
  106. lmc_ctl_t ctl;
  107. int ret;
  108. u_int16_t regVal;
  109. unsigned long flags;
  110. struct sppp *sp;
  111. ret = -EOPNOTSUPP;
  112. sc = dev->priv;
  113. lmc_trace(dev, "lmc_ioctl in");
  114. /*
  115. * Most functions mess with the structure
  116. * Disable interrupts while we do the polling
  117. */
  118. spin_lock_irqsave(&sc->lmc_lock, flags);
  119. switch (cmd) {
  120. /*
  121. * Return current driver state. Since we keep this up
  122. * To date internally, just copy this out to the user.
  123. */
  124. case LMCIOCGINFO: /*fold01*/
  125. if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
  126. ret = -EFAULT;
  127. else
  128. ret = 0;
  129. break;
  130. case LMCIOCSINFO: /*fold01*/
  131. sp = &((struct ppp_device *) dev)->sppp;
  132. if (!capable(CAP_NET_ADMIN)) {
  133. ret = -EPERM;
  134. break;
  135. }
  136. if(dev->flags & IFF_UP){
  137. ret = -EBUSY;
  138. break;
  139. }
  140. if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
  141. ret = -EFAULT;
  142. break;
  143. }
  144. sc->lmc_media->set_status (sc, &ctl);
  145. if(ctl.crc_length != sc->ictl.crc_length) {
  146. sc->lmc_media->set_crc_length(sc, ctl.crc_length);
  147. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
  148. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  149. else
  150. sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
  151. }
  152. if (ctl.keepalive_onoff == LMC_CTL_OFF)
  153. sp->pp_flags &= ~PP_KEEPALIVE; /* Turn off */
  154. else
  155. sp->pp_flags |= PP_KEEPALIVE; /* Turn on */
  156. ret = 0;
  157. break;
  158. case LMCIOCIFTYPE: /*fold01*/
  159. {
  160. u_int16_t old_type = sc->if_type;
  161. u_int16_t new_type;
  162. if (!capable(CAP_NET_ADMIN)) {
  163. ret = -EPERM;
  164. break;
  165. }
  166. if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t))) {
  167. ret = -EFAULT;
  168. break;
  169. }
  170. if (new_type == old_type)
  171. {
  172. ret = 0 ;
  173. break; /* no change */
  174. }
  175. lmc_proto_close(sc);
  176. lmc_proto_detach(sc);
  177. sc->if_type = new_type;
  178. // lmc_proto_init(sc);
  179. lmc_proto_attach(sc);
  180. lmc_proto_open(sc);
  181. ret = 0 ;
  182. break ;
  183. }
  184. case LMCIOCGETXINFO: /*fold01*/
  185. sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
  186. sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
  187. sc->lmc_xinfo.PciSlotNumber = 0;
  188. sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
  189. sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
  190. sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
  191. sc->lmc_xinfo.XilinxRevisionNumber =
  192. lmc_mii_readreg (sc, 0, 3) & 0xf;
  193. sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
  194. sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
  195. sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
  196. sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
  197. if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
  198. sizeof(struct lmc_xinfo)))
  199. ret = -EFAULT;
  200. else
  201. ret = 0;
  202. break;
  203. case LMCIOCGETLMCSTATS: /*fold01*/
  204. if (sc->lmc_cardtype == LMC_CARDTYPE_T1){
  205. lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB);
  206. sc->stats.framingBitErrorCount +=
  207. lmc_mii_readreg (sc, 0, 18) & 0xff;
  208. lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB);
  209. sc->stats.framingBitErrorCount +=
  210. (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
  211. lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB);
  212. sc->stats.lineCodeViolationCount +=
  213. lmc_mii_readreg (sc, 0, 18) & 0xff;
  214. lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB);
  215. sc->stats.lineCodeViolationCount +=
  216. (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
  217. lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR);
  218. regVal = lmc_mii_readreg (sc, 0, 18) & 0xff;
  219. sc->stats.lossOfFrameCount +=
  220. (regVal & T1FRAMER_LOF_MASK) >> 4;
  221. sc->stats.changeOfFrameAlignmentCount +=
  222. (regVal & T1FRAMER_COFA_MASK) >> 2;
  223. sc->stats.severelyErroredFrameCount +=
  224. regVal & T1FRAMER_SEF_MASK;
  225. }
  226. if (copy_to_user(ifr->ifr_data, &sc->stats,
  227. sizeof (struct lmc_statistics)))
  228. ret = -EFAULT;
  229. else
  230. ret = 0;
  231. break;
  232. case LMCIOCCLEARLMCSTATS: /*fold01*/
  233. if (!capable(CAP_NET_ADMIN)){
  234. ret = -EPERM;
  235. break;
  236. }
  237. memset (&sc->stats, 0, sizeof (struct lmc_statistics));
  238. sc->stats.check = STATCHECK;
  239. sc->stats.version_size = (DRIVER_VERSION << 16) +
  240. sizeof (struct lmc_statistics);
  241. sc->stats.lmc_cardtype = sc->lmc_cardtype;
  242. ret = 0;
  243. break;
  244. case LMCIOCSETCIRCUIT: /*fold01*/
  245. if (!capable(CAP_NET_ADMIN)){
  246. ret = -EPERM;
  247. break;
  248. }
  249. if(dev->flags & IFF_UP){
  250. ret = -EBUSY;
  251. break;
  252. }
  253. if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
  254. ret = -EFAULT;
  255. break;
  256. }
  257. sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
  258. sc->ictl.circuit_type = ctl.circuit_type;
  259. ret = 0;
  260. break;
  261. case LMCIOCRESET: /*fold01*/
  262. if (!capable(CAP_NET_ADMIN)){
  263. ret = -EPERM;
  264. break;
  265. }
  266. /* Reset driver and bring back to current state */
  267. printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  268. lmc_running_reset (dev);
  269. printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  270. LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  271. ret = 0;
  272. break;
  273. #ifdef DEBUG
  274. case LMCIOCDUMPEVENTLOG:
  275. if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
  276. ret = -EFAULT;
  277. break;
  278. }
  279. if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf)))
  280. ret = -EFAULT;
  281. else
  282. ret = 0;
  283. break;
  284. #endif /* end ifdef _DBG_EVENTLOG */
  285. case LMCIOCT1CONTROL: /*fold01*/
  286. if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
  287. ret = -EOPNOTSUPP;
  288. break;
  289. }
  290. break;
  291. case LMCIOCXILINX: /*fold01*/
  292. {
  293. struct lmc_xilinx_control xc; /*fold02*/
  294. if (!capable(CAP_NET_ADMIN)){
  295. ret = -EPERM;
  296. break;
  297. }
  298. /*
  299. * Stop the xwitter whlie we restart the hardware
  300. */
  301. netif_stop_queue(dev);
  302. if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
  303. ret = -EFAULT;
  304. break;
  305. }
  306. switch(xc.command){
  307. case lmc_xilinx_reset: /*fold02*/
  308. {
  309. u16 mii;
  310. mii = lmc_mii_readreg (sc, 0, 16);
  311. /*
  312. * Make all of them 0 and make input
  313. */
  314. lmc_gpio_mkinput(sc, 0xff);
  315. /*
  316. * make the reset output
  317. */
  318. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  319. /*
  320. * RESET low to force configuration. This also forces
  321. * the transmitter clock to be internal, but we expect to reset
  322. * that later anyway.
  323. */
  324. sc->lmc_gpio &= ~LMC_GEP_RESET;
  325. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  326. /*
  327. * hold for more than 10 microseconds
  328. */
  329. udelay(50);
  330. sc->lmc_gpio |= LMC_GEP_RESET;
  331. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  332. /*
  333. * stop driving Xilinx-related signals
  334. */
  335. lmc_gpio_mkinput(sc, 0xff);
  336. /* Reset the frammer hardware */
  337. sc->lmc_media->set_link_status (sc, 1);
  338. sc->lmc_media->set_status (sc, NULL);
  339. // lmc_softreset(sc);
  340. {
  341. int i;
  342. for(i = 0; i < 5; i++){
  343. lmc_led_on(sc, LMC_DS3_LED0);
  344. mdelay(100);
  345. lmc_led_off(sc, LMC_DS3_LED0);
  346. lmc_led_on(sc, LMC_DS3_LED1);
  347. mdelay(100);
  348. lmc_led_off(sc, LMC_DS3_LED1);
  349. lmc_led_on(sc, LMC_DS3_LED3);
  350. mdelay(100);
  351. lmc_led_off(sc, LMC_DS3_LED3);
  352. lmc_led_on(sc, LMC_DS3_LED2);
  353. mdelay(100);
  354. lmc_led_off(sc, LMC_DS3_LED2);
  355. }
  356. }
  357. ret = 0x0;
  358. }
  359. break;
  360. case lmc_xilinx_load_prom: /*fold02*/
  361. {
  362. u16 mii;
  363. int timeout = 500000;
  364. mii = lmc_mii_readreg (sc, 0, 16);
  365. /*
  366. * Make all of them 0 and make input
  367. */
  368. lmc_gpio_mkinput(sc, 0xff);
  369. /*
  370. * make the reset output
  371. */
  372. lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  373. /*
  374. * RESET low to force configuration. This also forces
  375. * the transmitter clock to be internal, but we expect to reset
  376. * that later anyway.
  377. */
  378. sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
  379. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  380. /*
  381. * hold for more than 10 microseconds
  382. */
  383. udelay(50);
  384. sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
  385. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  386. /*
  387. * busy wait for the chip to reset
  388. */
  389. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  390. (timeout-- > 0))
  391. ;
  392. /*
  393. * stop driving Xilinx-related signals
  394. */
  395. lmc_gpio_mkinput(sc, 0xff);
  396. ret = 0x0;
  397. break;
  398. }
  399. case lmc_xilinx_load: /*fold02*/
  400. {
  401. char *data;
  402. int pos;
  403. int timeout = 500000;
  404. if (!xc.data) {
  405. ret = -EINVAL;
  406. break;
  407. }
  408. data = kmalloc(xc.len, GFP_KERNEL);
  409. if (!data) {
  410. printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
  411. ret = -ENOMEM;
  412. break;
  413. }
  414. if(copy_from_user(data, xc.data, xc.len))
  415. {
  416. kfree(data);
  417. ret = -ENOMEM;
  418. break;
  419. }
  420. printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
  421. lmc_gpio_mkinput(sc, 0xff);
  422. /*
  423. * Clear the Xilinx and start prgramming from the DEC
  424. */
  425. /*
  426. * Set ouput as:
  427. * Reset: 0 (active)
  428. * DP: 0 (active)
  429. * Mode: 1
  430. *
  431. */
  432. sc->lmc_gpio = 0x00;
  433. sc->lmc_gpio &= ~LMC_GEP_DP;
  434. sc->lmc_gpio &= ~LMC_GEP_RESET;
  435. sc->lmc_gpio |= LMC_GEP_MODE;
  436. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  437. lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
  438. /*
  439. * Wait at least 10 us 20 to be safe
  440. */
  441. udelay(50);
  442. /*
  443. * Clear reset and activate programming lines
  444. * Reset: Input
  445. * DP: Input
  446. * Clock: Output
  447. * Data: Output
  448. * Mode: Output
  449. */
  450. lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  451. /*
  452. * Set LOAD, DATA, Clock to 1
  453. */
  454. sc->lmc_gpio = 0x00;
  455. sc->lmc_gpio |= LMC_GEP_MODE;
  456. sc->lmc_gpio |= LMC_GEP_DATA;
  457. sc->lmc_gpio |= LMC_GEP_CLK;
  458. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  459. lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
  460. /*
  461. * busy wait for the chip to reset
  462. */
  463. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  464. (timeout-- > 0))
  465. ;
  466. printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
  467. for(pos = 0; pos < xc.len; pos++){
  468. switch(data[pos]){
  469. case 0:
  470. sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
  471. break;
  472. case 1:
  473. sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
  474. break;
  475. default:
  476. printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
  477. sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
  478. }
  479. sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
  480. sc->lmc_gpio |= LMC_GEP_MODE;
  481. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  482. udelay(1);
  483. sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
  484. sc->lmc_gpio |= LMC_GEP_MODE;
  485. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  486. udelay(1);
  487. }
  488. if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
  489. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
  490. }
  491. else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
  492. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
  493. }
  494. else {
  495. printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
  496. }
  497. lmc_gpio_mkinput(sc, 0xff);
  498. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  499. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  500. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  501. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  502. kfree(data);
  503. ret = 0;
  504. break;
  505. }
  506. default: /*fold02*/
  507. ret = -EBADE;
  508. break;
  509. }
  510. netif_wake_queue(dev);
  511. sc->lmc_txfull = 0;
  512. }
  513. break;
  514. default: /*fold01*/
  515. /* If we don't know what to do, give the protocol a shot. */
  516. ret = lmc_proto_ioctl (sc, ifr, cmd);
  517. break;
  518. }
  519. spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/
  520. lmc_trace(dev, "lmc_ioctl out");
  521. return ret;
  522. }
  523. /* the watchdog process that cruises around */
  524. static void lmc_watchdog (unsigned long data) /*fold00*/
  525. {
  526. struct net_device *dev = (struct net_device *) data;
  527. lmc_softc_t *sc;
  528. int link_status;
  529. u_int32_t ticks;
  530. unsigned long flags;
  531. sc = dev->priv;
  532. lmc_trace(dev, "lmc_watchdog in");
  533. spin_lock_irqsave(&sc->lmc_lock, flags);
  534. if(sc->check != 0xBEAFCAFE){
  535. printk("LMC: Corrupt net_device struct, breaking out\n");
  536. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  537. return;
  538. }
  539. /* Make sure the tx jabber and rx watchdog are off,
  540. * and the transmit and receive processes are running.
  541. */
  542. LMC_CSR_WRITE (sc, csr_15, 0x00000011);
  543. sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
  544. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  545. if (sc->lmc_ok == 0)
  546. goto kick_timer;
  547. LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  548. /* --- begin time out check -----------------------------------
  549. * check for a transmit interrupt timeout
  550. * Has the packet xmt vs xmt serviced threshold been exceeded */
  551. if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  552. sc->stats.tx_packets > sc->lasttx_packets &&
  553. sc->tx_TimeoutInd == 0)
  554. {
  555. /* wait for the watchdog to come around again */
  556. sc->tx_TimeoutInd = 1;
  557. }
  558. else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  559. sc->stats.tx_packets > sc->lasttx_packets &&
  560. sc->tx_TimeoutInd)
  561. {
  562. LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
  563. sc->tx_TimeoutDisplay = 1;
  564. sc->stats.tx_TimeoutCnt++;
  565. /* DEC chip is stuck, hit it with a RESET!!!! */
  566. lmc_running_reset (dev);
  567. /* look at receive & transmit process state to make sure they are running */
  568. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  569. /* look at: DSR - 02 for Reg 16
  570. * CTS - 08
  571. * DCD - 10
  572. * RI - 20
  573. * for Reg 17
  574. */
  575. LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
  576. /* reset the transmit timeout detection flag */
  577. sc->tx_TimeoutInd = 0;
  578. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  579. sc->lasttx_packets = sc->stats.tx_packets;
  580. }
  581. else
  582. {
  583. sc->tx_TimeoutInd = 0;
  584. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  585. sc->lasttx_packets = sc->stats.tx_packets;
  586. }
  587. /* --- end time out check ----------------------------------- */
  588. link_status = sc->lmc_media->get_link_status (sc);
  589. /*
  590. * hardware level link lost, but the interface is marked as up.
  591. * Mark it as down.
  592. */
  593. if ((link_status == 0) && (sc->last_link_status != 0)) {
  594. printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
  595. sc->last_link_status = 0;
  596. /* lmc_reset (sc); Why reset??? The link can go down ok */
  597. /* Inform the world that link has been lost */
  598. netif_carrier_off(dev);
  599. }
  600. /*
  601. * hardware link is up, but the interface is marked as down.
  602. * Bring it back up again.
  603. */
  604. if (link_status != 0 && sc->last_link_status == 0) {
  605. printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
  606. sc->last_link_status = 1;
  607. /* lmc_reset (sc); Again why reset??? */
  608. /* Inform the world that link protocol is back up. */
  609. netif_carrier_on(dev);
  610. /* Now we have to tell the syncppp that we had an outage
  611. * and that it should deal. Calling sppp_reopen here
  612. * should do the trick, but we may have to call sppp_close
  613. * when the link goes down, and call sppp_open here.
  614. * Subject to more testing.
  615. * --bbraun
  616. */
  617. lmc_proto_reopen(sc);
  618. }
  619. /* Call media specific watchdog functions */
  620. sc->lmc_media->watchdog(sc);
  621. /*
  622. * Poke the transmitter to make sure it
  623. * never stops, even if we run out of mem
  624. */
  625. LMC_CSR_WRITE(sc, csr_rxpoll, 0);
  626. /*
  627. * Check for code that failed
  628. * and try and fix it as appropriate
  629. */
  630. if(sc->failed_ring == 1){
  631. /*
  632. * Failed to setup the recv/xmit rin
  633. * Try again
  634. */
  635. sc->failed_ring = 0;
  636. lmc_softreset(sc);
  637. }
  638. if(sc->failed_recv_alloc == 1){
  639. /*
  640. * We failed to alloc mem in the
  641. * interrupt handler, go through the rings
  642. * and rebuild them
  643. */
  644. sc->failed_recv_alloc = 0;
  645. lmc_softreset(sc);
  646. }
  647. /*
  648. * remember the timer value
  649. */
  650. kick_timer:
  651. ticks = LMC_CSR_READ (sc, csr_gp_timer);
  652. LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
  653. sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
  654. /*
  655. * restart this timer.
  656. */
  657. sc->timer.expires = jiffies + (HZ);
  658. add_timer (&sc->timer);
  659. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  660. lmc_trace(dev, "lmc_watchdog out");
  661. }
  662. static void lmc_setup(struct net_device * const dev) /*fold00*/
  663. {
  664. lmc_trace(dev, "lmc_setup in");
  665. dev->type = ARPHRD_HDLC;
  666. dev->hard_start_xmit = lmc_start_xmit;
  667. dev->open = lmc_open;
  668. dev->stop = lmc_close;
  669. dev->get_stats = lmc_get_stats;
  670. dev->do_ioctl = lmc_ioctl;
  671. dev->tx_timeout = lmc_driver_timeout;
  672. dev->watchdog_timeo = (HZ); /* 1 second */
  673. lmc_trace(dev, "lmc_setup out");
  674. }
  675. static int __devinit lmc_init_one(struct pci_dev *pdev,
  676. const struct pci_device_id *ent)
  677. {
  678. struct net_device *dev;
  679. lmc_softc_t *sc;
  680. u16 subdevice;
  681. u_int16_t AdapModelNum;
  682. int err = -ENOMEM;
  683. static int cards_found;
  684. #ifndef GCOM
  685. /* We name by type not by vendor */
  686. static const char lmcname[] = "hdlc%d";
  687. #else
  688. /*
  689. * GCOM uses LMC vendor name so that clients can know which card
  690. * to attach to.
  691. */
  692. static const char lmcname[] = "lmc%d";
  693. #endif
  694. /*
  695. * Allocate our own device structure
  696. */
  697. dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup);
  698. if (!dev) {
  699. printk (KERN_ERR "lmc:alloc_netdev for device failed\n");
  700. goto out1;
  701. }
  702. lmc_trace(dev, "lmc_init_one in");
  703. err = pci_enable_device(pdev);
  704. if (err) {
  705. printk(KERN_ERR "lmc: pci enable failed:%d\n", err);
  706. goto out2;
  707. }
  708. if (pci_request_regions(pdev, "lmc")) {
  709. printk(KERN_ERR "lmc: pci_request_region failed\n");
  710. err = -EIO;
  711. goto out3;
  712. }
  713. pci_set_drvdata(pdev, dev);
  714. if(lmc_first_load == 0){
  715. printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n",
  716. DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION);
  717. lmc_first_load = 1;
  718. }
  719. sc = dev->priv;
  720. sc->lmc_device = dev;
  721. sc->name = dev->name;
  722. /* Initialize the sppp layer */
  723. /* An ioctl can cause a subsequent detach for raw frame interface */
  724. dev->ml_priv = sc;
  725. sc->if_type = LMC_PPP;
  726. sc->check = 0xBEAFCAFE;
  727. dev->base_addr = pci_resource_start(pdev, 0);
  728. dev->irq = pdev->irq;
  729. SET_NETDEV_DEV(dev, &pdev->dev);
  730. /*
  731. * This will get the protocol layer ready and do any 1 time init's
  732. * Must have a valid sc and dev structure
  733. */
  734. lmc_proto_init(sc);
  735. lmc_proto_attach(sc);
  736. /*
  737. * Why were we changing this???
  738. dev->tx_queue_len = 100;
  739. */
  740. /* Init the spin lock so can call it latter */
  741. spin_lock_init(&sc->lmc_lock);
  742. pci_set_master(pdev);
  743. printk ("%s: detected at %lx, irq %d\n", dev->name,
  744. dev->base_addr, dev->irq);
  745. if (register_netdev (dev) != 0) {
  746. printk (KERN_ERR "%s: register_netdev failed.\n", dev->name);
  747. goto out4;
  748. }
  749. sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
  750. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
  751. /*
  752. *
  753. * Check either the subvendor or the subdevice, some systems reverse
  754. * the setting in the bois, seems to be version and arch dependent?
  755. * Fix the error, exchange the two values
  756. */
  757. if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
  758. subdevice = pdev->subsystem_vendor;
  759. switch (subdevice) {
  760. case PCI_DEVICE_ID_LMC_HSSI:
  761. printk ("%s: LMC HSSI\n", dev->name);
  762. sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
  763. sc->lmc_media = &lmc_hssi_media;
  764. break;
  765. case PCI_DEVICE_ID_LMC_DS3:
  766. printk ("%s: LMC DS3\n", dev->name);
  767. sc->lmc_cardtype = LMC_CARDTYPE_DS3;
  768. sc->lmc_media = &lmc_ds3_media;
  769. break;
  770. case PCI_DEVICE_ID_LMC_SSI:
  771. printk ("%s: LMC SSI\n", dev->name);
  772. sc->lmc_cardtype = LMC_CARDTYPE_SSI;
  773. sc->lmc_media = &lmc_ssi_media;
  774. break;
  775. case PCI_DEVICE_ID_LMC_T1:
  776. printk ("%s: LMC T1\n", dev->name);
  777. sc->lmc_cardtype = LMC_CARDTYPE_T1;
  778. sc->lmc_media = &lmc_t1_media;
  779. break;
  780. default:
  781. printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
  782. break;
  783. }
  784. lmc_initcsrs (sc, dev->base_addr, 8);
  785. lmc_gpio_mkinput (sc, 0xff);
  786. sc->lmc_gpio = 0; /* drive no signals yet */
  787. sc->lmc_media->defaults (sc);
  788. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  789. /* verify that the PCI Sub System ID matches the Adapter Model number
  790. * from the MII register
  791. */
  792. AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
  793. if ((AdapModelNum == LMC_ADAP_T1
  794. && subdevice == PCI_DEVICE_ID_LMC_T1) || /* detect LMC1200 */
  795. (AdapModelNum == LMC_ADAP_SSI
  796. && subdevice == PCI_DEVICE_ID_LMC_SSI) || /* detect LMC1000 */
  797. (AdapModelNum == LMC_ADAP_DS3
  798. && subdevice == PCI_DEVICE_ID_LMC_DS3) || /* detect LMC5245 */
  799. (AdapModelNum == LMC_ADAP_HSSI
  800. && subdevice == PCI_DEVICE_ID_LMC_HSSI))
  801. { /* detect LMC5200 */
  802. }
  803. else {
  804. printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n",
  805. dev->name, AdapModelNum, subdevice);
  806. // return (NULL);
  807. }
  808. /*
  809. * reset clock
  810. */
  811. LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
  812. sc->board_idx = cards_found++;
  813. sc->stats.check = STATCHECK;
  814. sc->stats.version_size = (DRIVER_VERSION << 16) +
  815. sizeof (struct lmc_statistics);
  816. sc->stats.lmc_cardtype = sc->lmc_cardtype;
  817. sc->lmc_ok = 0;
  818. sc->last_link_status = 0;
  819. lmc_trace(dev, "lmc_init_one out");
  820. return 0;
  821. out4:
  822. lmc_proto_detach(sc);
  823. out3:
  824. if (pdev) {
  825. pci_release_regions(pdev);
  826. pci_set_drvdata(pdev, NULL);
  827. }
  828. out2:
  829. free_netdev(dev);
  830. out1:
  831. return err;
  832. }
  833. /*
  834. * Called from pci when removing module.
  835. */
  836. static void __devexit lmc_remove_one (struct pci_dev *pdev)
  837. {
  838. struct net_device *dev = pci_get_drvdata(pdev);
  839. if (dev) {
  840. lmc_softc_t *sc = dev->priv;
  841. printk("%s: removing...\n", dev->name);
  842. lmc_proto_detach(sc);
  843. unregister_netdev(dev);
  844. free_netdev(dev);
  845. pci_release_regions(pdev);
  846. pci_disable_device(pdev);
  847. pci_set_drvdata(pdev, NULL);
  848. }
  849. }
  850. /* After this is called, packets can be sent.
  851. * Does not initialize the addresses
  852. */
  853. static int lmc_open (struct net_device *dev) /*fold00*/
  854. {
  855. lmc_softc_t *sc = dev->priv;
  856. lmc_trace(dev, "lmc_open in");
  857. lmc_led_on(sc, LMC_DS3_LED0);
  858. lmc_dec_reset (sc);
  859. lmc_reset (sc);
  860. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  861. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  862. lmc_mii_readreg (sc, 0, 16),
  863. lmc_mii_readreg (sc, 0, 17));
  864. if (sc->lmc_ok){
  865. lmc_trace(dev, "lmc_open lmc_ok out");
  866. return (0);
  867. }
  868. lmc_softreset (sc);
  869. /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
  870. if (request_irq (dev->irq, &lmc_interrupt, IRQF_SHARED, dev->name, dev)){
  871. printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
  872. lmc_trace(dev, "lmc_open irq failed out");
  873. return -EAGAIN;
  874. }
  875. sc->got_irq = 1;
  876. /* Assert Terminal Active */
  877. sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
  878. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  879. /*
  880. * reset to last state.
  881. */
  882. sc->lmc_media->set_status (sc, NULL);
  883. /* setup default bits to be used in tulip_desc_t transmit descriptor
  884. * -baz */
  885. sc->TxDescriptControlInit = (
  886. LMC_TDES_INTERRUPT_ON_COMPLETION
  887. | LMC_TDES_FIRST_SEGMENT
  888. | LMC_TDES_LAST_SEGMENT
  889. | LMC_TDES_SECOND_ADDR_CHAINED
  890. | LMC_TDES_DISABLE_PADDING
  891. );
  892. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
  893. /* disable 32 bit CRC generated by ASIC */
  894. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  895. }
  896. sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
  897. /* Acknoledge the Terminal Active and light LEDs */
  898. /* dev->flags |= IFF_UP; */
  899. lmc_proto_open(sc);
  900. dev->do_ioctl = lmc_ioctl;
  901. netif_start_queue(dev);
  902. sc->stats.tx_tbusy0++ ;
  903. /*
  904. * select what interrupts we want to get
  905. */
  906. sc->lmc_intrmask = 0;
  907. /* Should be using the default interrupt mask defined in the .h file. */
  908. sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
  909. | TULIP_STS_RXINTR
  910. | TULIP_STS_TXINTR
  911. | TULIP_STS_ABNRMLINTR
  912. | TULIP_STS_SYSERROR
  913. | TULIP_STS_TXSTOPPED
  914. | TULIP_STS_TXUNDERFLOW
  915. | TULIP_STS_RXSTOPPED
  916. | TULIP_STS_RXNOBUF
  917. );
  918. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  919. sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
  920. sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
  921. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  922. sc->lmc_ok = 1; /* Run watchdog */
  923. /*
  924. * Set the if up now - pfb
  925. */
  926. sc->last_link_status = 1;
  927. /*
  928. * Setup a timer for the watchdog on probe, and start it running.
  929. * Since lmc_ok == 0, it will be a NOP for now.
  930. */
  931. init_timer (&sc->timer);
  932. sc->timer.expires = jiffies + HZ;
  933. sc->timer.data = (unsigned long) dev;
  934. sc->timer.function = &lmc_watchdog;
  935. add_timer (&sc->timer);
  936. lmc_trace(dev, "lmc_open out");
  937. return (0);
  938. }
  939. /* Total reset to compensate for the AdTran DSU doing bad things
  940. * under heavy load
  941. */
  942. static void lmc_running_reset (struct net_device *dev) /*fold00*/
  943. {
  944. lmc_softc_t *sc = (lmc_softc_t *) dev->priv;
  945. lmc_trace(dev, "lmc_runnig_reset in");
  946. /* stop interrupts */
  947. /* Clear the interrupt mask */
  948. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  949. lmc_dec_reset (sc);
  950. lmc_reset (sc);
  951. lmc_softreset (sc);
  952. /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
  953. sc->lmc_media->set_link_status (sc, 1);
  954. sc->lmc_media->set_status (sc, NULL);
  955. netif_wake_queue(dev);
  956. sc->lmc_txfull = 0;
  957. sc->stats.tx_tbusy0++ ;
  958. sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
  959. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  960. sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
  961. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  962. lmc_trace(dev, "lmc_runnin_reset_out");
  963. }
  964. /* This is what is called when you ifconfig down a device.
  965. * This disables the timer for the watchdog and keepalives,
  966. * and disables the irq for dev.
  967. */
  968. static int lmc_close (struct net_device *dev) /*fold00*/
  969. {
  970. /* not calling release_region() as we should */
  971. lmc_softc_t *sc;
  972. lmc_trace(dev, "lmc_close in");
  973. sc = dev->priv;
  974. sc->lmc_ok = 0;
  975. sc->lmc_media->set_link_status (sc, 0);
  976. del_timer (&sc->timer);
  977. lmc_proto_close(sc);
  978. lmc_ifdown (dev);
  979. lmc_trace(dev, "lmc_close out");
  980. return 0;
  981. }
  982. /* Ends the transfer of packets */
  983. /* When the interface goes down, this is called */
  984. static int lmc_ifdown (struct net_device *dev) /*fold00*/
  985. {
  986. lmc_softc_t *sc = dev->priv;
  987. u32 csr6;
  988. int i;
  989. lmc_trace(dev, "lmc_ifdown in");
  990. /* Don't let anything else go on right now */
  991. // dev->start = 0;
  992. netif_stop_queue(dev);
  993. sc->stats.tx_tbusy1++ ;
  994. /* stop interrupts */
  995. /* Clear the interrupt mask */
  996. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  997. /* Stop Tx and Rx on the chip */
  998. csr6 = LMC_CSR_READ (sc, csr_command);
  999. csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
  1000. csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
  1001. LMC_CSR_WRITE (sc, csr_command, csr6);
  1002. sc->stats.rx_missed_errors +=
  1003. LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
  1004. /* release the interrupt */
  1005. if(sc->got_irq == 1){
  1006. free_irq (dev->irq, dev);
  1007. sc->got_irq = 0;
  1008. }
  1009. /* free skbuffs in the Rx queue */
  1010. for (i = 0; i < LMC_RXDESCS; i++)
  1011. {
  1012. struct sk_buff *skb = sc->lmc_rxq[i];
  1013. sc->lmc_rxq[i] = NULL;
  1014. sc->lmc_rxring[i].status = 0;
  1015. sc->lmc_rxring[i].length = 0;
  1016. sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
  1017. if (skb != NULL)
  1018. dev_kfree_skb(skb);
  1019. sc->lmc_rxq[i] = NULL;
  1020. }
  1021. for (i = 0; i < LMC_TXDESCS; i++)
  1022. {
  1023. if (sc->lmc_txq[i] != NULL)
  1024. dev_kfree_skb(sc->lmc_txq[i]);
  1025. sc->lmc_txq[i] = NULL;
  1026. }
  1027. lmc_led_off (sc, LMC_MII16_LED_ALL);
  1028. netif_wake_queue(dev);
  1029. sc->stats.tx_tbusy0++ ;
  1030. lmc_trace(dev, "lmc_ifdown out");
  1031. return 0;
  1032. }
  1033. /* Interrupt handling routine. This will take an incoming packet, or clean
  1034. * up after a trasmit.
  1035. */
  1036. static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
  1037. {
  1038. struct net_device *dev = (struct net_device *) dev_instance;
  1039. lmc_softc_t *sc;
  1040. u32 csr;
  1041. int i;
  1042. s32 stat;
  1043. unsigned int badtx;
  1044. u32 firstcsr;
  1045. int max_work = LMC_RXDESCS;
  1046. int handled = 0;
  1047. lmc_trace(dev, "lmc_interrupt in");
  1048. sc = dev->priv;
  1049. spin_lock(&sc->lmc_lock);
  1050. /*
  1051. * Read the csr to find what interrupts we have (if any)
  1052. */
  1053. csr = LMC_CSR_READ (sc, csr_status);
  1054. /*
  1055. * Make sure this is our interrupt
  1056. */
  1057. if ( ! (csr & sc->lmc_intrmask)) {
  1058. goto lmc_int_fail_out;
  1059. }
  1060. firstcsr = csr;
  1061. /* always go through this loop at least once */
  1062. while (csr & sc->lmc_intrmask) {
  1063. handled = 1;
  1064. /*
  1065. * Clear interrupt bits, we handle all case below
  1066. */
  1067. LMC_CSR_WRITE (sc, csr_status, csr);
  1068. /*
  1069. * One of
  1070. * - Transmit process timed out CSR5<1>
  1071. * - Transmit jabber timeout CSR5<3>
  1072. * - Transmit underflow CSR5<5>
  1073. * - Transmit Receiver buffer unavailable CSR5<7>
  1074. * - Receive process stopped CSR5<8>
  1075. * - Receive watchdog timeout CSR5<9>
  1076. * - Early transmit interrupt CSR5<10>
  1077. *
  1078. * Is this really right? Should we do a running reset for jabber?
  1079. * (being a WAN card and all)
  1080. */
  1081. if (csr & TULIP_STS_ABNRMLINTR){
  1082. lmc_running_reset (dev);
  1083. break;
  1084. }
  1085. if (csr & TULIP_STS_RXINTR){
  1086. lmc_trace(dev, "rx interrupt");
  1087. lmc_rx (dev);
  1088. }
  1089. if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
  1090. int n_compl = 0 ;
  1091. /* reset the transmit timeout detection flag -baz */
  1092. sc->stats.tx_NoCompleteCnt = 0;
  1093. badtx = sc->lmc_taint_tx;
  1094. i = badtx % LMC_TXDESCS;
  1095. while ((badtx < sc->lmc_next_tx)) {
  1096. stat = sc->lmc_txring[i].status;
  1097. LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
  1098. sc->lmc_txring[i].length);
  1099. /*
  1100. * If bit 31 is 1 the tulip owns it break out of the loop
  1101. */
  1102. if (stat & 0x80000000)
  1103. break;
  1104. n_compl++ ; /* i.e., have an empty slot in ring */
  1105. /*
  1106. * If we have no skbuff or have cleared it
  1107. * Already continue to the next buffer
  1108. */
  1109. if (sc->lmc_txq[i] == NULL)
  1110. continue;
  1111. /*
  1112. * Check the total error summary to look for any errors
  1113. */
  1114. if (stat & 0x8000) {
  1115. sc->stats.tx_errors++;
  1116. if (stat & 0x4104)
  1117. sc->stats.tx_aborted_errors++;
  1118. if (stat & 0x0C00)
  1119. sc->stats.tx_carrier_errors++;
  1120. if (stat & 0x0200)
  1121. sc->stats.tx_window_errors++;
  1122. if (stat & 0x0002)
  1123. sc->stats.tx_fifo_errors++;
  1124. }
  1125. else {
  1126. sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
  1127. sc->stats.tx_packets++;
  1128. }
  1129. // dev_kfree_skb(sc->lmc_txq[i]);
  1130. dev_kfree_skb_irq(sc->lmc_txq[i]);
  1131. sc->lmc_txq[i] = NULL;
  1132. badtx++;
  1133. i = badtx % LMC_TXDESCS;
  1134. }
  1135. if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
  1136. {
  1137. printk ("%s: out of sync pointer\n", dev->name);
  1138. badtx += LMC_TXDESCS;
  1139. }
  1140. LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
  1141. sc->lmc_txfull = 0;
  1142. netif_wake_queue(dev);
  1143. sc->stats.tx_tbusy0++ ;
  1144. #ifdef DEBUG
  1145. sc->stats.dirtyTx = badtx;
  1146. sc->stats.lmc_next_tx = sc->lmc_next_tx;
  1147. sc->stats.lmc_txfull = sc->lmc_txfull;
  1148. #endif
  1149. sc->lmc_taint_tx = badtx;
  1150. /*
  1151. * Why was there a break here???
  1152. */
  1153. } /* end handle transmit interrupt */
  1154. if (csr & TULIP_STS_SYSERROR) {
  1155. u32 error;
  1156. printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
  1157. error = csr>>23 & 0x7;
  1158. switch(error){
  1159. case 0x000:
  1160. printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
  1161. break;
  1162. case 0x001:
  1163. printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
  1164. break;
  1165. case 0x010:
  1166. printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
  1167. break;
  1168. default:
  1169. printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
  1170. }
  1171. lmc_dec_reset (sc);
  1172. lmc_reset (sc);
  1173. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1174. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1175. lmc_mii_readreg (sc, 0, 16),
  1176. lmc_mii_readreg (sc, 0, 17));
  1177. }
  1178. if(max_work-- <= 0)
  1179. break;
  1180. /*
  1181. * Get current csr status to make sure
  1182. * we've cleared all interrupts
  1183. */
  1184. csr = LMC_CSR_READ (sc, csr_status);
  1185. } /* end interrupt loop */
  1186. LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
  1187. lmc_int_fail_out:
  1188. spin_unlock(&sc->lmc_lock);
  1189. lmc_trace(dev, "lmc_interrupt out");
  1190. return IRQ_RETVAL(handled);
  1191. }
  1192. static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/
  1193. {
  1194. lmc_softc_t *sc;
  1195. u32 flag;
  1196. int entry;
  1197. int ret = 0;
  1198. unsigned long flags;
  1199. lmc_trace(dev, "lmc_start_xmit in");
  1200. sc = dev->priv;
  1201. spin_lock_irqsave(&sc->lmc_lock, flags);
  1202. /* normal path, tbusy known to be zero */
  1203. entry = sc->lmc_next_tx % LMC_TXDESCS;
  1204. sc->lmc_txq[entry] = skb;
  1205. sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
  1206. LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
  1207. #ifndef GCOM
  1208. /* If the queue is less than half full, don't interrupt */
  1209. if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
  1210. {
  1211. /* Do not interrupt on completion of this packet */
  1212. flag = 0x60000000;
  1213. netif_wake_queue(dev);
  1214. }
  1215. else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
  1216. {
  1217. /* This generates an interrupt on completion of this packet */
  1218. flag = 0xe0000000;
  1219. netif_wake_queue(dev);
  1220. }
  1221. else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
  1222. {
  1223. /* Do not interrupt on completion of this packet */
  1224. flag = 0x60000000;
  1225. netif_wake_queue(dev);
  1226. }
  1227. else
  1228. {
  1229. /* This generates an interrupt on completion of this packet */
  1230. flag = 0xe0000000;
  1231. sc->lmc_txfull = 1;
  1232. netif_stop_queue(dev);
  1233. }
  1234. #else
  1235. flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
  1236. if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
  1237. { /* ring full, go busy */
  1238. sc->lmc_txfull = 1;
  1239. netif_stop_queue(dev);
  1240. sc->stats.tx_tbusy1++ ;
  1241. LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
  1242. }
  1243. #endif
  1244. if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
  1245. flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
  1246. /* don't pad small packets either */
  1247. flag = sc->lmc_txring[entry].length = (skb->len) | flag |
  1248. sc->TxDescriptControlInit;
  1249. /* set the transmit timeout flag to be checked in
  1250. * the watchdog timer handler. -baz
  1251. */
  1252. sc->stats.tx_NoCompleteCnt++;
  1253. sc->lmc_next_tx++;
  1254. /* give ownership to the chip */
  1255. LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
  1256. sc->lmc_txring[entry].status = 0x80000000;
  1257. /* send now! */
  1258. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1259. dev->trans_start = jiffies;
  1260. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1261. lmc_trace(dev, "lmc_start_xmit_out");
  1262. return ret;
  1263. }
  1264. static int lmc_rx (struct net_device *dev) /*fold00*/
  1265. {
  1266. lmc_softc_t *sc;
  1267. int i;
  1268. int rx_work_limit = LMC_RXDESCS;
  1269. unsigned int next_rx;
  1270. int rxIntLoopCnt; /* debug -baz */
  1271. int localLengthErrCnt = 0;
  1272. long stat;
  1273. struct sk_buff *skb, *nsb;
  1274. u16 len;
  1275. lmc_trace(dev, "lmc_rx in");
  1276. sc = dev->priv;
  1277. lmc_led_on(sc, LMC_DS3_LED3);
  1278. rxIntLoopCnt = 0; /* debug -baz */
  1279. i = sc->lmc_next_rx % LMC_RXDESCS;
  1280. next_rx = sc->lmc_next_rx;
  1281. while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
  1282. {
  1283. rxIntLoopCnt++; /* debug -baz */
  1284. len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
  1285. if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
  1286. if ((stat & 0x0000ffff) != 0x7fff) {
  1287. /* Oversized frame */
  1288. sc->stats.rx_length_errors++;
  1289. goto skip_packet;
  1290. }
  1291. }
  1292. if(stat & 0x00000008){ /* Catch a dribbling bit error */
  1293. sc->stats.rx_errors++;
  1294. sc->stats.rx_frame_errors++;
  1295. goto skip_packet;
  1296. }
  1297. if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */
  1298. sc->stats.rx_errors++;
  1299. sc->stats.rx_crc_errors++;
  1300. goto skip_packet;
  1301. }
  1302. if (len > LMC_PKT_BUF_SZ){
  1303. sc->stats.rx_length_errors++;
  1304. localLengthErrCnt++;
  1305. goto skip_packet;
  1306. }
  1307. if (len < sc->lmc_crcSize + 2) {
  1308. sc->stats.rx_length_errors++;
  1309. sc->stats.rx_SmallPktCnt++;
  1310. localLengthErrCnt++;
  1311. goto skip_packet;
  1312. }
  1313. if(stat & 0x00004000){
  1314. printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
  1315. }
  1316. len -= sc->lmc_crcSize;
  1317. skb = sc->lmc_rxq[i];
  1318. /*
  1319. * We ran out of memory at some point
  1320. * just allocate an skb buff and continue.
  1321. */
  1322. if (!skb) {
  1323. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1324. if (nsb) {
  1325. sc->lmc_rxq[i] = nsb;
  1326. nsb->dev = dev;
  1327. sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
  1328. }
  1329. sc->failed_recv_alloc = 1;
  1330. goto skip_packet;
  1331. }
  1332. dev->last_rx = jiffies;
  1333. sc->stats.rx_packets++;
  1334. sc->stats.rx_bytes += len;
  1335. LMC_CONSOLE_LOG("recv", skb->data, len);
  1336. /*
  1337. * I'm not sure of the sanity of this
  1338. * Packets could be arriving at a constant
  1339. * 44.210mbits/sec and we're going to copy
  1340. * them into a new buffer??
  1341. */
  1342. if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
  1343. /*
  1344. * If it's a large packet don't copy it just hand it up
  1345. */
  1346. give_it_anyways:
  1347. sc->lmc_rxq[i] = NULL;
  1348. sc->lmc_rxring[i].buffer1 = 0x0;
  1349. skb_put (skb, len);
  1350. skb->protocol = lmc_proto_type(sc, skb);
  1351. skb->protocol = htons(ETH_P_WAN_PPP);
  1352. skb_reset_mac_header(skb);
  1353. /* skb_reset_network_header(skb); */
  1354. skb->dev = dev;
  1355. lmc_proto_netif(sc, skb);
  1356. /*
  1357. * This skb will be destroyed by the upper layers, make a new one
  1358. */
  1359. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1360. if (nsb) {
  1361. sc->lmc_rxq[i] = nsb;
  1362. nsb->dev = dev;
  1363. sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
  1364. /* Transferred to 21140 below */
  1365. }
  1366. else {
  1367. /*
  1368. * We've run out of memory, stop trying to allocate
  1369. * memory and exit the interrupt handler
  1370. *
  1371. * The chip may run out of receivers and stop
  1372. * in which care we'll try to allocate the buffer
  1373. * again. (once a second)
  1374. */
  1375. sc->stats.rx_BuffAllocErr++;
  1376. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1377. sc->failed_recv_alloc = 1;
  1378. goto skip_out_of_mem;
  1379. }
  1380. }
  1381. else {
  1382. nsb = dev_alloc_skb(len);
  1383. if(!nsb) {
  1384. goto give_it_anyways;
  1385. }
  1386. skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
  1387. nsb->protocol = lmc_proto_type(sc, skb);
  1388. skb_reset_mac_header(nsb);
  1389. /* skb_reset_network_header(nsb); */
  1390. nsb->dev = dev;
  1391. lmc_proto_netif(sc, nsb);
  1392. }
  1393. skip_packet:
  1394. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1395. sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
  1396. sc->lmc_next_rx++;
  1397. i = sc->lmc_next_rx % LMC_RXDESCS;
  1398. rx_work_limit--;
  1399. if (rx_work_limit < 0)
  1400. break;
  1401. }
  1402. /* detect condition for LMC1000 where DSU cable attaches and fills
  1403. * descriptors with bogus packets
  1404. *
  1405. if (localLengthErrCnt > LMC_RXDESCS - 3) {
  1406. sc->stats.rx_BadPktSurgeCnt++;
  1407. LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE,
  1408. localLengthErrCnt,
  1409. sc->stats.rx_BadPktSurgeCnt);
  1410. } */
  1411. /* save max count of receive descriptors serviced */
  1412. if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) {
  1413. sc->stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
  1414. }
  1415. #ifdef DEBUG
  1416. if (rxIntLoopCnt == 0)
  1417. {
  1418. for (i = 0; i < LMC_RXDESCS; i++)
  1419. {
  1420. if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
  1421. != DESC_OWNED_BY_DC21X4)
  1422. {
  1423. rxIntLoopCnt++;
  1424. }
  1425. }
  1426. LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
  1427. }
  1428. #endif
  1429. lmc_led_off(sc, LMC_DS3_LED3);
  1430. skip_out_of_mem:
  1431. lmc_trace(dev, "lmc_rx out");
  1432. return 0;
  1433. }
  1434. static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/
  1435. {
  1436. lmc_softc_t *sc = dev->priv;
  1437. unsigned long flags;
  1438. lmc_trace(dev, "lmc_get_stats in");
  1439. spin_lock_irqsave(&sc->lmc_lock, flags);
  1440. sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
  1441. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1442. lmc_trace(dev, "lmc_get_stats out");
  1443. return (struct net_device_stats *) &sc->stats;
  1444. }
  1445. static struct pci_driver lmc_driver = {
  1446. .name = "lmc",
  1447. .id_table = lmc_pci_tbl,
  1448. .probe = lmc_init_one,
  1449. .remove = __devexit_p(lmc_remove_one),
  1450. };
  1451. static int __init init_lmc(void)
  1452. {
  1453. return pci_register_driver(&lmc_driver);
  1454. }
  1455. static void __exit exit_lmc(void)
  1456. {
  1457. pci_unregister_driver(&lmc_driver);
  1458. }
  1459. module_init(init_lmc);
  1460. module_exit(exit_lmc);
  1461. unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
  1462. {
  1463. int i;
  1464. int command = (0xf6 << 10) | (devaddr << 5) | regno;
  1465. int retval = 0;
  1466. lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
  1467. LMC_MII_SYNC (sc);
  1468. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
  1469. for (i = 15; i >= 0; i--)
  1470. {
  1471. int dataval = (command & (1 << i)) ? 0x20000 : 0;
  1472. LMC_CSR_WRITE (sc, csr_9, dataval);
  1473. lmc_delay ();
  1474. /* __SLOW_DOWN_IO; */
  1475. LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
  1476. lmc_delay ();
  1477. /* __SLOW_DOWN_IO; */
  1478. }
  1479. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
  1480. for (i = 19; i > 0; i--)
  1481. {
  1482. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1483. lmc_delay ();
  1484. /* __SLOW_DOWN_IO; */
  1485. retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
  1486. LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
  1487. lmc_delay ();
  1488. /* __SLOW_DOWN_IO; */
  1489. }
  1490. lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
  1491. return (retval >> 1) & 0xffff;
  1492. }
  1493. void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
  1494. {
  1495. int i = 32;
  1496. int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
  1497. lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
  1498. LMC_MII_SYNC (sc);
  1499. i = 31;
  1500. while (i >= 0)
  1501. {
  1502. int datav;
  1503. if (command & (1 << i))
  1504. datav = 0x20000;
  1505. else
  1506. datav = 0x00000;
  1507. LMC_CSR_WRITE (sc, csr_9, datav);
  1508. lmc_delay ();
  1509. /* __SLOW_DOWN_IO; */
  1510. LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
  1511. lmc_delay ();
  1512. /* __SLOW_DOWN_IO; */
  1513. i--;
  1514. }
  1515. i = 2;
  1516. while (i > 0)
  1517. {
  1518. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1519. lmc_delay ();
  1520. /* __SLOW_DOWN_IO; */
  1521. LMC_CSR_WRITE (sc, csr_9, 0x50000);
  1522. lmc_delay ();
  1523. /* __SLOW_DOWN_IO; */
  1524. i--;
  1525. }
  1526. lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
  1527. }
  1528. static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
  1529. {
  1530. int i;
  1531. lmc_trace(sc->lmc_device, "lmc_softreset in");
  1532. /* Initialize the receive rings and buffers. */
  1533. sc->lmc_txfull = 0;
  1534. sc->lmc_next_rx = 0;
  1535. sc->lmc_next_tx = 0;
  1536. sc->lmc_taint_rx = 0;
  1537. sc->lmc_taint_tx = 0;
  1538. /*
  1539. * Setup each one of the receiver buffers
  1540. * allocate an skbuff for each one, setup the descriptor table
  1541. * and point each buffer at the next one
  1542. */
  1543. for (i = 0; i < LMC_RXDESCS; i++)
  1544. {
  1545. struct sk_buff *skb;
  1546. if (sc->lmc_rxq[i] == NULL)
  1547. {
  1548. skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1549. if(skb == NULL){
  1550. printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
  1551. sc->failed_ring = 1;
  1552. break;
  1553. }
  1554. else{
  1555. sc->lmc_rxq[i] = skb;
  1556. }
  1557. }
  1558. else
  1559. {
  1560. skb = sc->lmc_rxq[i];
  1561. }
  1562. skb->dev = sc->lmc_device;
  1563. /* owned by 21140 */
  1564. sc->lmc_rxring[i].status = 0x80000000;
  1565. /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
  1566. sc->lmc_rxring[i].length = skb_tailroom(skb);
  1567. /* use to be tail which is dumb since you're thinking why write
  1568. * to the end of the packj,et but since there's nothing there tail == data
  1569. */
  1570. sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
  1571. /* This is fair since the structure is static and we have the next address */
  1572. sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
  1573. }
  1574. /*
  1575. * Sets end of ring
  1576. */
  1577. sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
  1578. sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */
  1579. LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
  1580. /* Initialize the transmit rings and buffers */
  1581. for (i = 0; i < LMC_TXDESCS; i++)
  1582. {
  1583. if (sc->lmc_txq[i] != NULL){ /* have buffer */
  1584. dev_kfree_skb(sc->lmc_txq[i]); /* free it */
  1585. sc->stats.tx_dropped++; /* We just dropped a packet */
  1586. }
  1587. sc->lmc_txq[i] = NULL;
  1588. sc->lmc_txring[i].status = 0x00000000;
  1589. sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
  1590. }
  1591. sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
  1592. LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
  1593. lmc_trace(sc->lmc_device, "lmc_softreset out");
  1594. }
  1595. void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
  1596. {
  1597. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
  1598. sc->lmc_gpio_io &= ~bits;
  1599. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1600. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
  1601. }
  1602. void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
  1603. {
  1604. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
  1605. sc->lmc_gpio_io |= bits;
  1606. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1607. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
  1608. }
  1609. void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
  1610. {
  1611. lmc_trace(sc->lmc_device, "lmc_led_on in");
  1612. if((~sc->lmc_miireg16) & led){ /* Already on! */
  1613. lmc_trace(sc->lmc_device, "lmc_led_on aon out");
  1614. return;
  1615. }
  1616. sc->lmc_miireg16 &= ~led;
  1617. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1618. lmc_trace(sc->lmc_device, "lmc_led_on out");
  1619. }
  1620. void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
  1621. {
  1622. lmc_trace(sc->lmc_device, "lmc_led_off in");
  1623. if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
  1624. lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
  1625. return;
  1626. }
  1627. sc->lmc_miireg16 |= led;
  1628. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1629. lmc_trace(sc->lmc_device, "lmc_led_off out");
  1630. }
  1631. static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
  1632. {
  1633. lmc_trace(sc->lmc_device, "lmc_reset in");
  1634. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  1635. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1636. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  1637. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1638. /*
  1639. * make some of the GPIO pins be outputs
  1640. */
  1641. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  1642. /*
  1643. * RESET low to force state reset. This also forces
  1644. * the transmitter clock to be internal, but we expect to reset
  1645. * that later anyway.
  1646. */
  1647. sc->lmc_gpio &= ~(LMC_GEP_RESET);
  1648. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  1649. /*
  1650. * hold for more than 10 microseconds
  1651. */
  1652. udelay(50);
  1653. /*
  1654. * stop driving Xilinx-related signals
  1655. */
  1656. lmc_gpio_mkinput(sc, LMC_GEP_RESET);
  1657. /*
  1658. * Call media specific init routine
  1659. */
  1660. sc->lmc_media->init(sc);
  1661. sc->stats.resetCount++;
  1662. lmc_trace(sc->lmc_device, "lmc_reset out");
  1663. }
  1664. static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
  1665. {
  1666. u_int32_t val;
  1667. lmc_trace(sc->lmc_device, "lmc_dec_reset in");
  1668. /*
  1669. * disable all interrupts
  1670. */
  1671. sc->lmc_intrmask = 0;
  1672. LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
  1673. /*
  1674. * Reset the chip with a software reset command.
  1675. * Wait 10 microseconds (actually 50 PCI cycles but at
  1676. * 33MHz that comes to two microseconds but wait a
  1677. * bit longer anyways)
  1678. */
  1679. LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
  1680. udelay(25);
  1681. #ifdef __sparc__
  1682. sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
  1683. sc->lmc_busmode = 0x00100000;
  1684. sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
  1685. LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
  1686. #endif
  1687. sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
  1688. /*
  1689. * We want:
  1690. * no ethernet address in frames we write
  1691. * disable padding (txdesc, padding disable)
  1692. * ignore runt frames (rdes0 bit 15)
  1693. * no receiver watchdog or transmitter jabber timer
  1694. * (csr15 bit 0,14 == 1)
  1695. * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
  1696. */
  1697. sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
  1698. | TULIP_CMD_FULLDUPLEX
  1699. | TULIP_CMD_PASSBADPKT
  1700. | TULIP_CMD_NOHEARTBEAT
  1701. | TULIP_CMD_PORTSELECT
  1702. | TULIP_CMD_RECEIVEALL
  1703. | TULIP_CMD_MUSTBEONE
  1704. );
  1705. sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
  1706. | TULIP_CMD_THRESHOLDCTL
  1707. | TULIP_CMD_STOREFWD
  1708. | TULIP_CMD_TXTHRSHLDCTL
  1709. );
  1710. LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
  1711. /*
  1712. * disable receiver watchdog and transmit jabber
  1713. */
  1714. val = LMC_CSR_READ(sc, csr_sia_general);
  1715. val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
  1716. LMC_CSR_WRITE(sc, csr_sia_general, val);
  1717. lmc_trace(sc->lmc_device, "lmc_dec_reset out");
  1718. }
  1719. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
  1720. size_t csr_size)
  1721. {
  1722. lmc_trace(sc->lmc_device, "lmc_initcsrs in");
  1723. sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
  1724. sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
  1725. sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
  1726. sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
  1727. sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
  1728. sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
  1729. sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
  1730. sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
  1731. sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
  1732. sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
  1733. sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
  1734. sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
  1735. sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
  1736. sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
  1737. sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
  1738. sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
  1739. lmc_trace(sc->lmc_device, "lmc_initcsrs out");
  1740. }
  1741. static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
  1742. lmc_softc_t *sc;
  1743. u32 csr6;
  1744. unsigned long flags;
  1745. lmc_trace(dev, "lmc_driver_timeout in");
  1746. sc = dev->priv;
  1747. spin_lock_irqsave(&sc->lmc_lock, flags);
  1748. printk("%s: Xmitter busy|\n", dev->name);
  1749. sc->stats.tx_tbusy_calls++ ;
  1750. if (jiffies - dev->trans_start < TX_TIMEOUT) {
  1751. goto bug_out;
  1752. }
  1753. /*
  1754. * Chip seems to have locked up
  1755. * Reset it
  1756. * This whips out all our decriptor
  1757. * table and starts from scartch
  1758. */
  1759. LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
  1760. LMC_CSR_READ (sc, csr_status),
  1761. sc->stats.tx_ProcTimeout);
  1762. lmc_running_reset (dev);
  1763. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1764. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1765. lmc_mii_readreg (sc, 0, 16),
  1766. lmc_mii_readreg (sc, 0, 17));
  1767. /* restart the tx processes */
  1768. csr6 = LMC_CSR_READ (sc, csr_command);
  1769. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
  1770. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
  1771. /* immediate transmit */
  1772. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1773. sc->stats.tx_errors++;
  1774. sc->stats.tx_ProcTimeout++; /* -baz */
  1775. dev->trans_start = jiffies;
  1776. bug_out:
  1777. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1778. lmc_trace(dev, "lmc_driver_timout out");
  1779. }