smc911x.c 60 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. MODULE_ALIAS("platform:smc911x");
  86. /*
  87. * The internal workings of the driver. If you are changing anything
  88. * here with the SMC stuff, you should have the datasheet and know
  89. * what you are doing.
  90. */
  91. #define CARDNAME "smc911x"
  92. /*
  93. * Use power-down feature of the chip
  94. */
  95. #define POWER_DOWN 1
  96. /* store this information for the driver.. */
  97. struct smc911x_local {
  98. /*
  99. * If I have to wait until the DMA is finished and ready to reload a
  100. * packet, I will store the skbuff here. Then, the DMA will send it
  101. * out and free it.
  102. */
  103. struct sk_buff *pending_tx_skb;
  104. /* version/revision of the SMC911x chip */
  105. u16 version;
  106. u16 revision;
  107. /* FIFO sizes */
  108. int tx_fifo_kb;
  109. int tx_fifo_size;
  110. int rx_fifo_size;
  111. int afc_cfg;
  112. /* Contains the current active receive/phy mode */
  113. int ctl_rfduplx;
  114. int ctl_rspeed;
  115. u32 msg_enable;
  116. u32 phy_type;
  117. struct mii_if_info mii;
  118. /* work queue */
  119. struct work_struct phy_configure;
  120. int work_pending;
  121. int tx_throttle;
  122. spinlock_t lock;
  123. struct net_device *netdev;
  124. #ifdef SMC_USE_DMA
  125. /* DMA needs the physical address of the chip */
  126. u_long physaddr;
  127. int rxdma;
  128. int txdma;
  129. int rxdma_active;
  130. int txdma_active;
  131. struct sk_buff *current_rx_skb;
  132. struct sk_buff *current_tx_skb;
  133. struct device *dev;
  134. #endif
  135. };
  136. #if SMC_DEBUG > 0
  137. #define DBG(n, args...) \
  138. do { \
  139. if (SMC_DEBUG & (n)) \
  140. printk(args); \
  141. } while (0)
  142. #define PRINTK(args...) printk(args)
  143. #else
  144. #define DBG(n, args...) do { } while (0)
  145. #define PRINTK(args...) printk(KERN_DEBUG args)
  146. #endif
  147. #if SMC_DEBUG_PKTS > 0
  148. static void PRINT_PKT(u_char *buf, int length)
  149. {
  150. int i;
  151. int remainder;
  152. int lines;
  153. lines = length / 16;
  154. remainder = length % 16;
  155. for (i = 0; i < lines ; i ++) {
  156. int cur;
  157. for (cur = 0; cur < 8; cur++) {
  158. u_char a, b;
  159. a = *buf++;
  160. b = *buf++;
  161. printk("%02x%02x ", a, b);
  162. }
  163. printk("\n");
  164. }
  165. for (i = 0; i < remainder/2 ; i++) {
  166. u_char a, b;
  167. a = *buf++;
  168. b = *buf++;
  169. printk("%02x%02x ", a, b);
  170. }
  171. printk("\n");
  172. }
  173. #else
  174. #define PRINT_PKT(x...) do { } while (0)
  175. #endif
  176. /* this enables an interrupt in the interrupt mask register */
  177. #define SMC_ENABLE_INT(x) do { \
  178. unsigned int __mask; \
  179. unsigned long __flags; \
  180. spin_lock_irqsave(&lp->lock, __flags); \
  181. __mask = SMC_GET_INT_EN(); \
  182. __mask |= (x); \
  183. SMC_SET_INT_EN(__mask); \
  184. spin_unlock_irqrestore(&lp->lock, __flags); \
  185. } while (0)
  186. /* this disables an interrupt from the interrupt mask register */
  187. #define SMC_DISABLE_INT(x) do { \
  188. unsigned int __mask; \
  189. unsigned long __flags; \
  190. spin_lock_irqsave(&lp->lock, __flags); \
  191. __mask = SMC_GET_INT_EN(); \
  192. __mask &= ~(x); \
  193. SMC_SET_INT_EN(__mask); \
  194. spin_unlock_irqrestore(&lp->lock, __flags); \
  195. } while (0)
  196. /*
  197. * this does a soft reset on the device
  198. */
  199. static void smc911x_reset(struct net_device *dev)
  200. {
  201. unsigned long ioaddr = dev->base_addr;
  202. struct smc911x_local *lp = netdev_priv(dev);
  203. unsigned int reg, timeout=0, resets=1;
  204. unsigned long flags;
  205. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  206. /* Take out of PM setting first */
  207. if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
  208. /* Write to the bytetest will take out of powerdown */
  209. SMC_SET_BYTE_TEST(0);
  210. timeout=10;
  211. do {
  212. udelay(10);
  213. reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
  214. } while (--timeout && !reg);
  215. if (timeout == 0) {
  216. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  217. return;
  218. }
  219. }
  220. /* Disable all interrupts */
  221. spin_lock_irqsave(&lp->lock, flags);
  222. SMC_SET_INT_EN(0);
  223. spin_unlock_irqrestore(&lp->lock, flags);
  224. while (resets--) {
  225. SMC_SET_HW_CFG(HW_CFG_SRST_);
  226. timeout=10;
  227. do {
  228. udelay(10);
  229. reg = SMC_GET_HW_CFG();
  230. /* If chip indicates reset timeout then try again */
  231. if (reg & HW_CFG_SRST_TO_) {
  232. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  233. resets++;
  234. break;
  235. }
  236. } while (--timeout && (reg & HW_CFG_SRST_));
  237. }
  238. if (timeout == 0) {
  239. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  240. return;
  241. }
  242. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  243. timeout=1000;
  244. while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
  245. udelay(10);
  246. }
  247. if (timeout == 0){
  248. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  249. return;
  250. }
  251. /* Initialize interrupts */
  252. SMC_SET_INT_EN(0);
  253. SMC_ACK_INT(-1);
  254. /* Reset the FIFO level and flow control settings */
  255. SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
  256. //TODO: Figure out what appropriate pause time is
  257. SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
  258. SMC_SET_AFC_CFG(lp->afc_cfg);
  259. /* Set to LED outputs */
  260. SMC_SET_GPIO_CFG(0x70070000);
  261. /*
  262. * Deassert IRQ for 1*10us for edge type interrupts
  263. * and drive IRQ pin push-pull
  264. */
  265. SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
  266. /* clear anything saved */
  267. if (lp->pending_tx_skb != NULL) {
  268. dev_kfree_skb (lp->pending_tx_skb);
  269. lp->pending_tx_skb = NULL;
  270. dev->stats.tx_errors++;
  271. dev->stats.tx_aborted_errors++;
  272. }
  273. }
  274. /*
  275. * Enable Interrupts, Receive, and Transmit
  276. */
  277. static void smc911x_enable(struct net_device *dev)
  278. {
  279. unsigned long ioaddr = dev->base_addr;
  280. struct smc911x_local *lp = netdev_priv(dev);
  281. unsigned mask, cfg, cr;
  282. unsigned long flags;
  283. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  284. SMC_SET_MAC_ADDR(dev->dev_addr);
  285. /* Enable TX */
  286. cfg = SMC_GET_HW_CFG();
  287. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  288. cfg |= HW_CFG_SF_;
  289. SMC_SET_HW_CFG(cfg);
  290. SMC_SET_FIFO_TDA(0xFF);
  291. /* Update TX stats on every 64 packets received or every 1 sec */
  292. SMC_SET_FIFO_TSL(64);
  293. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  294. spin_lock_irqsave(&lp->lock, flags);
  295. SMC_GET_MAC_CR(cr);
  296. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  297. SMC_SET_MAC_CR(cr);
  298. SMC_SET_TX_CFG(TX_CFG_TX_ON_);
  299. spin_unlock_irqrestore(&lp->lock, flags);
  300. /* Add 2 byte padding to start of packets */
  301. SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
  302. /* Turn on receiver and enable RX */
  303. if (cr & MAC_CR_RXEN_)
  304. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  305. spin_lock_irqsave(&lp->lock, flags);
  306. SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
  307. spin_unlock_irqrestore(&lp->lock, flags);
  308. /* Interrupt on every received packet */
  309. SMC_SET_FIFO_RSA(0x01);
  310. SMC_SET_FIFO_RSL(0x00);
  311. /* now, enable interrupts */
  312. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  313. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  314. INT_EN_PHY_INT_EN_;
  315. if (IS_REV_A(lp->revision))
  316. mask|=INT_EN_RDFL_EN_;
  317. else {
  318. mask|=INT_EN_RDFO_EN_;
  319. }
  320. SMC_ENABLE_INT(mask);
  321. }
  322. /*
  323. * this puts the device in an inactive state
  324. */
  325. static void smc911x_shutdown(struct net_device *dev)
  326. {
  327. unsigned long ioaddr = dev->base_addr;
  328. struct smc911x_local *lp = netdev_priv(dev);
  329. unsigned cr;
  330. unsigned long flags;
  331. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  332. /* Disable IRQ's */
  333. SMC_SET_INT_EN(0);
  334. /* Turn of Rx and TX */
  335. spin_lock_irqsave(&lp->lock, flags);
  336. SMC_GET_MAC_CR(cr);
  337. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  338. SMC_SET_MAC_CR(cr);
  339. SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
  340. spin_unlock_irqrestore(&lp->lock, flags);
  341. }
  342. static inline void smc911x_drop_pkt(struct net_device *dev)
  343. {
  344. unsigned long ioaddr = dev->base_addr;
  345. unsigned int fifo_count, timeout, reg;
  346. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  347. fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
  348. if (fifo_count <= 4) {
  349. /* Manually dump the packet data */
  350. while (fifo_count--)
  351. SMC_GET_RX_FIFO();
  352. } else {
  353. /* Fast forward through the bad packet */
  354. SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
  355. timeout=50;
  356. do {
  357. udelay(10);
  358. reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
  359. } while (--timeout && reg);
  360. if (timeout == 0) {
  361. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  362. }
  363. }
  364. }
  365. /*
  366. * This is the procedure to handle the receipt of a packet.
  367. * It should be called after checking for packet presence in
  368. * the RX status FIFO. It must be called with the spin lock
  369. * already held.
  370. */
  371. static inline void smc911x_rcv(struct net_device *dev)
  372. {
  373. unsigned long ioaddr = dev->base_addr;
  374. unsigned int pkt_len, status;
  375. struct sk_buff *skb;
  376. unsigned char *data;
  377. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  378. dev->name, __FUNCTION__);
  379. status = SMC_GET_RX_STS_FIFO();
  380. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  381. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  382. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  383. if (status & RX_STS_ES_) {
  384. /* Deal with a bad packet */
  385. dev->stats.rx_errors++;
  386. if (status & RX_STS_CRC_ERR_)
  387. dev->stats.rx_crc_errors++;
  388. else {
  389. if (status & RX_STS_LEN_ERR_)
  390. dev->stats.rx_length_errors++;
  391. if (status & RX_STS_MCAST_)
  392. dev->stats.multicast++;
  393. }
  394. /* Remove the bad packet data from the RX FIFO */
  395. smc911x_drop_pkt(dev);
  396. } else {
  397. /* Receive a valid packet */
  398. /* Alloc a buffer with extra room for DMA alignment */
  399. skb=dev_alloc_skb(pkt_len+32);
  400. if (unlikely(skb == NULL)) {
  401. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  402. dev->name);
  403. dev->stats.rx_dropped++;
  404. smc911x_drop_pkt(dev);
  405. return;
  406. }
  407. /* Align IP header to 32 bits
  408. * Note that the device is configured to add a 2
  409. * byte padding to the packet start, so we really
  410. * want to write to the orignal data pointer */
  411. data = skb->data;
  412. skb_reserve(skb, 2);
  413. skb_put(skb,pkt_len-4);
  414. #ifdef SMC_USE_DMA
  415. {
  416. struct smc911x_local *lp = netdev_priv(dev);
  417. unsigned int fifo;
  418. /* Lower the FIFO threshold if possible */
  419. fifo = SMC_GET_FIFO_INT();
  420. if (fifo & 0xFF) fifo--;
  421. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  422. dev->name, fifo & 0xff);
  423. SMC_SET_FIFO_INT(fifo);
  424. /* Setup RX DMA */
  425. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  426. lp->rxdma_active = 1;
  427. lp->current_rx_skb = skb;
  428. SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
  429. /* Packet processing deferred to DMA RX interrupt */
  430. }
  431. #else
  432. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  433. SMC_PULL_DATA(data, pkt_len+2+3);
  434. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  435. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  436. dev->last_rx = jiffies;
  437. skb->protocol = eth_type_trans(skb, dev);
  438. netif_rx(skb);
  439. dev->stats.rx_packets++;
  440. dev->stats.rx_bytes += pkt_len-4;
  441. #endif
  442. }
  443. }
  444. /*
  445. * This is called to actually send a packet to the chip.
  446. */
  447. static void smc911x_hardware_send_pkt(struct net_device *dev)
  448. {
  449. struct smc911x_local *lp = netdev_priv(dev);
  450. unsigned long ioaddr = dev->base_addr;
  451. struct sk_buff *skb;
  452. unsigned int cmdA, cmdB, len;
  453. unsigned char *buf;
  454. unsigned long flags;
  455. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  456. BUG_ON(lp->pending_tx_skb == NULL);
  457. skb = lp->pending_tx_skb;
  458. lp->pending_tx_skb = NULL;
  459. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  460. /* cmdB {31:16] pkt tag [10:0] length */
  461. #ifdef SMC_USE_DMA
  462. /* 16 byte buffer alignment mode */
  463. buf = (char*)((u32)(skb->data) & ~0xF);
  464. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  465. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  466. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  467. skb->len;
  468. #else
  469. buf = (char*)((u32)skb->data & ~0x3);
  470. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  471. cmdA = (((u32)skb->data & 0x3) << 16) |
  472. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  473. skb->len;
  474. #endif
  475. /* tag is packet length so we can use this in stats update later */
  476. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  477. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  478. dev->name, len, len, buf, cmdA, cmdB);
  479. SMC_SET_TX_FIFO(cmdA);
  480. SMC_SET_TX_FIFO(cmdB);
  481. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  482. PRINT_PKT(buf, len <= 64 ? len : 64);
  483. /* Send pkt via PIO or DMA */
  484. #ifdef SMC_USE_DMA
  485. lp->current_tx_skb = skb;
  486. SMC_PUSH_DATA(buf, len);
  487. /* DMA complete IRQ will free buffer and set jiffies */
  488. #else
  489. SMC_PUSH_DATA(buf, len);
  490. dev->trans_start = jiffies;
  491. dev_kfree_skb(skb);
  492. #endif
  493. spin_lock_irqsave(&lp->lock, flags);
  494. if (!lp->tx_throttle) {
  495. netif_wake_queue(dev);
  496. }
  497. spin_unlock_irqrestore(&lp->lock, flags);
  498. SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  499. }
  500. /*
  501. * Since I am not sure if I will have enough room in the chip's ram
  502. * to store the packet, I call this routine which either sends it
  503. * now, or set the card to generates an interrupt when ready
  504. * for the packet.
  505. */
  506. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  507. {
  508. struct smc911x_local *lp = netdev_priv(dev);
  509. unsigned long ioaddr = dev->base_addr;
  510. unsigned int free;
  511. unsigned long flags;
  512. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  513. dev->name, __FUNCTION__);
  514. BUG_ON(lp->pending_tx_skb != NULL);
  515. free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
  516. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  517. /* Turn off the flow when running out of space in FIFO */
  518. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  519. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  520. dev->name, free);
  521. spin_lock_irqsave(&lp->lock, flags);
  522. /* Reenable when at least 1 packet of size MTU present */
  523. SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  524. lp->tx_throttle = 1;
  525. netif_stop_queue(dev);
  526. spin_unlock_irqrestore(&lp->lock, flags);
  527. }
  528. /* Drop packets when we run out of space in TX FIFO
  529. * Account for overhead required for:
  530. *
  531. * Tx command words 8 bytes
  532. * Start offset 15 bytes
  533. * End padding 15 bytes
  534. */
  535. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  536. printk("%s: No Tx free space %d < %d\n",
  537. dev->name, free, skb->len);
  538. lp->pending_tx_skb = NULL;
  539. dev->stats.tx_errors++;
  540. dev->stats.tx_dropped++;
  541. dev_kfree_skb(skb);
  542. return 0;
  543. }
  544. #ifdef SMC_USE_DMA
  545. {
  546. /* If the DMA is already running then defer this packet Tx until
  547. * the DMA IRQ starts it
  548. */
  549. spin_lock_irqsave(&lp->lock, flags);
  550. if (lp->txdma_active) {
  551. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  552. lp->pending_tx_skb = skb;
  553. netif_stop_queue(dev);
  554. spin_unlock_irqrestore(&lp->lock, flags);
  555. return 0;
  556. } else {
  557. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  558. lp->txdma_active = 1;
  559. }
  560. spin_unlock_irqrestore(&lp->lock, flags);
  561. }
  562. #endif
  563. lp->pending_tx_skb = skb;
  564. smc911x_hardware_send_pkt(dev);
  565. return 0;
  566. }
  567. /*
  568. * This handles a TX status interrupt, which is only called when:
  569. * - a TX error occurred, or
  570. * - TX of a packet completed.
  571. */
  572. static void smc911x_tx(struct net_device *dev)
  573. {
  574. unsigned long ioaddr = dev->base_addr;
  575. struct smc911x_local *lp = netdev_priv(dev);
  576. unsigned int tx_status;
  577. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  578. dev->name, __FUNCTION__);
  579. /* Collect the TX status */
  580. while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  581. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  582. dev->name,
  583. (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
  584. tx_status = SMC_GET_TX_STS_FIFO();
  585. dev->stats.tx_packets++;
  586. dev->stats.tx_bytes+=tx_status>>16;
  587. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  588. dev->name, (tx_status & 0xffff0000) >> 16,
  589. tx_status & 0x0000ffff);
  590. /* count Tx errors, but ignore lost carrier errors when in
  591. * full-duplex mode */
  592. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  593. !(tx_status & 0x00000306))) {
  594. dev->stats.tx_errors++;
  595. }
  596. if (tx_status & TX_STS_MANY_COLL_) {
  597. dev->stats.collisions+=16;
  598. dev->stats.tx_aborted_errors++;
  599. } else {
  600. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  601. }
  602. /* carrier error only has meaning for half-duplex communication */
  603. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  604. !lp->ctl_rfduplx) {
  605. dev->stats.tx_carrier_errors++;
  606. }
  607. if (tx_status & TX_STS_LATE_COLL_) {
  608. dev->stats.collisions++;
  609. dev->stats.tx_aborted_errors++;
  610. }
  611. }
  612. }
  613. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  614. /*
  615. * Reads a register from the MII Management serial interface
  616. */
  617. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  618. {
  619. unsigned long ioaddr = dev->base_addr;
  620. unsigned int phydata;
  621. SMC_GET_MII(phyreg, phyaddr, phydata);
  622. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  623. __FUNCTION__, phyaddr, phyreg, phydata);
  624. return phydata;
  625. }
  626. /*
  627. * Writes a register to the MII Management serial interface
  628. */
  629. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  630. int phydata)
  631. {
  632. unsigned long ioaddr = dev->base_addr;
  633. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  634. __FUNCTION__, phyaddr, phyreg, phydata);
  635. SMC_SET_MII(phyreg, phyaddr, phydata);
  636. }
  637. /*
  638. * Finds and reports the PHY address (115 and 117 have external
  639. * PHY interface 118 has internal only
  640. */
  641. static void smc911x_phy_detect(struct net_device *dev)
  642. {
  643. unsigned long ioaddr = dev->base_addr;
  644. struct smc911x_local *lp = netdev_priv(dev);
  645. int phyaddr;
  646. unsigned int cfg, id1, id2;
  647. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  648. lp->phy_type = 0;
  649. /*
  650. * Scan all 32 PHY addresses if necessary, starting at
  651. * PHY#1 to PHY#31, and then PHY#0 last.
  652. */
  653. switch(lp->version) {
  654. case 0x115:
  655. case 0x117:
  656. cfg = SMC_GET_HW_CFG();
  657. if (cfg & HW_CFG_EXT_PHY_DET_) {
  658. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  659. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  660. SMC_SET_HW_CFG(cfg);
  661. udelay(10); /* Wait for clocks to stop */
  662. cfg |= HW_CFG_EXT_PHY_EN_;
  663. SMC_SET_HW_CFG(cfg);
  664. udelay(10); /* Wait for clocks to stop */
  665. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  666. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  667. SMC_SET_HW_CFG(cfg);
  668. udelay(10); /* Wait for clocks to stop */
  669. cfg |= HW_CFG_SMI_SEL_;
  670. SMC_SET_HW_CFG(cfg);
  671. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  672. /* Read the PHY identifiers */
  673. SMC_GET_PHY_ID1(phyaddr & 31, id1);
  674. SMC_GET_PHY_ID2(phyaddr & 31, id2);
  675. /* Make sure it is a valid identifier */
  676. if (id1 != 0x0000 && id1 != 0xffff &&
  677. id1 != 0x8000 && id2 != 0x0000 &&
  678. id2 != 0xffff && id2 != 0x8000) {
  679. /* Save the PHY's address */
  680. lp->mii.phy_id = phyaddr & 31;
  681. lp->phy_type = id1 << 16 | id2;
  682. break;
  683. }
  684. }
  685. }
  686. default:
  687. /* Internal media only */
  688. SMC_GET_PHY_ID1(1, id1);
  689. SMC_GET_PHY_ID2(1, id2);
  690. /* Save the PHY's address */
  691. lp->mii.phy_id = 1;
  692. lp->phy_type = id1 << 16 | id2;
  693. }
  694. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  695. dev->name, id1, id2, lp->mii.phy_id);
  696. }
  697. /*
  698. * Sets the PHY to a configuration as determined by the user.
  699. * Called with spin_lock held.
  700. */
  701. static int smc911x_phy_fixed(struct net_device *dev)
  702. {
  703. struct smc911x_local *lp = netdev_priv(dev);
  704. unsigned long ioaddr = dev->base_addr;
  705. int phyaddr = lp->mii.phy_id;
  706. int bmcr;
  707. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  708. /* Enter Link Disable state */
  709. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  710. bmcr |= BMCR_PDOWN;
  711. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  712. /*
  713. * Set our fixed capabilities
  714. * Disable auto-negotiation
  715. */
  716. bmcr &= ~BMCR_ANENABLE;
  717. if (lp->ctl_rfduplx)
  718. bmcr |= BMCR_FULLDPLX;
  719. if (lp->ctl_rspeed == 100)
  720. bmcr |= BMCR_SPEED100;
  721. /* Write our capabilities to the phy control register */
  722. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  723. /* Re-Configure the Receive/Phy Control register */
  724. bmcr &= ~BMCR_PDOWN;
  725. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  726. return 1;
  727. }
  728. /*
  729. * smc911x_phy_reset - reset the phy
  730. * @dev: net device
  731. * @phy: phy address
  732. *
  733. * Issue a software reset for the specified PHY and
  734. * wait up to 100ms for the reset to complete. We should
  735. * not access the PHY for 50ms after issuing the reset.
  736. *
  737. * The time to wait appears to be dependent on the PHY.
  738. *
  739. */
  740. static int smc911x_phy_reset(struct net_device *dev, int phy)
  741. {
  742. struct smc911x_local *lp = netdev_priv(dev);
  743. unsigned long ioaddr = dev->base_addr;
  744. int timeout;
  745. unsigned long flags;
  746. unsigned int reg;
  747. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  748. spin_lock_irqsave(&lp->lock, flags);
  749. reg = SMC_GET_PMT_CTRL();
  750. reg &= ~0xfffff030;
  751. reg |= PMT_CTRL_PHY_RST_;
  752. SMC_SET_PMT_CTRL(reg);
  753. spin_unlock_irqrestore(&lp->lock, flags);
  754. for (timeout = 2; timeout; timeout--) {
  755. msleep(50);
  756. spin_lock_irqsave(&lp->lock, flags);
  757. reg = SMC_GET_PMT_CTRL();
  758. spin_unlock_irqrestore(&lp->lock, flags);
  759. if (!(reg & PMT_CTRL_PHY_RST_)) {
  760. /* extra delay required because the phy may
  761. * not be completed with its reset
  762. * when PHY_BCR_RESET_ is cleared. 256us
  763. * should suffice, but use 500us to be safe
  764. */
  765. udelay(500);
  766. break;
  767. }
  768. }
  769. return reg & PMT_CTRL_PHY_RST_;
  770. }
  771. /*
  772. * smc911x_phy_powerdown - powerdown phy
  773. * @dev: net device
  774. * @phy: phy address
  775. *
  776. * Power down the specified PHY
  777. */
  778. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  779. {
  780. unsigned long ioaddr = dev->base_addr;
  781. unsigned int bmcr;
  782. /* Enter Link Disable state */
  783. SMC_GET_PHY_BMCR(phy, bmcr);
  784. bmcr |= BMCR_PDOWN;
  785. SMC_SET_PHY_BMCR(phy, bmcr);
  786. }
  787. /*
  788. * smc911x_phy_check_media - check the media status and adjust BMCR
  789. * @dev: net device
  790. * @init: set true for initialisation
  791. *
  792. * Select duplex mode depending on negotiation state. This
  793. * also updates our carrier state.
  794. */
  795. static void smc911x_phy_check_media(struct net_device *dev, int init)
  796. {
  797. struct smc911x_local *lp = netdev_priv(dev);
  798. unsigned long ioaddr = dev->base_addr;
  799. int phyaddr = lp->mii.phy_id;
  800. unsigned int bmcr, cr;
  801. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  802. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  803. /* duplex state has changed */
  804. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  805. SMC_GET_MAC_CR(cr);
  806. if (lp->mii.full_duplex) {
  807. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  808. bmcr |= BMCR_FULLDPLX;
  809. cr |= MAC_CR_RCVOWN_;
  810. } else {
  811. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  812. bmcr &= ~BMCR_FULLDPLX;
  813. cr &= ~MAC_CR_RCVOWN_;
  814. }
  815. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  816. SMC_SET_MAC_CR(cr);
  817. }
  818. }
  819. /*
  820. * Configures the specified PHY through the MII management interface
  821. * using Autonegotiation.
  822. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  823. * If RPC ANEG bit is set, the media selection is dependent purely on
  824. * the selection by the MII (either in the MII BMCR reg or the result
  825. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  826. * is controlled by the RPC SPEED and RPC DPLX bits.
  827. */
  828. static void smc911x_phy_configure(struct work_struct *work)
  829. {
  830. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  831. phy_configure);
  832. struct net_device *dev = lp->netdev;
  833. unsigned long ioaddr = dev->base_addr;
  834. int phyaddr = lp->mii.phy_id;
  835. int my_phy_caps; /* My PHY capabilities */
  836. int my_ad_caps; /* My Advertised capabilities */
  837. int status;
  838. unsigned long flags;
  839. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  840. /*
  841. * We should not be called if phy_type is zero.
  842. */
  843. if (lp->phy_type == 0)
  844. goto smc911x_phy_configure_exit_nolock;
  845. if (smc911x_phy_reset(dev, phyaddr)) {
  846. printk("%s: PHY reset timed out\n", dev->name);
  847. goto smc911x_phy_configure_exit_nolock;
  848. }
  849. spin_lock_irqsave(&lp->lock, flags);
  850. /*
  851. * Enable PHY Interrupts (for register 18)
  852. * Interrupts listed here are enabled
  853. */
  854. SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  855. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  856. PHY_INT_MASK_LINK_DOWN_);
  857. /* If the user requested no auto neg, then go set his request */
  858. if (lp->mii.force_media) {
  859. smc911x_phy_fixed(dev);
  860. goto smc911x_phy_configure_exit;
  861. }
  862. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  863. SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
  864. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  865. printk(KERN_INFO "Auto negotiation NOT supported\n");
  866. smc911x_phy_fixed(dev);
  867. goto smc911x_phy_configure_exit;
  868. }
  869. /* CSMA capable w/ both pauses */
  870. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  871. if (my_phy_caps & BMSR_100BASE4)
  872. my_ad_caps |= ADVERTISE_100BASE4;
  873. if (my_phy_caps & BMSR_100FULL)
  874. my_ad_caps |= ADVERTISE_100FULL;
  875. if (my_phy_caps & BMSR_100HALF)
  876. my_ad_caps |= ADVERTISE_100HALF;
  877. if (my_phy_caps & BMSR_10FULL)
  878. my_ad_caps |= ADVERTISE_10FULL;
  879. if (my_phy_caps & BMSR_10HALF)
  880. my_ad_caps |= ADVERTISE_10HALF;
  881. /* Disable capabilities not selected by our user */
  882. if (lp->ctl_rspeed != 100)
  883. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  884. if (!lp->ctl_rfduplx)
  885. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  886. /* Update our Auto-Neg Advertisement Register */
  887. SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
  888. lp->mii.advertising = my_ad_caps;
  889. /*
  890. * Read the register back. Without this, it appears that when
  891. * auto-negotiation is restarted, sometimes it isn't ready and
  892. * the link does not come up.
  893. */
  894. udelay(10);
  895. SMC_GET_PHY_MII_ADV(phyaddr, status);
  896. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  897. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  898. /* Restart auto-negotiation process in order to advertise my caps */
  899. SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  900. smc911x_phy_check_media(dev, 1);
  901. smc911x_phy_configure_exit:
  902. spin_unlock_irqrestore(&lp->lock, flags);
  903. smc911x_phy_configure_exit_nolock:
  904. lp->work_pending = 0;
  905. }
  906. /*
  907. * smc911x_phy_interrupt
  908. *
  909. * Purpose: Handle interrupts relating to PHY register 18. This is
  910. * called from the "hard" interrupt handler under our private spinlock.
  911. */
  912. static void smc911x_phy_interrupt(struct net_device *dev)
  913. {
  914. struct smc911x_local *lp = netdev_priv(dev);
  915. unsigned long ioaddr = dev->base_addr;
  916. int phyaddr = lp->mii.phy_id;
  917. int status;
  918. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  919. if (lp->phy_type == 0)
  920. return;
  921. smc911x_phy_check_media(dev, 0);
  922. /* read to clear status bits */
  923. SMC_GET_PHY_INT_SRC(phyaddr,status);
  924. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  925. dev->name, status & 0xffff);
  926. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  927. dev->name, SMC_GET_AFC_CFG());
  928. }
  929. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  930. /*
  931. * This is the main routine of the driver, to handle the device when
  932. * it needs some attention.
  933. */
  934. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  935. {
  936. struct net_device *dev = dev_id;
  937. unsigned long ioaddr = dev->base_addr;
  938. struct smc911x_local *lp = netdev_priv(dev);
  939. unsigned int status, mask, timeout;
  940. unsigned int rx_overrun=0, cr, pkts;
  941. unsigned long flags;
  942. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  943. spin_lock_irqsave(&lp->lock, flags);
  944. /* Spurious interrupt check */
  945. if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  946. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  947. spin_unlock_irqrestore(&lp->lock, flags);
  948. return IRQ_NONE;
  949. }
  950. mask = SMC_GET_INT_EN();
  951. SMC_SET_INT_EN(0);
  952. /* set a timeout value, so I don't stay here forever */
  953. timeout = 8;
  954. do {
  955. status = SMC_GET_INT();
  956. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  957. dev->name, status, mask, status & ~mask);
  958. status &= mask;
  959. if (!status)
  960. break;
  961. /* Handle SW interrupt condition */
  962. if (status & INT_STS_SW_INT_) {
  963. SMC_ACK_INT(INT_STS_SW_INT_);
  964. mask &= ~INT_EN_SW_INT_EN_;
  965. }
  966. /* Handle various error conditions */
  967. if (status & INT_STS_RXE_) {
  968. SMC_ACK_INT(INT_STS_RXE_);
  969. dev->stats.rx_errors++;
  970. }
  971. if (status & INT_STS_RXDFH_INT_) {
  972. SMC_ACK_INT(INT_STS_RXDFH_INT_);
  973. dev->stats.rx_dropped+=SMC_GET_RX_DROP();
  974. }
  975. /* Undocumented interrupt-what is the right thing to do here? */
  976. if (status & INT_STS_RXDF_INT_) {
  977. SMC_ACK_INT(INT_STS_RXDF_INT_);
  978. }
  979. /* Rx Data FIFO exceeds set level */
  980. if (status & INT_STS_RDFL_) {
  981. if (IS_REV_A(lp->revision)) {
  982. rx_overrun=1;
  983. SMC_GET_MAC_CR(cr);
  984. cr &= ~MAC_CR_RXEN_;
  985. SMC_SET_MAC_CR(cr);
  986. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  987. dev->stats.rx_errors++;
  988. dev->stats.rx_fifo_errors++;
  989. }
  990. SMC_ACK_INT(INT_STS_RDFL_);
  991. }
  992. if (status & INT_STS_RDFO_) {
  993. if (!IS_REV_A(lp->revision)) {
  994. SMC_GET_MAC_CR(cr);
  995. cr &= ~MAC_CR_RXEN_;
  996. SMC_SET_MAC_CR(cr);
  997. rx_overrun=1;
  998. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  999. dev->stats.rx_errors++;
  1000. dev->stats.rx_fifo_errors++;
  1001. }
  1002. SMC_ACK_INT(INT_STS_RDFO_);
  1003. }
  1004. /* Handle receive condition */
  1005. if ((status & INT_STS_RSFL_) || rx_overrun) {
  1006. unsigned int fifo;
  1007. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  1008. fifo = SMC_GET_RX_FIFO_INF();
  1009. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  1010. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  1011. dev->name, pkts, fifo & 0xFFFF );
  1012. if (pkts != 0) {
  1013. #ifdef SMC_USE_DMA
  1014. unsigned int fifo;
  1015. if (lp->rxdma_active){
  1016. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1017. "%s: RX DMA active\n", dev->name);
  1018. /* The DMA is already running so up the IRQ threshold */
  1019. fifo = SMC_GET_FIFO_INT() & ~0xFF;
  1020. fifo |= pkts & 0xFF;
  1021. DBG(SMC_DEBUG_RX,
  1022. "%s: Setting RX stat FIFO threshold to %d\n",
  1023. dev->name, fifo & 0xff);
  1024. SMC_SET_FIFO_INT(fifo);
  1025. } else
  1026. #endif
  1027. smc911x_rcv(dev);
  1028. }
  1029. SMC_ACK_INT(INT_STS_RSFL_);
  1030. }
  1031. /* Handle transmit FIFO available */
  1032. if (status & INT_STS_TDFA_) {
  1033. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  1034. SMC_SET_FIFO_TDA(0xFF);
  1035. lp->tx_throttle = 0;
  1036. #ifdef SMC_USE_DMA
  1037. if (!lp->txdma_active)
  1038. #endif
  1039. netif_wake_queue(dev);
  1040. SMC_ACK_INT(INT_STS_TDFA_);
  1041. }
  1042. /* Handle transmit done condition */
  1043. #if 1
  1044. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  1045. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  1046. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  1047. dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
  1048. smc911x_tx(dev);
  1049. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1050. SMC_ACK_INT(INT_STS_TSFL_);
  1051. SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1052. }
  1053. #else
  1054. if (status & INT_STS_TSFL_) {
  1055. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1056. smc911x_tx(dev);
  1057. SMC_ACK_INT(INT_STS_TSFL_);
  1058. }
  1059. if (status & INT_STS_GPT_INT_) {
  1060. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1061. dev->name,
  1062. SMC_GET_IRQ_CFG(),
  1063. SMC_GET_FIFO_INT(),
  1064. SMC_GET_RX_CFG());
  1065. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1066. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1067. dev->name,
  1068. (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
  1069. SMC_GET_RX_FIFO_INF() & 0xffff,
  1070. SMC_GET_RX_STS_FIFO_PEEK());
  1071. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1072. SMC_ACK_INT(INT_STS_GPT_INT_);
  1073. }
  1074. #endif
  1075. /* Handle PHY interrupt condition */
  1076. if (status & INT_STS_PHY_INT_) {
  1077. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1078. smc911x_phy_interrupt(dev);
  1079. SMC_ACK_INT(INT_STS_PHY_INT_);
  1080. }
  1081. } while (--timeout);
  1082. /* restore mask state */
  1083. SMC_SET_INT_EN(mask);
  1084. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1085. dev->name, 8-timeout);
  1086. spin_unlock_irqrestore(&lp->lock, flags);
  1087. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1088. return IRQ_HANDLED;
  1089. }
  1090. #ifdef SMC_USE_DMA
  1091. static void
  1092. smc911x_tx_dma_irq(int dma, void *data)
  1093. {
  1094. struct net_device *dev = (struct net_device *)data;
  1095. struct smc911x_local *lp = netdev_priv(dev);
  1096. struct sk_buff *skb = lp->current_tx_skb;
  1097. unsigned long flags;
  1098. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1099. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1100. /* Clear the DMA interrupt sources */
  1101. SMC_DMA_ACK_IRQ(dev, dma);
  1102. BUG_ON(skb == NULL);
  1103. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1104. dev->trans_start = jiffies;
  1105. dev_kfree_skb_irq(skb);
  1106. lp->current_tx_skb = NULL;
  1107. if (lp->pending_tx_skb != NULL)
  1108. smc911x_hardware_send_pkt(dev);
  1109. else {
  1110. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1111. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1112. spin_lock_irqsave(&lp->lock, flags);
  1113. lp->txdma_active = 0;
  1114. if (!lp->tx_throttle) {
  1115. netif_wake_queue(dev);
  1116. }
  1117. spin_unlock_irqrestore(&lp->lock, flags);
  1118. }
  1119. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1120. "%s: TX DMA irq completed\n", dev->name);
  1121. }
  1122. static void
  1123. smc911x_rx_dma_irq(int dma, void *data)
  1124. {
  1125. struct net_device *dev = (struct net_device *)data;
  1126. unsigned long ioaddr = dev->base_addr;
  1127. struct smc911x_local *lp = netdev_priv(dev);
  1128. struct sk_buff *skb = lp->current_rx_skb;
  1129. unsigned long flags;
  1130. unsigned int pkts;
  1131. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1132. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1133. /* Clear the DMA interrupt sources */
  1134. SMC_DMA_ACK_IRQ(dev, dma);
  1135. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1136. BUG_ON(skb == NULL);
  1137. lp->current_rx_skb = NULL;
  1138. PRINT_PKT(skb->data, skb->len);
  1139. dev->last_rx = jiffies;
  1140. skb->protocol = eth_type_trans(skb, dev);
  1141. dev->stats.rx_packets++;
  1142. dev->stats.rx_bytes += skb->len;
  1143. netif_rx(skb);
  1144. spin_lock_irqsave(&lp->lock, flags);
  1145. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1146. if (pkts != 0) {
  1147. smc911x_rcv(dev);
  1148. }else {
  1149. lp->rxdma_active = 0;
  1150. }
  1151. spin_unlock_irqrestore(&lp->lock, flags);
  1152. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1153. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1154. dev->name, pkts);
  1155. }
  1156. #endif /* SMC_USE_DMA */
  1157. #ifdef CONFIG_NET_POLL_CONTROLLER
  1158. /*
  1159. * Polling receive - used by netconsole and other diagnostic tools
  1160. * to allow network i/o with interrupts disabled.
  1161. */
  1162. static void smc911x_poll_controller(struct net_device *dev)
  1163. {
  1164. disable_irq(dev->irq);
  1165. smc911x_interrupt(dev->irq, dev);
  1166. enable_irq(dev->irq);
  1167. }
  1168. #endif
  1169. /* Our watchdog timed out. Called by the networking layer */
  1170. static void smc911x_timeout(struct net_device *dev)
  1171. {
  1172. struct smc911x_local *lp = netdev_priv(dev);
  1173. unsigned long ioaddr = dev->base_addr;
  1174. int status, mask;
  1175. unsigned long flags;
  1176. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1177. spin_lock_irqsave(&lp->lock, flags);
  1178. status = SMC_GET_INT();
  1179. mask = SMC_GET_INT_EN();
  1180. spin_unlock_irqrestore(&lp->lock, flags);
  1181. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1182. dev->name, status, mask);
  1183. /* Dump the current TX FIFO contents and restart */
  1184. mask = SMC_GET_TX_CFG();
  1185. SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1186. /*
  1187. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1188. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1189. * which calls schedule(). Hence we use a work queue.
  1190. */
  1191. if (lp->phy_type != 0) {
  1192. if (schedule_work(&lp->phy_configure)) {
  1193. lp->work_pending = 1;
  1194. }
  1195. }
  1196. /* We can accept TX packets again */
  1197. dev->trans_start = jiffies;
  1198. netif_wake_queue(dev);
  1199. }
  1200. /*
  1201. * This routine will, depending on the values passed to it,
  1202. * either make it accept multicast packets, go into
  1203. * promiscuous mode (for TCPDUMP and cousins) or accept
  1204. * a select set of multicast packets
  1205. */
  1206. static void smc911x_set_multicast_list(struct net_device *dev)
  1207. {
  1208. struct smc911x_local *lp = netdev_priv(dev);
  1209. unsigned long ioaddr = dev->base_addr;
  1210. unsigned int multicast_table[2];
  1211. unsigned int mcr, update_multicast = 0;
  1212. unsigned long flags;
  1213. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1214. spin_lock_irqsave(&lp->lock, flags);
  1215. SMC_GET_MAC_CR(mcr);
  1216. spin_unlock_irqrestore(&lp->lock, flags);
  1217. if (dev->flags & IFF_PROMISC) {
  1218. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1219. mcr |= MAC_CR_PRMS_;
  1220. }
  1221. /*
  1222. * Here, I am setting this to accept all multicast packets.
  1223. * I don't need to zero the multicast table, because the flag is
  1224. * checked before the table is
  1225. */
  1226. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1227. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1228. mcr |= MAC_CR_MCPAS_;
  1229. }
  1230. /*
  1231. * This sets the internal hardware table to filter out unwanted
  1232. * multicast packets before they take up memory.
  1233. *
  1234. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1235. * address are the offset into the table. If that bit is 1, then the
  1236. * multicast packet is accepted. Otherwise, it's dropped silently.
  1237. *
  1238. * To use the 6 bits as an offset into the table, the high 1 bit is
  1239. * the number of the 32 bit register, while the low 5 bits are the bit
  1240. * within that register.
  1241. */
  1242. else if (dev->mc_count) {
  1243. int i;
  1244. struct dev_mc_list *cur_addr;
  1245. /* Set the Hash perfec mode */
  1246. mcr |= MAC_CR_HPFILT_;
  1247. /* start with a table of all zeros: reject all */
  1248. memset(multicast_table, 0, sizeof(multicast_table));
  1249. cur_addr = dev->mc_list;
  1250. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1251. u32 position;
  1252. /* do we have a pointer here? */
  1253. if (!cur_addr)
  1254. break;
  1255. /* make sure this is a multicast address -
  1256. shouldn't this be a given if we have it here ? */
  1257. if (!(*cur_addr->dmi_addr & 1))
  1258. continue;
  1259. /* upper 6 bits are used as hash index */
  1260. position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
  1261. multicast_table[position>>5] |= 1 << (position&0x1f);
  1262. }
  1263. /* be sure I get rid of flags I might have set */
  1264. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1265. /* now, the table can be loaded into the chipset */
  1266. update_multicast = 1;
  1267. } else {
  1268. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1269. dev->name);
  1270. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1271. /*
  1272. * since I'm disabling all multicast entirely, I need to
  1273. * clear the multicast list
  1274. */
  1275. memset(multicast_table, 0, sizeof(multicast_table));
  1276. update_multicast = 1;
  1277. }
  1278. spin_lock_irqsave(&lp->lock, flags);
  1279. SMC_SET_MAC_CR(mcr);
  1280. if (update_multicast) {
  1281. DBG(SMC_DEBUG_MISC,
  1282. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1283. dev->name, multicast_table[0], multicast_table[1]);
  1284. SMC_SET_HASHL(multicast_table[0]);
  1285. SMC_SET_HASHH(multicast_table[1]);
  1286. }
  1287. spin_unlock_irqrestore(&lp->lock, flags);
  1288. }
  1289. /*
  1290. * Open and Initialize the board
  1291. *
  1292. * Set up everything, reset the card, etc..
  1293. */
  1294. static int
  1295. smc911x_open(struct net_device *dev)
  1296. {
  1297. struct smc911x_local *lp = netdev_priv(dev);
  1298. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1299. /*
  1300. * Check that the address is valid. If its not, refuse
  1301. * to bring the device up. The user must specify an
  1302. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1303. */
  1304. if (!is_valid_ether_addr(dev->dev_addr)) {
  1305. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1306. return -EINVAL;
  1307. }
  1308. /* reset the hardware */
  1309. smc911x_reset(dev);
  1310. /* Configure the PHY, initialize the link state */
  1311. smc911x_phy_configure(&lp->phy_configure);
  1312. /* Turn on Tx + Rx */
  1313. smc911x_enable(dev);
  1314. netif_start_queue(dev);
  1315. return 0;
  1316. }
  1317. /*
  1318. * smc911x_close
  1319. *
  1320. * this makes the board clean up everything that it can
  1321. * and not talk to the outside world. Caused by
  1322. * an 'ifconfig ethX down'
  1323. */
  1324. static int smc911x_close(struct net_device *dev)
  1325. {
  1326. struct smc911x_local *lp = netdev_priv(dev);
  1327. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1328. netif_stop_queue(dev);
  1329. netif_carrier_off(dev);
  1330. /* clear everything */
  1331. smc911x_shutdown(dev);
  1332. if (lp->phy_type != 0) {
  1333. /* We need to ensure that no calls to
  1334. * smc911x_phy_configure are pending.
  1335. * flush_scheduled_work() cannot be called because we
  1336. * are running with the netlink semaphore held (from
  1337. * devinet_ioctl()) and the pending work queue
  1338. * contains linkwatch_event() (scheduled by
  1339. * netif_carrier_off() above). linkwatch_event() also
  1340. * wants the netlink semaphore.
  1341. */
  1342. while (lp->work_pending)
  1343. schedule();
  1344. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1345. }
  1346. if (lp->pending_tx_skb) {
  1347. dev_kfree_skb(lp->pending_tx_skb);
  1348. lp->pending_tx_skb = NULL;
  1349. }
  1350. return 0;
  1351. }
  1352. /*
  1353. * Ethtool support
  1354. */
  1355. static int
  1356. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1357. {
  1358. struct smc911x_local *lp = netdev_priv(dev);
  1359. unsigned long ioaddr = dev->base_addr;
  1360. int ret, status;
  1361. unsigned long flags;
  1362. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1363. cmd->maxtxpkt = 1;
  1364. cmd->maxrxpkt = 1;
  1365. if (lp->phy_type != 0) {
  1366. spin_lock_irqsave(&lp->lock, flags);
  1367. ret = mii_ethtool_gset(&lp->mii, cmd);
  1368. spin_unlock_irqrestore(&lp->lock, flags);
  1369. } else {
  1370. cmd->supported = SUPPORTED_10baseT_Half |
  1371. SUPPORTED_10baseT_Full |
  1372. SUPPORTED_TP | SUPPORTED_AUI;
  1373. if (lp->ctl_rspeed == 10)
  1374. cmd->speed = SPEED_10;
  1375. else if (lp->ctl_rspeed == 100)
  1376. cmd->speed = SPEED_100;
  1377. cmd->autoneg = AUTONEG_DISABLE;
  1378. if (lp->mii.phy_id==1)
  1379. cmd->transceiver = XCVR_INTERNAL;
  1380. else
  1381. cmd->transceiver = XCVR_EXTERNAL;
  1382. cmd->port = 0;
  1383. SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
  1384. cmd->duplex =
  1385. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1386. DUPLEX_FULL : DUPLEX_HALF;
  1387. ret = 0;
  1388. }
  1389. return ret;
  1390. }
  1391. static int
  1392. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1393. {
  1394. struct smc911x_local *lp = netdev_priv(dev);
  1395. int ret;
  1396. unsigned long flags;
  1397. if (lp->phy_type != 0) {
  1398. spin_lock_irqsave(&lp->lock, flags);
  1399. ret = mii_ethtool_sset(&lp->mii, cmd);
  1400. spin_unlock_irqrestore(&lp->lock, flags);
  1401. } else {
  1402. if (cmd->autoneg != AUTONEG_DISABLE ||
  1403. cmd->speed != SPEED_10 ||
  1404. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1405. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1406. return -EINVAL;
  1407. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1408. ret = 0;
  1409. }
  1410. return ret;
  1411. }
  1412. static void
  1413. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1414. {
  1415. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1416. strncpy(info->version, version, sizeof(info->version));
  1417. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1418. }
  1419. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1420. {
  1421. struct smc911x_local *lp = netdev_priv(dev);
  1422. int ret = -EINVAL;
  1423. unsigned long flags;
  1424. if (lp->phy_type != 0) {
  1425. spin_lock_irqsave(&lp->lock, flags);
  1426. ret = mii_nway_restart(&lp->mii);
  1427. spin_unlock_irqrestore(&lp->lock, flags);
  1428. }
  1429. return ret;
  1430. }
  1431. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1432. {
  1433. struct smc911x_local *lp = netdev_priv(dev);
  1434. return lp->msg_enable;
  1435. }
  1436. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1437. {
  1438. struct smc911x_local *lp = netdev_priv(dev);
  1439. lp->msg_enable = level;
  1440. }
  1441. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1442. {
  1443. /* System regs + MAC regs + PHY regs */
  1444. return (((E2P_CMD - ID_REV)/4 + 1) +
  1445. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1446. }
  1447. static void smc911x_ethtool_getregs(struct net_device *dev,
  1448. struct ethtool_regs* regs, void *buf)
  1449. {
  1450. unsigned long ioaddr = dev->base_addr;
  1451. struct smc911x_local *lp = netdev_priv(dev);
  1452. unsigned long flags;
  1453. u32 reg,i,j=0;
  1454. u32 *data = (u32*)buf;
  1455. regs->version = lp->version;
  1456. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1457. data[j++] = SMC_inl(ioaddr,i);
  1458. }
  1459. for(i=MAC_CR;i<=WUCSR;i++) {
  1460. spin_lock_irqsave(&lp->lock, flags);
  1461. SMC_GET_MAC_CSR(i, reg);
  1462. spin_unlock_irqrestore(&lp->lock, flags);
  1463. data[j++] = reg;
  1464. }
  1465. for(i=0;i<=31;i++) {
  1466. spin_lock_irqsave(&lp->lock, flags);
  1467. SMC_GET_MII(i, lp->mii.phy_id, reg);
  1468. spin_unlock_irqrestore(&lp->lock, flags);
  1469. data[j++] = reg & 0xFFFF;
  1470. }
  1471. }
  1472. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1473. {
  1474. unsigned long ioaddr = dev->base_addr;
  1475. unsigned int timeout;
  1476. int e2p_cmd;
  1477. e2p_cmd = SMC_GET_E2P_CMD();
  1478. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1479. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1480. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1481. dev->name, __FUNCTION__);
  1482. return -EFAULT;
  1483. }
  1484. mdelay(1);
  1485. e2p_cmd = SMC_GET_E2P_CMD();
  1486. }
  1487. if (timeout == 0) {
  1488. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1489. dev->name, __FUNCTION__);
  1490. return -ETIMEDOUT;
  1491. }
  1492. return 0;
  1493. }
  1494. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1495. int cmd, int addr)
  1496. {
  1497. unsigned long ioaddr = dev->base_addr;
  1498. int ret;
  1499. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1500. return ret;
  1501. SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
  1502. ((cmd) & (0x7<<28)) |
  1503. ((addr) & 0xFF));
  1504. return 0;
  1505. }
  1506. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1507. u8 *data)
  1508. {
  1509. unsigned long ioaddr = dev->base_addr;
  1510. int ret;
  1511. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1512. return ret;
  1513. *data = SMC_GET_E2P_DATA();
  1514. return 0;
  1515. }
  1516. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1517. u8 data)
  1518. {
  1519. unsigned long ioaddr = dev->base_addr;
  1520. int ret;
  1521. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1522. return ret;
  1523. SMC_SET_E2P_DATA(data);
  1524. return 0;
  1525. }
  1526. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1527. struct ethtool_eeprom *eeprom, u8 *data)
  1528. {
  1529. u8 eebuf[SMC911X_EEPROM_LEN];
  1530. int i, ret;
  1531. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1532. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1533. return ret;
  1534. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1535. return ret;
  1536. }
  1537. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1538. return 0;
  1539. }
  1540. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1541. struct ethtool_eeprom *eeprom, u8 *data)
  1542. {
  1543. int i, ret;
  1544. /* Enable erase */
  1545. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1546. return ret;
  1547. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1548. /* erase byte */
  1549. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1550. return ret;
  1551. /* write byte */
  1552. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1553. return ret;
  1554. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1555. return ret;
  1556. }
  1557. return 0;
  1558. }
  1559. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1560. {
  1561. return SMC911X_EEPROM_LEN;
  1562. }
  1563. static const struct ethtool_ops smc911x_ethtool_ops = {
  1564. .get_settings = smc911x_ethtool_getsettings,
  1565. .set_settings = smc911x_ethtool_setsettings,
  1566. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1567. .get_msglevel = smc911x_ethtool_getmsglevel,
  1568. .set_msglevel = smc911x_ethtool_setmsglevel,
  1569. .nway_reset = smc911x_ethtool_nwayreset,
  1570. .get_link = ethtool_op_get_link,
  1571. .get_regs_len = smc911x_ethtool_getregslen,
  1572. .get_regs = smc911x_ethtool_getregs,
  1573. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1574. .get_eeprom = smc911x_ethtool_geteeprom,
  1575. .set_eeprom = smc911x_ethtool_seteeprom,
  1576. };
  1577. /*
  1578. * smc911x_findirq
  1579. *
  1580. * This routine has a simple purpose -- make the SMC chip generate an
  1581. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1582. */
  1583. static int __init smc911x_findirq(unsigned long ioaddr)
  1584. {
  1585. int timeout = 20;
  1586. unsigned long cookie;
  1587. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1588. cookie = probe_irq_on();
  1589. /*
  1590. * Force a SW interrupt
  1591. */
  1592. SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
  1593. /*
  1594. * Wait until positive that the interrupt has been generated
  1595. */
  1596. do {
  1597. int int_status;
  1598. udelay(10);
  1599. int_status = SMC_GET_INT_EN();
  1600. if (int_status & INT_EN_SW_INT_EN_)
  1601. break; /* got the interrupt */
  1602. } while (--timeout);
  1603. /*
  1604. * there is really nothing that I can do here if timeout fails,
  1605. * as autoirq_report will return a 0 anyway, which is what I
  1606. * want in this case. Plus, the clean up is needed in both
  1607. * cases.
  1608. */
  1609. /* and disable all interrupts again */
  1610. SMC_SET_INT_EN(0);
  1611. /* and return what I found */
  1612. return probe_irq_off(cookie);
  1613. }
  1614. /*
  1615. * Function: smc911x_probe(unsigned long ioaddr)
  1616. *
  1617. * Purpose:
  1618. * Tests to see if a given ioaddr points to an SMC911x chip.
  1619. * Returns a 0 on success
  1620. *
  1621. * Algorithm:
  1622. * (1) see if the endian word is OK
  1623. * (1) see if I recognize the chip ID in the appropriate register
  1624. *
  1625. * Here I do typical initialization tasks.
  1626. *
  1627. * o Initialize the structure if needed
  1628. * o print out my vanity message if not done so already
  1629. * o print out what type of hardware is detected
  1630. * o print out the ethernet address
  1631. * o find the IRQ
  1632. * o set up my private data
  1633. * o configure the dev structure with my subroutines
  1634. * o actually GRAB the irq.
  1635. * o GRAB the region
  1636. */
  1637. static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
  1638. {
  1639. struct smc911x_local *lp = netdev_priv(dev);
  1640. int i, retval;
  1641. unsigned int val, chip_id, revision;
  1642. const char *version_string;
  1643. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1644. /* First, see if the endian word is recognized */
  1645. val = SMC_GET_BYTE_TEST();
  1646. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1647. if (val != 0x87654321) {
  1648. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1649. retval = -ENODEV;
  1650. goto err_out;
  1651. }
  1652. /*
  1653. * check if the revision register is something that I
  1654. * recognize. These might need to be added to later,
  1655. * as future revisions could be added.
  1656. */
  1657. chip_id = SMC_GET_PN();
  1658. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1659. for(i=0;chip_ids[i].id != 0; i++) {
  1660. if (chip_ids[i].id == chip_id) break;
  1661. }
  1662. if (!chip_ids[i].id) {
  1663. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1664. retval = -ENODEV;
  1665. goto err_out;
  1666. }
  1667. version_string = chip_ids[i].name;
  1668. revision = SMC_GET_REV();
  1669. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1670. /* At this point I'll assume that the chip is an SMC911x. */
  1671. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1672. /* Validate the TX FIFO size requested */
  1673. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1674. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1675. retval = -EINVAL;
  1676. goto err_out;
  1677. }
  1678. /* fill in some of the fields */
  1679. dev->base_addr = ioaddr;
  1680. lp->version = chip_ids[i].id;
  1681. lp->revision = revision;
  1682. lp->tx_fifo_kb = tx_fifo_kb;
  1683. /* Reverse calculate the RX FIFO size from the TX */
  1684. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1685. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1686. /* Set the automatic flow control values */
  1687. switch(lp->tx_fifo_kb) {
  1688. /*
  1689. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1690. * AFC_LO is AFC_HI/2
  1691. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1692. */
  1693. case 2:/* 13440 Rx Data Fifo Size */
  1694. lp->afc_cfg=0x008C46AF;break;
  1695. case 3:/* 12480 Rx Data Fifo Size */
  1696. lp->afc_cfg=0x0082419F;break;
  1697. case 4:/* 11520 Rx Data Fifo Size */
  1698. lp->afc_cfg=0x00783C9F;break;
  1699. case 5:/* 10560 Rx Data Fifo Size */
  1700. lp->afc_cfg=0x006E374F;break;
  1701. case 6:/* 9600 Rx Data Fifo Size */
  1702. lp->afc_cfg=0x0064328F;break;
  1703. case 7:/* 8640 Rx Data Fifo Size */
  1704. lp->afc_cfg=0x005A2D7F;break;
  1705. case 8:/* 7680 Rx Data Fifo Size */
  1706. lp->afc_cfg=0x0050287F;break;
  1707. case 9:/* 6720 Rx Data Fifo Size */
  1708. lp->afc_cfg=0x0046236F;break;
  1709. case 10:/* 5760 Rx Data Fifo Size */
  1710. lp->afc_cfg=0x003C1E6F;break;
  1711. case 11:/* 4800 Rx Data Fifo Size */
  1712. lp->afc_cfg=0x0032195F;break;
  1713. /*
  1714. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1715. * AFC_LO is AFC_HI/2
  1716. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1717. */
  1718. case 12:/* 3840 Rx Data Fifo Size */
  1719. lp->afc_cfg=0x0024124F;break;
  1720. case 13:/* 2880 Rx Data Fifo Size */
  1721. lp->afc_cfg=0x0015073F;break;
  1722. case 14:/* 1920 Rx Data Fifo Size */
  1723. lp->afc_cfg=0x0006032F;break;
  1724. default:
  1725. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1726. dev->name);
  1727. break;
  1728. }
  1729. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1730. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1731. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1732. spin_lock_init(&lp->lock);
  1733. /* Get the MAC address */
  1734. SMC_GET_MAC_ADDR(dev->dev_addr);
  1735. /* now, reset the chip, and put it into a known state */
  1736. smc911x_reset(dev);
  1737. /*
  1738. * If dev->irq is 0, then the device has to be banged on to see
  1739. * what the IRQ is.
  1740. *
  1741. * Specifying an IRQ is done with the assumption that the user knows
  1742. * what (s)he is doing. No checking is done!!!!
  1743. */
  1744. if (dev->irq < 1) {
  1745. int trials;
  1746. trials = 3;
  1747. while (trials--) {
  1748. dev->irq = smc911x_findirq(ioaddr);
  1749. if (dev->irq)
  1750. break;
  1751. /* kick the card and try again */
  1752. smc911x_reset(dev);
  1753. }
  1754. }
  1755. if (dev->irq == 0) {
  1756. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1757. dev->name);
  1758. retval = -ENODEV;
  1759. goto err_out;
  1760. }
  1761. dev->irq = irq_canonicalize(dev->irq);
  1762. /* Fill in the fields of the device structure with ethernet values. */
  1763. ether_setup(dev);
  1764. dev->open = smc911x_open;
  1765. dev->stop = smc911x_close;
  1766. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1767. dev->tx_timeout = smc911x_timeout;
  1768. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1769. dev->set_multicast_list = smc911x_set_multicast_list;
  1770. dev->ethtool_ops = &smc911x_ethtool_ops;
  1771. #ifdef CONFIG_NET_POLL_CONTROLLER
  1772. dev->poll_controller = smc911x_poll_controller;
  1773. #endif
  1774. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1775. lp->mii.phy_id_mask = 0x1f;
  1776. lp->mii.reg_num_mask = 0x1f;
  1777. lp->mii.force_media = 0;
  1778. lp->mii.full_duplex = 0;
  1779. lp->mii.dev = dev;
  1780. lp->mii.mdio_read = smc911x_phy_read;
  1781. lp->mii.mdio_write = smc911x_phy_write;
  1782. /*
  1783. * Locate the phy, if any.
  1784. */
  1785. smc911x_phy_detect(dev);
  1786. /* Set default parameters */
  1787. lp->msg_enable = NETIF_MSG_LINK;
  1788. lp->ctl_rfduplx = 1;
  1789. lp->ctl_rspeed = 100;
  1790. /* Grab the IRQ */
  1791. retval = request_irq(dev->irq, &smc911x_interrupt,
  1792. IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev);
  1793. if (retval)
  1794. goto err_out;
  1795. #ifdef SMC_USE_DMA
  1796. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1797. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1798. lp->rxdma_active = 0;
  1799. lp->txdma_active = 0;
  1800. dev->dma = lp->rxdma;
  1801. #endif
  1802. retval = register_netdev(dev);
  1803. if (retval == 0) {
  1804. /* now, print out the card info, in a short format.. */
  1805. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1806. dev->name, version_string, lp->revision,
  1807. dev->base_addr, dev->irq);
  1808. #ifdef SMC_USE_DMA
  1809. if (lp->rxdma != -1)
  1810. printk(" RXDMA %d ", lp->rxdma);
  1811. if (lp->txdma != -1)
  1812. printk("TXDMA %d", lp->txdma);
  1813. #endif
  1814. printk("\n");
  1815. if (!is_valid_ether_addr(dev->dev_addr)) {
  1816. printk("%s: Invalid ethernet MAC address. Please "
  1817. "set using ifconfig\n", dev->name);
  1818. } else {
  1819. /* Print the Ethernet address */
  1820. printk("%s: Ethernet addr: ", dev->name);
  1821. for (i = 0; i < 5; i++)
  1822. printk("%2.2x:", dev->dev_addr[i]);
  1823. printk("%2.2x\n", dev->dev_addr[5]);
  1824. }
  1825. if (lp->phy_type == 0) {
  1826. PRINTK("%s: No PHY found\n", dev->name);
  1827. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1828. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1829. } else {
  1830. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1831. }
  1832. }
  1833. err_out:
  1834. #ifdef SMC_USE_DMA
  1835. if (retval) {
  1836. if (lp->rxdma != -1) {
  1837. SMC_DMA_FREE(dev, lp->rxdma);
  1838. }
  1839. if (lp->txdma != -1) {
  1840. SMC_DMA_FREE(dev, lp->txdma);
  1841. }
  1842. }
  1843. #endif
  1844. return retval;
  1845. }
  1846. /*
  1847. * smc911x_init(void)
  1848. *
  1849. * Output:
  1850. * 0 --> there is a device
  1851. * anything else, error
  1852. */
  1853. static int smc911x_drv_probe(struct platform_device *pdev)
  1854. {
  1855. struct net_device *ndev;
  1856. struct resource *res;
  1857. struct smc911x_local *lp;
  1858. unsigned int *addr;
  1859. int ret;
  1860. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1861. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1862. if (!res) {
  1863. ret = -ENODEV;
  1864. goto out;
  1865. }
  1866. /*
  1867. * Request the regions.
  1868. */
  1869. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1870. ret = -EBUSY;
  1871. goto out;
  1872. }
  1873. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1874. if (!ndev) {
  1875. printk("%s: could not allocate device.\n", CARDNAME);
  1876. ret = -ENOMEM;
  1877. goto release_1;
  1878. }
  1879. SET_NETDEV_DEV(ndev, &pdev->dev);
  1880. ndev->dma = (unsigned char)-1;
  1881. ndev->irq = platform_get_irq(pdev, 0);
  1882. lp = netdev_priv(ndev);
  1883. lp->netdev = ndev;
  1884. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1885. if (!addr) {
  1886. ret = -ENOMEM;
  1887. goto release_both;
  1888. }
  1889. platform_set_drvdata(pdev, ndev);
  1890. ret = smc911x_probe(ndev, (unsigned long)addr);
  1891. if (ret != 0) {
  1892. platform_set_drvdata(pdev, NULL);
  1893. iounmap(addr);
  1894. release_both:
  1895. free_netdev(ndev);
  1896. release_1:
  1897. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1898. out:
  1899. printk("%s: not found (%d).\n", CARDNAME, ret);
  1900. }
  1901. #ifdef SMC_USE_DMA
  1902. else {
  1903. lp->physaddr = res->start;
  1904. lp->dev = &pdev->dev;
  1905. }
  1906. #endif
  1907. return ret;
  1908. }
  1909. static int smc911x_drv_remove(struct platform_device *pdev)
  1910. {
  1911. struct net_device *ndev = platform_get_drvdata(pdev);
  1912. struct resource *res;
  1913. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1914. platform_set_drvdata(pdev, NULL);
  1915. unregister_netdev(ndev);
  1916. free_irq(ndev->irq, ndev);
  1917. #ifdef SMC_USE_DMA
  1918. {
  1919. struct smc911x_local *lp = netdev_priv(ndev);
  1920. if (lp->rxdma != -1) {
  1921. SMC_DMA_FREE(dev, lp->rxdma);
  1922. }
  1923. if (lp->txdma != -1) {
  1924. SMC_DMA_FREE(dev, lp->txdma);
  1925. }
  1926. }
  1927. #endif
  1928. iounmap((void *)ndev->base_addr);
  1929. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1930. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1931. free_netdev(ndev);
  1932. return 0;
  1933. }
  1934. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1935. {
  1936. struct net_device *ndev = platform_get_drvdata(dev);
  1937. unsigned long ioaddr = ndev->base_addr;
  1938. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1939. if (ndev) {
  1940. if (netif_running(ndev)) {
  1941. netif_device_detach(ndev);
  1942. smc911x_shutdown(ndev);
  1943. #if POWER_DOWN
  1944. /* Set D2 - Energy detect only setting */
  1945. SMC_SET_PMT_CTRL(2<<12);
  1946. #endif
  1947. }
  1948. }
  1949. return 0;
  1950. }
  1951. static int smc911x_drv_resume(struct platform_device *dev)
  1952. {
  1953. struct net_device *ndev = platform_get_drvdata(dev);
  1954. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1955. if (ndev) {
  1956. struct smc911x_local *lp = netdev_priv(ndev);
  1957. if (netif_running(ndev)) {
  1958. smc911x_reset(ndev);
  1959. smc911x_enable(ndev);
  1960. if (lp->phy_type != 0)
  1961. smc911x_phy_configure(&lp->phy_configure);
  1962. netif_device_attach(ndev);
  1963. }
  1964. }
  1965. return 0;
  1966. }
  1967. static struct platform_driver smc911x_driver = {
  1968. .probe = smc911x_drv_probe,
  1969. .remove = smc911x_drv_remove,
  1970. .suspend = smc911x_drv_suspend,
  1971. .resume = smc911x_drv_resume,
  1972. .driver = {
  1973. .name = CARDNAME,
  1974. .owner = THIS_MODULE,
  1975. },
  1976. };
  1977. static int __init smc911x_init(void)
  1978. {
  1979. return platform_driver_register(&smc911x_driver);
  1980. }
  1981. static void __exit smc911x_cleanup(void)
  1982. {
  1983. platform_driver_unregister(&smc911x_driver);
  1984. }
  1985. module_init(smc911x_init);
  1986. module_exit(smc911x_cleanup);