mac-scc.c 13 KB

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  1. /*
  2. * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/errno.h>
  20. #include <linux/ioport.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/bitops.h>
  32. #include <linux/fs.h>
  33. #include <linux/platform_device.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #ifdef CONFIG_8xx
  37. #include <asm/8xx_immap.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/mpc8xx.h>
  40. #include <asm/cpm1.h>
  41. #endif
  42. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  43. #include <asm/of_platform.h>
  44. #endif
  45. #include "fs_enet.h"
  46. /*************************************************/
  47. #if defined(CONFIG_CPM1)
  48. /* for a 8xx __raw_xxx's are sufficient */
  49. #define __fs_out32(addr, x) __raw_writel(x, addr)
  50. #define __fs_out16(addr, x) __raw_writew(x, addr)
  51. #define __fs_out8(addr, x) __raw_writeb(x, addr)
  52. #define __fs_in32(addr) __raw_readl(addr)
  53. #define __fs_in16(addr) __raw_readw(addr)
  54. #define __fs_in8(addr) __raw_readb(addr)
  55. #else
  56. /* for others play it safe */
  57. #define __fs_out32(addr, x) out_be32(addr, x)
  58. #define __fs_out16(addr, x) out_be16(addr, x)
  59. #define __fs_in32(addr) in_be32(addr)
  60. #define __fs_in16(addr) in_be16(addr)
  61. #endif
  62. /* write, read, set bits, clear bits */
  63. #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
  64. #define R32(_p, _m) __fs_in32(&(_p)->_m)
  65. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  66. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  67. #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
  68. #define R16(_p, _m) __fs_in16(&(_p)->_m)
  69. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  70. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  71. #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
  72. #define R8(_p, _m) __fs_in8(&(_p)->_m)
  73. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  74. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  75. #define SCC_MAX_MULTICAST_ADDRS 64
  76. /*
  77. * Delay to wait for SCC reset command to complete (in us)
  78. */
  79. #define SCC_RESET_DELAY 50
  80. static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
  81. {
  82. const struct fs_platform_info *fpi = fep->fpi;
  83. return cpm_command(fpi->cp_command, op);
  84. }
  85. static int do_pd_setup(struct fs_enet_private *fep)
  86. {
  87. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  88. struct of_device *ofdev = to_of_device(fep->dev);
  89. fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
  90. if (fep->interrupt == NO_IRQ)
  91. return -EINVAL;
  92. fep->scc.sccp = of_iomap(ofdev->node, 0);
  93. if (!fep->scc.sccp)
  94. return -EINVAL;
  95. fep->scc.ep = of_iomap(ofdev->node, 1);
  96. if (!fep->scc.ep) {
  97. iounmap(fep->scc.sccp);
  98. return -EINVAL;
  99. }
  100. #else
  101. struct platform_device *pdev = to_platform_device(fep->dev);
  102. struct resource *r;
  103. /* Fill out IRQ field */
  104. fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
  105. if (fep->interrupt < 0)
  106. return -EINVAL;
  107. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  108. fep->scc.sccp = ioremap(r->start, r->end - r->start + 1);
  109. if (fep->scc.sccp == NULL)
  110. return -EINVAL;
  111. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
  112. fep->scc.ep = ioremap(r->start, r->end - r->start + 1);
  113. if (fep->scc.ep == NULL)
  114. return -EINVAL;
  115. #endif
  116. return 0;
  117. }
  118. #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
  119. #define SCC_RX_EVENT (SCCE_ENET_RXF)
  120. #define SCC_TX_EVENT (SCCE_ENET_TXB)
  121. #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
  122. static int setup_data(struct net_device *dev)
  123. {
  124. struct fs_enet_private *fep = netdev_priv(dev);
  125. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  126. struct fs_platform_info *fpi = fep->fpi;
  127. fep->scc.idx = fs_get_scc_index(fpi->fs_no);
  128. if ((unsigned int)fep->fcc.idx >= 4) /* max 4 SCCs */
  129. return -EINVAL;
  130. fpi->cp_command = fep->fcc.idx << 6;
  131. #endif
  132. do_pd_setup(fep);
  133. fep->scc.hthi = 0;
  134. fep->scc.htlo = 0;
  135. fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
  136. fep->ev_rx = SCC_RX_EVENT;
  137. fep->ev_tx = SCC_TX_EVENT | SCCE_ENET_TXE;
  138. fep->ev_err = SCC_ERR_EVENT_MSK;
  139. return 0;
  140. }
  141. static int allocate_bd(struct net_device *dev)
  142. {
  143. struct fs_enet_private *fep = netdev_priv(dev);
  144. const struct fs_platform_info *fpi = fep->fpi;
  145. fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
  146. sizeof(cbd_t), 8);
  147. if (IS_ERR_VALUE(fep->ring_mem_addr))
  148. return -ENOMEM;
  149. fep->ring_base = (void __iomem __force*)
  150. cpm_dpram_addr(fep->ring_mem_addr);
  151. return 0;
  152. }
  153. static void free_bd(struct net_device *dev)
  154. {
  155. struct fs_enet_private *fep = netdev_priv(dev);
  156. if (fep->ring_base)
  157. cpm_dpfree(fep->ring_mem_addr);
  158. }
  159. static void cleanup_data(struct net_device *dev)
  160. {
  161. /* nothing */
  162. }
  163. static void set_promiscuous_mode(struct net_device *dev)
  164. {
  165. struct fs_enet_private *fep = netdev_priv(dev);
  166. scc_t __iomem *sccp = fep->scc.sccp;
  167. S16(sccp, scc_psmr, SCC_PSMR_PRO);
  168. }
  169. static void set_multicast_start(struct net_device *dev)
  170. {
  171. struct fs_enet_private *fep = netdev_priv(dev);
  172. scc_enet_t __iomem *ep = fep->scc.ep;
  173. W16(ep, sen_gaddr1, 0);
  174. W16(ep, sen_gaddr2, 0);
  175. W16(ep, sen_gaddr3, 0);
  176. W16(ep, sen_gaddr4, 0);
  177. }
  178. static void set_multicast_one(struct net_device *dev, const u8 * mac)
  179. {
  180. struct fs_enet_private *fep = netdev_priv(dev);
  181. scc_enet_t __iomem *ep = fep->scc.ep;
  182. u16 taddrh, taddrm, taddrl;
  183. taddrh = ((u16) mac[5] << 8) | mac[4];
  184. taddrm = ((u16) mac[3] << 8) | mac[2];
  185. taddrl = ((u16) mac[1] << 8) | mac[0];
  186. W16(ep, sen_taddrh, taddrh);
  187. W16(ep, sen_taddrm, taddrm);
  188. W16(ep, sen_taddrl, taddrl);
  189. scc_cr_cmd(fep, CPM_CR_SET_GADDR);
  190. }
  191. static void set_multicast_finish(struct net_device *dev)
  192. {
  193. struct fs_enet_private *fep = netdev_priv(dev);
  194. scc_t __iomem *sccp = fep->scc.sccp;
  195. scc_enet_t __iomem *ep = fep->scc.ep;
  196. /* clear promiscuous always */
  197. C16(sccp, scc_psmr, SCC_PSMR_PRO);
  198. /* if all multi or too many multicasts; just enable all */
  199. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  200. dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
  201. W16(ep, sen_gaddr1, 0xffff);
  202. W16(ep, sen_gaddr2, 0xffff);
  203. W16(ep, sen_gaddr3, 0xffff);
  204. W16(ep, sen_gaddr4, 0xffff);
  205. }
  206. }
  207. static void set_multicast_list(struct net_device *dev)
  208. {
  209. struct dev_mc_list *pmc;
  210. if ((dev->flags & IFF_PROMISC) == 0) {
  211. set_multicast_start(dev);
  212. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  213. set_multicast_one(dev, pmc->dmi_addr);
  214. set_multicast_finish(dev);
  215. } else
  216. set_promiscuous_mode(dev);
  217. }
  218. /*
  219. * This function is called to start or restart the FEC during a link
  220. * change. This only happens when switching between half and full
  221. * duplex.
  222. */
  223. static void restart(struct net_device *dev)
  224. {
  225. struct fs_enet_private *fep = netdev_priv(dev);
  226. scc_t __iomem *sccp = fep->scc.sccp;
  227. scc_enet_t __iomem *ep = fep->scc.ep;
  228. const struct fs_platform_info *fpi = fep->fpi;
  229. u16 paddrh, paddrm, paddrl;
  230. const unsigned char *mac;
  231. int i;
  232. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  233. /* clear everything (slow & steady does it) */
  234. for (i = 0; i < sizeof(*ep); i++)
  235. __fs_out8((u8 __iomem *)ep + i, 0);
  236. /* point to bds */
  237. W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
  238. W16(ep, sen_genscc.scc_tbase,
  239. fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
  240. /* Initialize function code registers for big-endian.
  241. */
  242. W8(ep, sen_genscc.scc_rfcr, SCC_EB);
  243. W8(ep, sen_genscc.scc_tfcr, SCC_EB);
  244. /* Set maximum bytes per receive buffer.
  245. * This appears to be an Ethernet frame size, not the buffer
  246. * fragment size. It must be a multiple of four.
  247. */
  248. W16(ep, sen_genscc.scc_mrblr, 0x5f0);
  249. /* Set CRC preset and mask.
  250. */
  251. W32(ep, sen_cpres, 0xffffffff);
  252. W32(ep, sen_cmask, 0xdebb20e3);
  253. W32(ep, sen_crcec, 0); /* CRC Error counter */
  254. W32(ep, sen_alec, 0); /* alignment error counter */
  255. W32(ep, sen_disfc, 0); /* discard frame counter */
  256. W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
  257. W16(ep, sen_retlim, 15); /* Retry limit threshold */
  258. W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
  259. W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  260. W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
  261. W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
  262. /* Clear hash tables.
  263. */
  264. W16(ep, sen_gaddr1, 0);
  265. W16(ep, sen_gaddr2, 0);
  266. W16(ep, sen_gaddr3, 0);
  267. W16(ep, sen_gaddr4, 0);
  268. W16(ep, sen_iaddr1, 0);
  269. W16(ep, sen_iaddr2, 0);
  270. W16(ep, sen_iaddr3, 0);
  271. W16(ep, sen_iaddr4, 0);
  272. /* set address
  273. */
  274. mac = dev->dev_addr;
  275. paddrh = ((u16) mac[5] << 8) | mac[4];
  276. paddrm = ((u16) mac[3] << 8) | mac[2];
  277. paddrl = ((u16) mac[1] << 8) | mac[0];
  278. W16(ep, sen_paddrh, paddrh);
  279. W16(ep, sen_paddrm, paddrm);
  280. W16(ep, sen_paddrl, paddrl);
  281. W16(ep, sen_pper, 0);
  282. W16(ep, sen_taddrl, 0);
  283. W16(ep, sen_taddrm, 0);
  284. W16(ep, sen_taddrh, 0);
  285. fs_init_bds(dev);
  286. scc_cr_cmd(fep, CPM_CR_INIT_TRX);
  287. W16(sccp, scc_scce, 0xffff);
  288. /* Enable interrupts we wish to service.
  289. */
  290. W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
  291. /* Set GSMR_H to enable all normal operating modes.
  292. * Set GSMR_L to enable Ethernet to MC68160.
  293. */
  294. W32(sccp, scc_gsmrh, 0);
  295. W32(sccp, scc_gsmrl,
  296. SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
  297. SCC_GSMRL_MODE_ENET);
  298. /* Set sync/delimiters.
  299. */
  300. W16(sccp, scc_dsr, 0xd555);
  301. /* Set processing mode. Use Ethernet CRC, catch broadcast, and
  302. * start frame search 22 bit times after RENA.
  303. */
  304. W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
  305. /* Set full duplex mode if needed */
  306. if (fep->phydev->duplex)
  307. S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
  308. S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  309. }
  310. static void stop(struct net_device *dev)
  311. {
  312. struct fs_enet_private *fep = netdev_priv(dev);
  313. scc_t __iomem *sccp = fep->scc.sccp;
  314. int i;
  315. for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
  316. udelay(1);
  317. if (i == SCC_RESET_DELAY)
  318. printk(KERN_WARNING DRV_MODULE_NAME
  319. ": %s SCC timeout on graceful transmit stop\n",
  320. dev->name);
  321. W16(sccp, scc_sccm, 0);
  322. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  323. fs_cleanup_bds(dev);
  324. }
  325. static void pre_request_irq(struct net_device *dev, int irq)
  326. {
  327. #ifndef CONFIG_PPC_MERGE
  328. immap_t *immap = fs_enet_immap;
  329. u32 siel;
  330. /* SIU interrupt */
  331. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  332. siel = in_be32(&immap->im_siu_conf.sc_siel);
  333. if ((irq & 1) == 0)
  334. siel |= (0x80000000 >> irq);
  335. else
  336. siel &= ~(0x80000000 >> (irq & ~1));
  337. out_be32(&immap->im_siu_conf.sc_siel, siel);
  338. }
  339. #endif
  340. }
  341. static void post_free_irq(struct net_device *dev, int irq)
  342. {
  343. /* nothing */
  344. }
  345. static void napi_clear_rx_event(struct net_device *dev)
  346. {
  347. struct fs_enet_private *fep = netdev_priv(dev);
  348. scc_t __iomem *sccp = fep->scc.sccp;
  349. W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
  350. }
  351. static void napi_enable_rx(struct net_device *dev)
  352. {
  353. struct fs_enet_private *fep = netdev_priv(dev);
  354. scc_t __iomem *sccp = fep->scc.sccp;
  355. S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  356. }
  357. static void napi_disable_rx(struct net_device *dev)
  358. {
  359. struct fs_enet_private *fep = netdev_priv(dev);
  360. scc_t __iomem *sccp = fep->scc.sccp;
  361. C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  362. }
  363. static void rx_bd_done(struct net_device *dev)
  364. {
  365. /* nothing */
  366. }
  367. static void tx_kickstart(struct net_device *dev)
  368. {
  369. /* nothing */
  370. }
  371. static u32 get_int_events(struct net_device *dev)
  372. {
  373. struct fs_enet_private *fep = netdev_priv(dev);
  374. scc_t __iomem *sccp = fep->scc.sccp;
  375. return (u32) R16(sccp, scc_scce);
  376. }
  377. static void clear_int_events(struct net_device *dev, u32 int_events)
  378. {
  379. struct fs_enet_private *fep = netdev_priv(dev);
  380. scc_t __iomem *sccp = fep->scc.sccp;
  381. W16(sccp, scc_scce, int_events & 0xffff);
  382. }
  383. static void ev_error(struct net_device *dev, u32 int_events)
  384. {
  385. printk(KERN_WARNING DRV_MODULE_NAME
  386. ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
  387. }
  388. static int get_regs(struct net_device *dev, void *p, int *sizep)
  389. {
  390. struct fs_enet_private *fep = netdev_priv(dev);
  391. if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t __iomem *))
  392. return -EINVAL;
  393. memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
  394. p = (char *)p + sizeof(scc_t);
  395. memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t __iomem *));
  396. return 0;
  397. }
  398. static int get_regs_len(struct net_device *dev)
  399. {
  400. return sizeof(scc_t) + sizeof(scc_enet_t __iomem *);
  401. }
  402. static void tx_restart(struct net_device *dev)
  403. {
  404. struct fs_enet_private *fep = netdev_priv(dev);
  405. scc_cr_cmd(fep, CPM_CR_RESTART_TX);
  406. }
  407. /*************************************************************************/
  408. const struct fs_ops fs_scc_ops = {
  409. .setup_data = setup_data,
  410. .cleanup_data = cleanup_data,
  411. .set_multicast_list = set_multicast_list,
  412. .restart = restart,
  413. .stop = stop,
  414. .pre_request_irq = pre_request_irq,
  415. .post_free_irq = post_free_irq,
  416. .napi_clear_rx_event = napi_clear_rx_event,
  417. .napi_enable_rx = napi_enable_rx,
  418. .napi_disable_rx = napi_disable_rx,
  419. .rx_bd_done = rx_bd_done,
  420. .tx_kickstart = tx_kickstart,
  421. .get_int_events = get_int_events,
  422. .clear_int_events = clear_int_events,
  423. .ev_error = ev_error,
  424. .get_regs = get_regs,
  425. .get_regs_len = get_regs_len,
  426. .tx_restart = tx_restart,
  427. .allocate_bd = allocate_bd,
  428. .free_bd = free_bd,
  429. };