mac-fcc.c 16 KB

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  1. /*
  2. * FCC driver for Motorola MPC82xx (PQ2).
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/errno.h>
  20. #include <linux/ioport.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/bitops.h>
  32. #include <linux/fs.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/phy.h>
  35. #include <asm/immap_cpm2.h>
  36. #include <asm/mpc8260.h>
  37. #include <asm/cpm2.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/irq.h>
  40. #include <asm/uaccess.h>
  41. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  42. #include <asm/of_device.h>
  43. #endif
  44. #include "fs_enet.h"
  45. /*************************************************/
  46. /* FCC access macros */
  47. /* write, read, set bits, clear bits */
  48. #define W32(_p, _m, _v) out_be32(&(_p)->_m, (_v))
  49. #define R32(_p, _m) in_be32(&(_p)->_m)
  50. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  51. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  52. #define W16(_p, _m, _v) out_be16(&(_p)->_m, (_v))
  53. #define R16(_p, _m) in_be16(&(_p)->_m)
  54. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  55. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  56. #define W8(_p, _m, _v) out_8(&(_p)->_m, (_v))
  57. #define R8(_p, _m) in_8(&(_p)->_m)
  58. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  59. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  60. /*************************************************/
  61. #define FCC_MAX_MULTICAST_ADDRS 64
  62. #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
  63. #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  64. #define mk_mii_end 0
  65. #define MAX_CR_CMD_LOOPS 10000
  66. static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 op)
  67. {
  68. const struct fs_platform_info *fpi = fep->fpi;
  69. return cpm_command(fpi->cp_command, op);
  70. }
  71. static int do_pd_setup(struct fs_enet_private *fep)
  72. {
  73. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  74. struct of_device *ofdev = to_of_device(fep->dev);
  75. struct fs_platform_info *fpi = fep->fpi;
  76. int ret = -EINVAL;
  77. fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
  78. if (fep->interrupt == NO_IRQ)
  79. goto out;
  80. fep->fcc.fccp = of_iomap(ofdev->node, 0);
  81. if (!fep->fcc.fccp)
  82. goto out;
  83. fep->fcc.ep = of_iomap(ofdev->node, 1);
  84. if (!fep->fcc.ep)
  85. goto out_fccp;
  86. fep->fcc.fcccp = of_iomap(ofdev->node, 2);
  87. if (!fep->fcc.fcccp)
  88. goto out_ep;
  89. fep->fcc.mem = (void __iomem *)cpm2_immr;
  90. fpi->dpram_offset = cpm_dpalloc(128, 8);
  91. if (IS_ERR_VALUE(fpi->dpram_offset)) {
  92. ret = fpi->dpram_offset;
  93. goto out_fcccp;
  94. }
  95. return 0;
  96. out_fcccp:
  97. iounmap(fep->fcc.fcccp);
  98. out_ep:
  99. iounmap(fep->fcc.ep);
  100. out_fccp:
  101. iounmap(fep->fcc.fccp);
  102. out:
  103. return ret;
  104. #else
  105. struct platform_device *pdev = to_platform_device(fep->dev);
  106. struct resource *r;
  107. /* Fill out IRQ field */
  108. fep->interrupt = platform_get_irq(pdev, 0);
  109. if (fep->interrupt < 0)
  110. return -EINVAL;
  111. /* Attach the memory for the FCC Parameter RAM */
  112. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_pram");
  113. fep->fcc.ep = ioremap(r->start, r->end - r->start + 1);
  114. if (fep->fcc.ep == NULL)
  115. return -EINVAL;
  116. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_regs");
  117. fep->fcc.fccp = ioremap(r->start, r->end - r->start + 1);
  118. if (fep->fcc.fccp == NULL)
  119. return -EINVAL;
  120. if (fep->fpi->fcc_regs_c) {
  121. fep->fcc.fcccp = (void __iomem *)fep->fpi->fcc_regs_c;
  122. } else {
  123. r = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  124. "fcc_regs_c");
  125. fep->fcc.fcccp = ioremap(r->start,
  126. r->end - r->start + 1);
  127. }
  128. if (fep->fcc.fcccp == NULL)
  129. return -EINVAL;
  130. fep->fcc.mem = (void __iomem *)fep->fpi->mem_offset;
  131. if (fep->fcc.mem == NULL)
  132. return -EINVAL;
  133. return 0;
  134. #endif
  135. }
  136. #define FCC_NAPI_RX_EVENT_MSK (FCC_ENET_RXF | FCC_ENET_RXB)
  137. #define FCC_RX_EVENT (FCC_ENET_RXF)
  138. #define FCC_TX_EVENT (FCC_ENET_TXB)
  139. #define FCC_ERR_EVENT_MSK (FCC_ENET_TXE | FCC_ENET_BSY)
  140. static int setup_data(struct net_device *dev)
  141. {
  142. struct fs_enet_private *fep = netdev_priv(dev);
  143. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  144. struct fs_platform_info *fpi = fep->fpi;
  145. fpi->cp_command = (fpi->cp_page << 26) |
  146. (fpi->cp_block << 21) |
  147. (12 << 6);
  148. fep->fcc.idx = fs_get_fcc_index(fpi->fs_no);
  149. if ((unsigned int)fep->fcc.idx >= 3) /* max 3 FCCs */
  150. return -EINVAL;
  151. #endif
  152. if (do_pd_setup(fep) != 0)
  153. return -EINVAL;
  154. fep->ev_napi_rx = FCC_NAPI_RX_EVENT_MSK;
  155. fep->ev_rx = FCC_RX_EVENT;
  156. fep->ev_tx = FCC_TX_EVENT;
  157. fep->ev_err = FCC_ERR_EVENT_MSK;
  158. return 0;
  159. }
  160. static int allocate_bd(struct net_device *dev)
  161. {
  162. struct fs_enet_private *fep = netdev_priv(dev);
  163. const struct fs_platform_info *fpi = fep->fpi;
  164. fep->ring_base = (void __iomem __force *)dma_alloc_coherent(fep->dev,
  165. (fpi->tx_ring + fpi->rx_ring) *
  166. sizeof(cbd_t), &fep->ring_mem_addr,
  167. GFP_KERNEL);
  168. if (fep->ring_base == NULL)
  169. return -ENOMEM;
  170. return 0;
  171. }
  172. static void free_bd(struct net_device *dev)
  173. {
  174. struct fs_enet_private *fep = netdev_priv(dev);
  175. const struct fs_platform_info *fpi = fep->fpi;
  176. if (fep->ring_base)
  177. dma_free_coherent(fep->dev,
  178. (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
  179. (void __force *)fep->ring_base, fep->ring_mem_addr);
  180. }
  181. static void cleanup_data(struct net_device *dev)
  182. {
  183. /* nothing */
  184. }
  185. static void set_promiscuous_mode(struct net_device *dev)
  186. {
  187. struct fs_enet_private *fep = netdev_priv(dev);
  188. fcc_t __iomem *fccp = fep->fcc.fccp;
  189. S32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
  190. }
  191. static void set_multicast_start(struct net_device *dev)
  192. {
  193. struct fs_enet_private *fep = netdev_priv(dev);
  194. fcc_enet_t __iomem *ep = fep->fcc.ep;
  195. W32(ep, fen_gaddrh, 0);
  196. W32(ep, fen_gaddrl, 0);
  197. }
  198. static void set_multicast_one(struct net_device *dev, const u8 *mac)
  199. {
  200. struct fs_enet_private *fep = netdev_priv(dev);
  201. fcc_enet_t __iomem *ep = fep->fcc.ep;
  202. u16 taddrh, taddrm, taddrl;
  203. taddrh = ((u16)mac[5] << 8) | mac[4];
  204. taddrm = ((u16)mac[3] << 8) | mac[2];
  205. taddrl = ((u16)mac[1] << 8) | mac[0];
  206. W16(ep, fen_taddrh, taddrh);
  207. W16(ep, fen_taddrm, taddrm);
  208. W16(ep, fen_taddrl, taddrl);
  209. fcc_cr_cmd(fep, CPM_CR_SET_GADDR);
  210. }
  211. static void set_multicast_finish(struct net_device *dev)
  212. {
  213. struct fs_enet_private *fep = netdev_priv(dev);
  214. fcc_t __iomem *fccp = fep->fcc.fccp;
  215. fcc_enet_t __iomem *ep = fep->fcc.ep;
  216. /* clear promiscuous always */
  217. C32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
  218. /* if all multi or too many multicasts; just enable all */
  219. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  220. dev->mc_count > FCC_MAX_MULTICAST_ADDRS) {
  221. W32(ep, fen_gaddrh, 0xffffffff);
  222. W32(ep, fen_gaddrl, 0xffffffff);
  223. }
  224. /* read back */
  225. fep->fcc.gaddrh = R32(ep, fen_gaddrh);
  226. fep->fcc.gaddrl = R32(ep, fen_gaddrl);
  227. }
  228. static void set_multicast_list(struct net_device *dev)
  229. {
  230. struct dev_mc_list *pmc;
  231. if ((dev->flags & IFF_PROMISC) == 0) {
  232. set_multicast_start(dev);
  233. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  234. set_multicast_one(dev, pmc->dmi_addr);
  235. set_multicast_finish(dev);
  236. } else
  237. set_promiscuous_mode(dev);
  238. }
  239. static void restart(struct net_device *dev)
  240. {
  241. struct fs_enet_private *fep = netdev_priv(dev);
  242. const struct fs_platform_info *fpi = fep->fpi;
  243. fcc_t __iomem *fccp = fep->fcc.fccp;
  244. fcc_c_t __iomem *fcccp = fep->fcc.fcccp;
  245. fcc_enet_t __iomem *ep = fep->fcc.ep;
  246. dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
  247. u16 paddrh, paddrm, paddrl;
  248. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  249. u16 mem_addr;
  250. #endif
  251. const unsigned char *mac;
  252. int i;
  253. C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  254. /* clear everything (slow & steady does it) */
  255. for (i = 0; i < sizeof(*ep); i++)
  256. out_8((u8 __iomem *)ep + i, 0);
  257. /* get physical address */
  258. rx_bd_base_phys = fep->ring_mem_addr;
  259. tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
  260. /* point to bds */
  261. W32(ep, fen_genfcc.fcc_rbase, rx_bd_base_phys);
  262. W32(ep, fen_genfcc.fcc_tbase, tx_bd_base_phys);
  263. /* Set maximum bytes per receive buffer.
  264. * It must be a multiple of 32.
  265. */
  266. W16(ep, fen_genfcc.fcc_mrblr, PKT_MAXBLR_SIZE);
  267. W32(ep, fen_genfcc.fcc_rstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
  268. W32(ep, fen_genfcc.fcc_tstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
  269. /* Allocate space in the reserved FCC area of DPRAM for the
  270. * internal buffers. No one uses this space (yet), so we
  271. * can do this. Later, we will add resource management for
  272. * this area.
  273. */
  274. #ifdef CONFIG_PPC_CPM_NEW_BINDING
  275. W16(ep, fen_genfcc.fcc_riptr, fpi->dpram_offset);
  276. W16(ep, fen_genfcc.fcc_tiptr, fpi->dpram_offset + 32);
  277. W16(ep, fen_padptr, fpi->dpram_offset + 64);
  278. #else
  279. mem_addr = (u32) fep->fcc.mem; /* de-fixup dpram offset */
  280. W16(ep, fen_genfcc.fcc_riptr, (mem_addr & 0xffff));
  281. W16(ep, fen_genfcc.fcc_tiptr, ((mem_addr + 32) & 0xffff));
  282. W16(ep, fen_padptr, mem_addr + 64);
  283. #endif
  284. /* fill with special symbol... */
  285. memset_io(fep->fcc.mem + fpi->dpram_offset + 64, 0x88, 32);
  286. W32(ep, fen_genfcc.fcc_rbptr, 0);
  287. W32(ep, fen_genfcc.fcc_tbptr, 0);
  288. W32(ep, fen_genfcc.fcc_rcrc, 0);
  289. W32(ep, fen_genfcc.fcc_tcrc, 0);
  290. W16(ep, fen_genfcc.fcc_res1, 0);
  291. W32(ep, fen_genfcc.fcc_res2, 0);
  292. /* no CAM */
  293. W32(ep, fen_camptr, 0);
  294. /* Set CRC preset and mask */
  295. W32(ep, fen_cmask, 0xdebb20e3);
  296. W32(ep, fen_cpres, 0xffffffff);
  297. W32(ep, fen_crcec, 0); /* CRC Error counter */
  298. W32(ep, fen_alec, 0); /* alignment error counter */
  299. W32(ep, fen_disfc, 0); /* discard frame counter */
  300. W16(ep, fen_retlim, 15); /* Retry limit threshold */
  301. W16(ep, fen_pper, 0); /* Normal persistence */
  302. /* set group address */
  303. W32(ep, fen_gaddrh, fep->fcc.gaddrh);
  304. W32(ep, fen_gaddrl, fep->fcc.gaddrh);
  305. /* Clear hash filter tables */
  306. W32(ep, fen_iaddrh, 0);
  307. W32(ep, fen_iaddrl, 0);
  308. /* Clear the Out-of-sequence TxBD */
  309. W16(ep, fen_tfcstat, 0);
  310. W16(ep, fen_tfclen, 0);
  311. W32(ep, fen_tfcptr, 0);
  312. W16(ep, fen_mflr, PKT_MAXBUF_SIZE); /* maximum frame length register */
  313. W16(ep, fen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  314. /* set address */
  315. mac = dev->dev_addr;
  316. paddrh = ((u16)mac[5] << 8) | mac[4];
  317. paddrm = ((u16)mac[3] << 8) | mac[2];
  318. paddrl = ((u16)mac[1] << 8) | mac[0];
  319. W16(ep, fen_paddrh, paddrh);
  320. W16(ep, fen_paddrm, paddrm);
  321. W16(ep, fen_paddrl, paddrl);
  322. W16(ep, fen_taddrh, 0);
  323. W16(ep, fen_taddrm, 0);
  324. W16(ep, fen_taddrl, 0);
  325. W16(ep, fen_maxd1, 1520); /* maximum DMA1 length */
  326. W16(ep, fen_maxd2, 1520); /* maximum DMA2 length */
  327. /* Clear stat counters, in case we ever enable RMON */
  328. W32(ep, fen_octc, 0);
  329. W32(ep, fen_colc, 0);
  330. W32(ep, fen_broc, 0);
  331. W32(ep, fen_mulc, 0);
  332. W32(ep, fen_uspc, 0);
  333. W32(ep, fen_frgc, 0);
  334. W32(ep, fen_ospc, 0);
  335. W32(ep, fen_jbrc, 0);
  336. W32(ep, fen_p64c, 0);
  337. W32(ep, fen_p65c, 0);
  338. W32(ep, fen_p128c, 0);
  339. W32(ep, fen_p256c, 0);
  340. W32(ep, fen_p512c, 0);
  341. W32(ep, fen_p1024c, 0);
  342. W16(ep, fen_rfthr, 0); /* Suggested by manual */
  343. W16(ep, fen_rfcnt, 0);
  344. W16(ep, fen_cftype, 0);
  345. fs_init_bds(dev);
  346. /* adjust to speed (for RMII mode) */
  347. if (fpi->use_rmii) {
  348. if (fep->phydev->speed == 100)
  349. C8(fcccp, fcc_gfemr, 0x20);
  350. else
  351. S8(fcccp, fcc_gfemr, 0x20);
  352. }
  353. fcc_cr_cmd(fep, CPM_CR_INIT_TRX);
  354. /* clear events */
  355. W16(fccp, fcc_fcce, 0xffff);
  356. /* Enable interrupts we wish to service */
  357. W16(fccp, fcc_fccm, FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
  358. /* Set GFMR to enable Ethernet operating mode */
  359. W32(fccp, fcc_gfmr, FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
  360. /* set sync/delimiters */
  361. W16(fccp, fcc_fdsr, 0xd555);
  362. W32(fccp, fcc_fpsmr, FCC_PSMR_ENCRC);
  363. if (fpi->use_rmii)
  364. S32(fccp, fcc_fpsmr, FCC_PSMR_RMII);
  365. /* adjust to duplex mode */
  366. if (fep->phydev->duplex)
  367. S32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
  368. else
  369. C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
  370. S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  371. }
  372. static void stop(struct net_device *dev)
  373. {
  374. struct fs_enet_private *fep = netdev_priv(dev);
  375. fcc_t __iomem *fccp = fep->fcc.fccp;
  376. /* stop ethernet */
  377. C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
  378. /* clear events */
  379. W16(fccp, fcc_fcce, 0xffff);
  380. /* clear interrupt mask */
  381. W16(fccp, fcc_fccm, 0);
  382. fs_cleanup_bds(dev);
  383. }
  384. static void pre_request_irq(struct net_device *dev, int irq)
  385. {
  386. /* nothing */
  387. }
  388. static void post_free_irq(struct net_device *dev, int irq)
  389. {
  390. /* nothing */
  391. }
  392. static void napi_clear_rx_event(struct net_device *dev)
  393. {
  394. struct fs_enet_private *fep = netdev_priv(dev);
  395. fcc_t __iomem *fccp = fep->fcc.fccp;
  396. W16(fccp, fcc_fcce, FCC_NAPI_RX_EVENT_MSK);
  397. }
  398. static void napi_enable_rx(struct net_device *dev)
  399. {
  400. struct fs_enet_private *fep = netdev_priv(dev);
  401. fcc_t __iomem *fccp = fep->fcc.fccp;
  402. S16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
  403. }
  404. static void napi_disable_rx(struct net_device *dev)
  405. {
  406. struct fs_enet_private *fep = netdev_priv(dev);
  407. fcc_t __iomem *fccp = fep->fcc.fccp;
  408. C16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
  409. }
  410. static void rx_bd_done(struct net_device *dev)
  411. {
  412. /* nothing */
  413. }
  414. static void tx_kickstart(struct net_device *dev)
  415. {
  416. struct fs_enet_private *fep = netdev_priv(dev);
  417. fcc_t __iomem *fccp = fep->fcc.fccp;
  418. S16(fccp, fcc_ftodr, 0x8000);
  419. }
  420. static u32 get_int_events(struct net_device *dev)
  421. {
  422. struct fs_enet_private *fep = netdev_priv(dev);
  423. fcc_t __iomem *fccp = fep->fcc.fccp;
  424. return (u32)R16(fccp, fcc_fcce);
  425. }
  426. static void clear_int_events(struct net_device *dev, u32 int_events)
  427. {
  428. struct fs_enet_private *fep = netdev_priv(dev);
  429. fcc_t __iomem *fccp = fep->fcc.fccp;
  430. W16(fccp, fcc_fcce, int_events & 0xffff);
  431. }
  432. static void ev_error(struct net_device *dev, u32 int_events)
  433. {
  434. printk(KERN_WARNING DRV_MODULE_NAME
  435. ": %s FS_ENET ERROR(s) 0x%x\n", dev->name, int_events);
  436. }
  437. static int get_regs(struct net_device *dev, void *p, int *sizep)
  438. {
  439. struct fs_enet_private *fep = netdev_priv(dev);
  440. if (*sizep < sizeof(fcc_t) + sizeof(fcc_enet_t) + 1)
  441. return -EINVAL;
  442. memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t));
  443. p = (char *)p + sizeof(fcc_t);
  444. memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t));
  445. p = (char *)p + sizeof(fcc_enet_t);
  446. memcpy_fromio(p, fep->fcc.fcccp, 1);
  447. return 0;
  448. }
  449. static int get_regs_len(struct net_device *dev)
  450. {
  451. return sizeof(fcc_t) + sizeof(fcc_enet_t) + 1;
  452. }
  453. /* Some transmit errors cause the transmitter to shut
  454. * down. We now issue a restart transmit. Since the
  455. * errors close the BD and update the pointers, the restart
  456. * _should_ pick up without having to reset any of our
  457. * pointers either. Also, To workaround 8260 device erratum
  458. * CPM37, we must disable and then re-enable the transmitter
  459. * following a Late Collision, Underrun, or Retry Limit error.
  460. */
  461. static void tx_restart(struct net_device *dev)
  462. {
  463. struct fs_enet_private *fep = netdev_priv(dev);
  464. fcc_t __iomem *fccp = fep->fcc.fccp;
  465. C32(fccp, fcc_gfmr, FCC_GFMR_ENT);
  466. udelay(10);
  467. S32(fccp, fcc_gfmr, FCC_GFMR_ENT);
  468. fcc_cr_cmd(fep, CPM_CR_RESTART_TX);
  469. }
  470. /*************************************************************************/
  471. const struct fs_ops fs_fcc_ops = {
  472. .setup_data = setup_data,
  473. .cleanup_data = cleanup_data,
  474. .set_multicast_list = set_multicast_list,
  475. .restart = restart,
  476. .stop = stop,
  477. .pre_request_irq = pre_request_irq,
  478. .post_free_irq = post_free_irq,
  479. .napi_clear_rx_event = napi_clear_rx_event,
  480. .napi_enable_rx = napi_enable_rx,
  481. .napi_disable_rx = napi_disable_rx,
  482. .rx_bd_done = rx_bd_done,
  483. .tx_kickstart = tx_kickstart,
  484. .get_int_events = get_int_events,
  485. .clear_int_events = clear_int_events,
  486. .ev_error = ev_error,
  487. .get_regs = get_regs,
  488. .get_regs_len = get_regs_len,
  489. .tx_restart = tx_restart,
  490. .allocate_bd = allocate_bd,
  491. .free_bd = free_bd,
  492. };