e1000_main.c 154 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379
  1. /*******************************************************************************
  2. Intel PRO/1000 Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. #include <net/ip6_checksum.h>
  23. char e1000_driver_name[] = "e1000";
  24. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  25. #ifndef CONFIG_E1000_NAPI
  26. #define DRIVERNAPI
  27. #else
  28. #define DRIVERNAPI "-NAPI"
  29. #endif
  30. #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
  31. const char e1000_driver_version[] = DRV_VERSION;
  32. static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  33. /* e1000_pci_tbl - PCI Device ID Table
  34. *
  35. * Last entry must be all 0s
  36. *
  37. * Macro expands to...
  38. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  39. */
  40. #ifdef CONFIG_E1000E_ENABLED
  41. #define PCIE(x)
  42. #else
  43. #define PCIE(x) x,
  44. #endif
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1049))
  72. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104A))
  73. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104B))
  74. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104C))
  75. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104D))
  76. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105E))
  77. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105F))
  78. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060))
  79. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  85. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  86. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  87. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107D))
  88. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107E))
  89. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107F))
  90. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  91. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108B))
  92. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108C))
  93. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1096))
  94. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1098))
  95. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  96. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x109A))
  97. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A4))
  98. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A5))
  99. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  100. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10B9))
  101. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BA))
  102. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BB))
  103. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BC))
  104. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C4))
  105. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C5))
  106. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D5))
  107. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D9))
  108. PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10DA))
  109. /* required last entry */
  110. {0,}
  111. };
  112. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  113. int e1000_up(struct e1000_adapter *adapter);
  114. void e1000_down(struct e1000_adapter *adapter);
  115. void e1000_reinit_locked(struct e1000_adapter *adapter);
  116. void e1000_reset(struct e1000_adapter *adapter);
  117. int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
  118. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  119. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  120. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  121. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  122. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  123. struct e1000_tx_ring *txdr);
  124. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  125. struct e1000_rx_ring *rxdr);
  126. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  127. struct e1000_tx_ring *tx_ring);
  128. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  129. struct e1000_rx_ring *rx_ring);
  130. void e1000_update_stats(struct e1000_adapter *adapter);
  131. static int e1000_init_module(void);
  132. static void e1000_exit_module(void);
  133. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  134. static void __devexit e1000_remove(struct pci_dev *pdev);
  135. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  136. static int e1000_sw_init(struct e1000_adapter *adapter);
  137. static int e1000_open(struct net_device *netdev);
  138. static int e1000_close(struct net_device *netdev);
  139. static void e1000_configure_tx(struct e1000_adapter *adapter);
  140. static void e1000_configure_rx(struct e1000_adapter *adapter);
  141. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  142. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  143. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  144. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  145. struct e1000_tx_ring *tx_ring);
  146. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. static void e1000_set_rx_mode(struct net_device *netdev);
  149. static void e1000_update_phy_info(unsigned long data);
  150. static void e1000_watchdog(unsigned long data);
  151. static void e1000_82547_tx_fifo_stall(unsigned long data);
  152. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  153. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  154. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  155. static int e1000_set_mac(struct net_device *netdev, void *p);
  156. static irqreturn_t e1000_intr(int irq, void *data);
  157. static irqreturn_t e1000_intr_msi(int irq, void *data);
  158. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  159. struct e1000_tx_ring *tx_ring);
  160. #ifdef CONFIG_E1000_NAPI
  161. static int e1000_clean(struct napi_struct *napi, int budget);
  162. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  163. struct e1000_rx_ring *rx_ring,
  164. int *work_done, int work_to_do);
  165. static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rx_ring,
  167. int *work_done, int work_to_do);
  168. #else
  169. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  172. struct e1000_rx_ring *rx_ring);
  173. #endif
  174. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  175. struct e1000_rx_ring *rx_ring,
  176. int cleaned_count);
  177. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  178. struct e1000_rx_ring *rx_ring,
  179. int cleaned_count);
  180. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  181. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  182. int cmd);
  183. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  184. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  185. static void e1000_tx_timeout(struct net_device *dev);
  186. static void e1000_reset_task(struct work_struct *work);
  187. static void e1000_smartspeed(struct e1000_adapter *adapter);
  188. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  189. struct sk_buff *skb);
  190. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  191. static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
  192. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
  193. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  194. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  195. #ifdef CONFIG_PM
  196. static int e1000_resume(struct pci_dev *pdev);
  197. #endif
  198. static void e1000_shutdown(struct pci_dev *pdev);
  199. #ifdef CONFIG_NET_POLL_CONTROLLER
  200. /* for netdump / net console */
  201. static void e1000_netpoll (struct net_device *netdev);
  202. #endif
  203. #define COPYBREAK_DEFAULT 256
  204. static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
  205. module_param(copybreak, uint, 0644);
  206. MODULE_PARM_DESC(copybreak,
  207. "Maximum size of packet that is copied to a new buffer on receive");
  208. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  209. pci_channel_state_t state);
  210. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  211. static void e1000_io_resume(struct pci_dev *pdev);
  212. static struct pci_error_handlers e1000_err_handler = {
  213. .error_detected = e1000_io_error_detected,
  214. .slot_reset = e1000_io_slot_reset,
  215. .resume = e1000_io_resume,
  216. };
  217. static struct pci_driver e1000_driver = {
  218. .name = e1000_driver_name,
  219. .id_table = e1000_pci_tbl,
  220. .probe = e1000_probe,
  221. .remove = __devexit_p(e1000_remove),
  222. #ifdef CONFIG_PM
  223. /* Power Managment Hooks */
  224. .suspend = e1000_suspend,
  225. .resume = e1000_resume,
  226. #endif
  227. .shutdown = e1000_shutdown,
  228. .err_handler = &e1000_err_handler
  229. };
  230. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  231. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  232. MODULE_LICENSE("GPL");
  233. MODULE_VERSION(DRV_VERSION);
  234. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  235. module_param(debug, int, 0);
  236. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  237. /**
  238. * e1000_init_module - Driver Registration Routine
  239. *
  240. * e1000_init_module is the first routine called when the driver is
  241. * loaded. All it does is register with the PCI subsystem.
  242. **/
  243. static int __init
  244. e1000_init_module(void)
  245. {
  246. int ret;
  247. printk(KERN_INFO "%s - version %s\n",
  248. e1000_driver_string, e1000_driver_version);
  249. printk(KERN_INFO "%s\n", e1000_copyright);
  250. ret = pci_register_driver(&e1000_driver);
  251. if (copybreak != COPYBREAK_DEFAULT) {
  252. if (copybreak == 0)
  253. printk(KERN_INFO "e1000: copybreak disabled\n");
  254. else
  255. printk(KERN_INFO "e1000: copybreak enabled for "
  256. "packets <= %u bytes\n", copybreak);
  257. }
  258. return ret;
  259. }
  260. module_init(e1000_init_module);
  261. /**
  262. * e1000_exit_module - Driver Exit Cleanup Routine
  263. *
  264. * e1000_exit_module is called just before the driver is removed
  265. * from memory.
  266. **/
  267. static void __exit
  268. e1000_exit_module(void)
  269. {
  270. pci_unregister_driver(&e1000_driver);
  271. }
  272. module_exit(e1000_exit_module);
  273. static int e1000_request_irq(struct e1000_adapter *adapter)
  274. {
  275. struct net_device *netdev = adapter->netdev;
  276. irq_handler_t handler = e1000_intr;
  277. int irq_flags = IRQF_SHARED;
  278. int err;
  279. if (adapter->hw.mac_type >= e1000_82571) {
  280. adapter->have_msi = !pci_enable_msi(adapter->pdev);
  281. if (adapter->have_msi) {
  282. handler = e1000_intr_msi;
  283. irq_flags = 0;
  284. }
  285. }
  286. err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
  287. netdev);
  288. if (err) {
  289. if (adapter->have_msi)
  290. pci_disable_msi(adapter->pdev);
  291. DPRINTK(PROBE, ERR,
  292. "Unable to allocate interrupt Error: %d\n", err);
  293. }
  294. return err;
  295. }
  296. static void e1000_free_irq(struct e1000_adapter *adapter)
  297. {
  298. struct net_device *netdev = adapter->netdev;
  299. free_irq(adapter->pdev->irq, netdev);
  300. if (adapter->have_msi)
  301. pci_disable_msi(adapter->pdev);
  302. }
  303. /**
  304. * e1000_irq_disable - Mask off interrupt generation on the NIC
  305. * @adapter: board private structure
  306. **/
  307. static void
  308. e1000_irq_disable(struct e1000_adapter *adapter)
  309. {
  310. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  311. E1000_WRITE_FLUSH(&adapter->hw);
  312. synchronize_irq(adapter->pdev->irq);
  313. }
  314. /**
  315. * e1000_irq_enable - Enable default interrupt generation settings
  316. * @adapter: board private structure
  317. **/
  318. static void
  319. e1000_irq_enable(struct e1000_adapter *adapter)
  320. {
  321. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  322. E1000_WRITE_FLUSH(&adapter->hw);
  323. }
  324. static void
  325. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  326. {
  327. struct net_device *netdev = adapter->netdev;
  328. u16 vid = adapter->hw.mng_cookie.vlan_id;
  329. u16 old_vid = adapter->mng_vlan_id;
  330. if (adapter->vlgrp) {
  331. if (!vlan_group_get_device(adapter->vlgrp, vid)) {
  332. if (adapter->hw.mng_cookie.status &
  333. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  334. e1000_vlan_rx_add_vid(netdev, vid);
  335. adapter->mng_vlan_id = vid;
  336. } else
  337. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  338. if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
  339. (vid != old_vid) &&
  340. !vlan_group_get_device(adapter->vlgrp, old_vid))
  341. e1000_vlan_rx_kill_vid(netdev, old_vid);
  342. } else
  343. adapter->mng_vlan_id = vid;
  344. }
  345. }
  346. /**
  347. * e1000_release_hw_control - release control of the h/w to f/w
  348. * @adapter: address of board private structure
  349. *
  350. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  351. * For ASF and Pass Through versions of f/w this means that the
  352. * driver is no longer loaded. For AMT version (only with 82573) i
  353. * of the f/w this means that the network i/f is closed.
  354. *
  355. **/
  356. static void
  357. e1000_release_hw_control(struct e1000_adapter *adapter)
  358. {
  359. u32 ctrl_ext;
  360. u32 swsm;
  361. /* Let firmware taken over control of h/w */
  362. switch (adapter->hw.mac_type) {
  363. case e1000_82573:
  364. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  365. E1000_WRITE_REG(&adapter->hw, SWSM,
  366. swsm & ~E1000_SWSM_DRV_LOAD);
  367. break;
  368. case e1000_82571:
  369. case e1000_82572:
  370. case e1000_80003es2lan:
  371. case e1000_ich8lan:
  372. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  373. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  374. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  375. break;
  376. default:
  377. break;
  378. }
  379. }
  380. /**
  381. * e1000_get_hw_control - get control of the h/w from f/w
  382. * @adapter: address of board private structure
  383. *
  384. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  385. * For ASF and Pass Through versions of f/w this means that
  386. * the driver is loaded. For AMT version (only with 82573)
  387. * of the f/w this means that the network i/f is open.
  388. *
  389. **/
  390. static void
  391. e1000_get_hw_control(struct e1000_adapter *adapter)
  392. {
  393. u32 ctrl_ext;
  394. u32 swsm;
  395. /* Let firmware know the driver has taken over */
  396. switch (adapter->hw.mac_type) {
  397. case e1000_82573:
  398. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  399. E1000_WRITE_REG(&adapter->hw, SWSM,
  400. swsm | E1000_SWSM_DRV_LOAD);
  401. break;
  402. case e1000_82571:
  403. case e1000_82572:
  404. case e1000_80003es2lan:
  405. case e1000_ich8lan:
  406. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  407. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  408. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  409. break;
  410. default:
  411. break;
  412. }
  413. }
  414. static void
  415. e1000_init_manageability(struct e1000_adapter *adapter)
  416. {
  417. if (adapter->en_mng_pt) {
  418. u32 manc = E1000_READ_REG(&adapter->hw, MANC);
  419. /* disable hardware interception of ARP */
  420. manc &= ~(E1000_MANC_ARP_EN);
  421. /* enable receiving management packets to the host */
  422. /* this will probably generate destination unreachable messages
  423. * from the host OS, but the packets will be handled on SMBUS */
  424. if (adapter->hw.has_manc2h) {
  425. u32 manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
  426. manc |= E1000_MANC_EN_MNG2HOST;
  427. #define E1000_MNG2HOST_PORT_623 (1 << 5)
  428. #define E1000_MNG2HOST_PORT_664 (1 << 6)
  429. manc2h |= E1000_MNG2HOST_PORT_623;
  430. manc2h |= E1000_MNG2HOST_PORT_664;
  431. E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
  432. }
  433. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  434. }
  435. }
  436. static void
  437. e1000_release_manageability(struct e1000_adapter *adapter)
  438. {
  439. if (adapter->en_mng_pt) {
  440. u32 manc = E1000_READ_REG(&adapter->hw, MANC);
  441. /* re-enable hardware interception of ARP */
  442. manc |= E1000_MANC_ARP_EN;
  443. if (adapter->hw.has_manc2h)
  444. manc &= ~E1000_MANC_EN_MNG2HOST;
  445. /* don't explicitly have to mess with MANC2H since
  446. * MANC has an enable disable that gates MANC2H */
  447. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  448. }
  449. }
  450. /**
  451. * e1000_configure - configure the hardware for RX and TX
  452. * @adapter = private board structure
  453. **/
  454. static void e1000_configure(struct e1000_adapter *adapter)
  455. {
  456. struct net_device *netdev = adapter->netdev;
  457. int i;
  458. e1000_set_rx_mode(netdev);
  459. e1000_restore_vlan(adapter);
  460. e1000_init_manageability(adapter);
  461. e1000_configure_tx(adapter);
  462. e1000_setup_rctl(adapter);
  463. e1000_configure_rx(adapter);
  464. /* call E1000_DESC_UNUSED which always leaves
  465. * at least 1 descriptor unused to make sure
  466. * next_to_use != next_to_clean */
  467. for (i = 0; i < adapter->num_rx_queues; i++) {
  468. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  469. adapter->alloc_rx_buf(adapter, ring,
  470. E1000_DESC_UNUSED(ring));
  471. }
  472. adapter->tx_queue_len = netdev->tx_queue_len;
  473. }
  474. int e1000_up(struct e1000_adapter *adapter)
  475. {
  476. /* hardware has been reset, we need to reload some things */
  477. e1000_configure(adapter);
  478. clear_bit(__E1000_DOWN, &adapter->flags);
  479. #ifdef CONFIG_E1000_NAPI
  480. napi_enable(&adapter->napi);
  481. #endif
  482. e1000_irq_enable(adapter);
  483. /* fire a link change interrupt to start the watchdog */
  484. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
  485. return 0;
  486. }
  487. /**
  488. * e1000_power_up_phy - restore link in case the phy was powered down
  489. * @adapter: address of board private structure
  490. *
  491. * The phy may be powered down to save power and turn off link when the
  492. * driver is unloaded and wake on lan is not enabled (among others)
  493. * *** this routine MUST be followed by a call to e1000_reset ***
  494. *
  495. **/
  496. void e1000_power_up_phy(struct e1000_adapter *adapter)
  497. {
  498. u16 mii_reg = 0;
  499. /* Just clear the power down bit to wake the phy back up */
  500. if (adapter->hw.media_type == e1000_media_type_copper) {
  501. /* according to the manual, the phy will retain its
  502. * settings across a power-down/up cycle */
  503. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  504. mii_reg &= ~MII_CR_POWER_DOWN;
  505. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  506. }
  507. }
  508. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  509. {
  510. /* Power down the PHY so no link is implied when interface is down *
  511. * The PHY cannot be powered down if any of the following is true *
  512. * (a) WoL is enabled
  513. * (b) AMT is active
  514. * (c) SoL/IDER session is active */
  515. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  516. adapter->hw.media_type == e1000_media_type_copper) {
  517. u16 mii_reg = 0;
  518. switch (adapter->hw.mac_type) {
  519. case e1000_82540:
  520. case e1000_82545:
  521. case e1000_82545_rev_3:
  522. case e1000_82546:
  523. case e1000_82546_rev_3:
  524. case e1000_82541:
  525. case e1000_82541_rev_2:
  526. case e1000_82547:
  527. case e1000_82547_rev_2:
  528. if (E1000_READ_REG(&adapter->hw, MANC) &
  529. E1000_MANC_SMBUS_EN)
  530. goto out;
  531. break;
  532. case e1000_82571:
  533. case e1000_82572:
  534. case e1000_82573:
  535. case e1000_80003es2lan:
  536. case e1000_ich8lan:
  537. if (e1000_check_mng_mode(&adapter->hw) ||
  538. e1000_check_phy_reset_block(&adapter->hw))
  539. goto out;
  540. break;
  541. default:
  542. goto out;
  543. }
  544. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  545. mii_reg |= MII_CR_POWER_DOWN;
  546. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  547. mdelay(1);
  548. }
  549. out:
  550. return;
  551. }
  552. void
  553. e1000_down(struct e1000_adapter *adapter)
  554. {
  555. struct net_device *netdev = adapter->netdev;
  556. /* signal that we're down so the interrupt handler does not
  557. * reschedule our watchdog timer */
  558. set_bit(__E1000_DOWN, &adapter->flags);
  559. #ifdef CONFIG_E1000_NAPI
  560. napi_disable(&adapter->napi);
  561. #endif
  562. e1000_irq_disable(adapter);
  563. del_timer_sync(&adapter->tx_fifo_stall_timer);
  564. del_timer_sync(&adapter->watchdog_timer);
  565. del_timer_sync(&adapter->phy_info_timer);
  566. netdev->tx_queue_len = adapter->tx_queue_len;
  567. adapter->link_speed = 0;
  568. adapter->link_duplex = 0;
  569. netif_carrier_off(netdev);
  570. netif_stop_queue(netdev);
  571. e1000_reset(adapter);
  572. e1000_clean_all_tx_rings(adapter);
  573. e1000_clean_all_rx_rings(adapter);
  574. }
  575. void
  576. e1000_reinit_locked(struct e1000_adapter *adapter)
  577. {
  578. WARN_ON(in_interrupt());
  579. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  580. msleep(1);
  581. e1000_down(adapter);
  582. e1000_up(adapter);
  583. clear_bit(__E1000_RESETTING, &adapter->flags);
  584. }
  585. void
  586. e1000_reset(struct e1000_adapter *adapter)
  587. {
  588. u32 pba = 0, tx_space, min_tx_space, min_rx_space;
  589. u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
  590. bool legacy_pba_adjust = false;
  591. /* Repartition Pba for greater than 9k mtu
  592. * To take effect CTRL.RST is required.
  593. */
  594. switch (adapter->hw.mac_type) {
  595. case e1000_82542_rev2_0:
  596. case e1000_82542_rev2_1:
  597. case e1000_82543:
  598. case e1000_82544:
  599. case e1000_82540:
  600. case e1000_82541:
  601. case e1000_82541_rev_2:
  602. legacy_pba_adjust = true;
  603. pba = E1000_PBA_48K;
  604. break;
  605. case e1000_82545:
  606. case e1000_82545_rev_3:
  607. case e1000_82546:
  608. case e1000_82546_rev_3:
  609. pba = E1000_PBA_48K;
  610. break;
  611. case e1000_82547:
  612. case e1000_82547_rev_2:
  613. legacy_pba_adjust = true;
  614. pba = E1000_PBA_30K;
  615. break;
  616. case e1000_82571:
  617. case e1000_82572:
  618. case e1000_80003es2lan:
  619. pba = E1000_PBA_38K;
  620. break;
  621. case e1000_82573:
  622. pba = E1000_PBA_20K;
  623. break;
  624. case e1000_ich8lan:
  625. pba = E1000_PBA_8K;
  626. case e1000_undefined:
  627. case e1000_num_macs:
  628. break;
  629. }
  630. if (legacy_pba_adjust) {
  631. if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
  632. pba -= 8; /* allocate more FIFO for Tx */
  633. if (adapter->hw.mac_type == e1000_82547) {
  634. adapter->tx_fifo_head = 0;
  635. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  636. adapter->tx_fifo_size =
  637. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  638. atomic_set(&adapter->tx_fifo_stall, 0);
  639. }
  640. } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
  641. /* adjust PBA for jumbo frames */
  642. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  643. /* To maintain wire speed transmits, the Tx FIFO should be
  644. * large enough to accomodate two full transmit packets,
  645. * rounded up to the next 1KB and expressed in KB. Likewise,
  646. * the Rx FIFO should be large enough to accomodate at least
  647. * one full receive packet and is similarly rounded up and
  648. * expressed in KB. */
  649. pba = E1000_READ_REG(&adapter->hw, PBA);
  650. /* upper 16 bits has Tx packet buffer allocation size in KB */
  651. tx_space = pba >> 16;
  652. /* lower 16 bits has Rx packet buffer allocation size in KB */
  653. pba &= 0xffff;
  654. /* don't include ethernet FCS because hardware appends/strips */
  655. min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
  656. VLAN_TAG_SIZE;
  657. min_tx_space = min_rx_space;
  658. min_tx_space *= 2;
  659. min_tx_space = ALIGN(min_tx_space, 1024);
  660. min_tx_space >>= 10;
  661. min_rx_space = ALIGN(min_rx_space, 1024);
  662. min_rx_space >>= 10;
  663. /* If current Tx allocation is less than the min Tx FIFO size,
  664. * and the min Tx FIFO size is less than the current Rx FIFO
  665. * allocation, take space away from current Rx allocation */
  666. if (tx_space < min_tx_space &&
  667. ((min_tx_space - tx_space) < pba)) {
  668. pba = pba - (min_tx_space - tx_space);
  669. /* PCI/PCIx hardware has PBA alignment constraints */
  670. switch (adapter->hw.mac_type) {
  671. case e1000_82545 ... e1000_82546_rev_3:
  672. pba &= ~(E1000_PBA_8K - 1);
  673. break;
  674. default:
  675. break;
  676. }
  677. /* if short on rx space, rx wins and must trump tx
  678. * adjustment or use Early Receive if available */
  679. if (pba < min_rx_space) {
  680. switch (adapter->hw.mac_type) {
  681. case e1000_82573:
  682. /* ERT enabled in e1000_configure_rx */
  683. break;
  684. default:
  685. pba = min_rx_space;
  686. break;
  687. }
  688. }
  689. }
  690. }
  691. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  692. /* flow control settings */
  693. /* Set the FC high water mark to 90% of the FIFO size.
  694. * Required to clear last 3 LSB */
  695. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  696. /* We can't use 90% on small FIFOs because the remainder
  697. * would be less than 1 full frame. In this case, we size
  698. * it to allow at least a full frame above the high water
  699. * mark. */
  700. if (pba < E1000_PBA_16K)
  701. fc_high_water_mark = (pba * 1024) - 1600;
  702. adapter->hw.fc_high_water = fc_high_water_mark;
  703. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  704. if (adapter->hw.mac_type == e1000_80003es2lan)
  705. adapter->hw.fc_pause_time = 0xFFFF;
  706. else
  707. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  708. adapter->hw.fc_send_xon = 1;
  709. adapter->hw.fc = adapter->hw.original_fc;
  710. /* Allow time for pending master requests to run */
  711. e1000_reset_hw(&adapter->hw);
  712. if (adapter->hw.mac_type >= e1000_82544)
  713. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  714. if (e1000_init_hw(&adapter->hw))
  715. DPRINTK(PROBE, ERR, "Hardware Error\n");
  716. e1000_update_mng_vlan(adapter);
  717. /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
  718. if (adapter->hw.mac_type >= e1000_82544 &&
  719. adapter->hw.mac_type <= e1000_82547_rev_2 &&
  720. adapter->hw.autoneg == 1 &&
  721. adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
  722. u32 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  723. /* clear phy power management bit if we are in gig only mode,
  724. * which if enabled will attempt negotiation to 100Mb, which
  725. * can cause a loss of link at power off or driver unload */
  726. ctrl &= ~E1000_CTRL_SWDPIN3;
  727. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  728. }
  729. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  730. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  731. e1000_reset_adaptive(&adapter->hw);
  732. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  733. if (!adapter->smart_power_down &&
  734. (adapter->hw.mac_type == e1000_82571 ||
  735. adapter->hw.mac_type == e1000_82572)) {
  736. u16 phy_data = 0;
  737. /* speed up time to link by disabling smart power down, ignore
  738. * the return value of this function because there is nothing
  739. * different we would do if it failed */
  740. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  741. &phy_data);
  742. phy_data &= ~IGP02E1000_PM_SPD;
  743. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  744. phy_data);
  745. }
  746. e1000_release_manageability(adapter);
  747. }
  748. /**
  749. * Dump the eeprom for users having checksum issues
  750. **/
  751. static void e1000_dump_eeprom(struct e1000_adapter *adapter)
  752. {
  753. struct net_device *netdev = adapter->netdev;
  754. struct ethtool_eeprom eeprom;
  755. const struct ethtool_ops *ops = netdev->ethtool_ops;
  756. u8 *data;
  757. int i;
  758. u16 csum_old, csum_new = 0;
  759. eeprom.len = ops->get_eeprom_len(netdev);
  760. eeprom.offset = 0;
  761. data = kmalloc(eeprom.len, GFP_KERNEL);
  762. if (!data) {
  763. printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
  764. " data\n");
  765. return;
  766. }
  767. ops->get_eeprom(netdev, &eeprom, data);
  768. csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
  769. (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
  770. for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
  771. csum_new += data[i] + (data[i + 1] << 8);
  772. csum_new = EEPROM_SUM - csum_new;
  773. printk(KERN_ERR "/*********************/\n");
  774. printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
  775. printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
  776. printk(KERN_ERR "Offset Values\n");
  777. printk(KERN_ERR "======== ======\n");
  778. print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
  779. printk(KERN_ERR "Include this output when contacting your support "
  780. "provider.\n");
  781. printk(KERN_ERR "This is not a software error! Something bad "
  782. "happened to your hardware or\n");
  783. printk(KERN_ERR "EEPROM image. Ignoring this "
  784. "problem could result in further problems,\n");
  785. printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
  786. printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
  787. "which is invalid\n");
  788. printk(KERN_ERR "and requires you to set the proper MAC "
  789. "address manually before continuing\n");
  790. printk(KERN_ERR "to enable this network device.\n");
  791. printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
  792. "to your hardware vendor\n");
  793. printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
  794. printk(KERN_ERR "/*********************/\n");
  795. kfree(data);
  796. }
  797. /**
  798. * e1000_probe - Device Initialization Routine
  799. * @pdev: PCI device information struct
  800. * @ent: entry in e1000_pci_tbl
  801. *
  802. * Returns 0 on success, negative on failure
  803. *
  804. * e1000_probe initializes an adapter identified by a pci_dev structure.
  805. * The OS initialization, configuring of the adapter private structure,
  806. * and a hardware reset occur.
  807. **/
  808. static int __devinit
  809. e1000_probe(struct pci_dev *pdev,
  810. const struct pci_device_id *ent)
  811. {
  812. struct net_device *netdev;
  813. struct e1000_adapter *adapter;
  814. static int cards_found = 0;
  815. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  816. int i, err, pci_using_dac;
  817. u16 eeprom_data = 0;
  818. u16 eeprom_apme_mask = E1000_EEPROM_APME;
  819. DECLARE_MAC_BUF(mac);
  820. if ((err = pci_enable_device(pdev)))
  821. return err;
  822. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  823. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  824. pci_using_dac = 1;
  825. } else {
  826. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  827. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  828. E1000_ERR("No usable DMA configuration, aborting\n");
  829. goto err_dma;
  830. }
  831. pci_using_dac = 0;
  832. }
  833. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  834. goto err_pci_reg;
  835. pci_set_master(pdev);
  836. err = -ENOMEM;
  837. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  838. if (!netdev)
  839. goto err_alloc_etherdev;
  840. SET_NETDEV_DEV(netdev, &pdev->dev);
  841. pci_set_drvdata(pdev, netdev);
  842. adapter = netdev_priv(netdev);
  843. adapter->netdev = netdev;
  844. adapter->pdev = pdev;
  845. adapter->hw.back = adapter;
  846. adapter->msg_enable = (1 << debug) - 1;
  847. err = -EIO;
  848. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
  849. pci_resource_len(pdev, BAR_0));
  850. if (!adapter->hw.hw_addr)
  851. goto err_ioremap;
  852. for (i = BAR_1; i <= BAR_5; i++) {
  853. if (pci_resource_len(pdev, i) == 0)
  854. continue;
  855. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  856. adapter->hw.io_base = pci_resource_start(pdev, i);
  857. break;
  858. }
  859. }
  860. netdev->open = &e1000_open;
  861. netdev->stop = &e1000_close;
  862. netdev->hard_start_xmit = &e1000_xmit_frame;
  863. netdev->get_stats = &e1000_get_stats;
  864. netdev->set_rx_mode = &e1000_set_rx_mode;
  865. netdev->set_mac_address = &e1000_set_mac;
  866. netdev->change_mtu = &e1000_change_mtu;
  867. netdev->do_ioctl = &e1000_ioctl;
  868. e1000_set_ethtool_ops(netdev);
  869. netdev->tx_timeout = &e1000_tx_timeout;
  870. netdev->watchdog_timeo = 5 * HZ;
  871. #ifdef CONFIG_E1000_NAPI
  872. netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
  873. #endif
  874. netdev->vlan_rx_register = e1000_vlan_rx_register;
  875. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  876. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  877. #ifdef CONFIG_NET_POLL_CONTROLLER
  878. netdev->poll_controller = e1000_netpoll;
  879. #endif
  880. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  881. adapter->bd_number = cards_found;
  882. /* setup the private structure */
  883. if ((err = e1000_sw_init(adapter)))
  884. goto err_sw_init;
  885. err = -EIO;
  886. /* Flash BAR mapping must happen after e1000_sw_init
  887. * because it depends on mac_type */
  888. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  889. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  890. adapter->hw.flash_address =
  891. ioremap(pci_resource_start(pdev, 1),
  892. pci_resource_len(pdev, 1));
  893. if (!adapter->hw.flash_address)
  894. goto err_flashmap;
  895. }
  896. if (e1000_check_phy_reset_block(&adapter->hw))
  897. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  898. if (adapter->hw.mac_type >= e1000_82543) {
  899. netdev->features = NETIF_F_SG |
  900. NETIF_F_HW_CSUM |
  901. NETIF_F_HW_VLAN_TX |
  902. NETIF_F_HW_VLAN_RX |
  903. NETIF_F_HW_VLAN_FILTER;
  904. if (adapter->hw.mac_type == e1000_ich8lan)
  905. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  906. }
  907. if ((adapter->hw.mac_type >= e1000_82544) &&
  908. (adapter->hw.mac_type != e1000_82547))
  909. netdev->features |= NETIF_F_TSO;
  910. if (adapter->hw.mac_type > e1000_82547_rev_2)
  911. netdev->features |= NETIF_F_TSO6;
  912. if (pci_using_dac)
  913. netdev->features |= NETIF_F_HIGHDMA;
  914. netdev->features |= NETIF_F_LLTX;
  915. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  916. /* initialize eeprom parameters */
  917. if (e1000_init_eeprom_params(&adapter->hw)) {
  918. E1000_ERR("EEPROM initialization failed\n");
  919. goto err_eeprom;
  920. }
  921. /* before reading the EEPROM, reset the controller to
  922. * put the device in a known good starting state */
  923. e1000_reset_hw(&adapter->hw);
  924. /* make sure the EEPROM is good */
  925. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  926. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  927. e1000_dump_eeprom(adapter);
  928. /*
  929. * set MAC address to all zeroes to invalidate and temporary
  930. * disable this device for the user. This blocks regular
  931. * traffic while still permitting ethtool ioctls from reaching
  932. * the hardware as well as allowing the user to run the
  933. * interface after manually setting a hw addr using
  934. * `ip set address`
  935. */
  936. memset(adapter->hw.mac_addr, 0, netdev->addr_len);
  937. } else {
  938. /* copy the MAC address out of the EEPROM */
  939. if (e1000_read_mac_addr(&adapter->hw))
  940. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  941. }
  942. /* don't block initalization here due to bad MAC address */
  943. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  944. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  945. if (!is_valid_ether_addr(netdev->perm_addr))
  946. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  947. e1000_get_bus_info(&adapter->hw);
  948. init_timer(&adapter->tx_fifo_stall_timer);
  949. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  950. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  951. init_timer(&adapter->watchdog_timer);
  952. adapter->watchdog_timer.function = &e1000_watchdog;
  953. adapter->watchdog_timer.data = (unsigned long) adapter;
  954. init_timer(&adapter->phy_info_timer);
  955. adapter->phy_info_timer.function = &e1000_update_phy_info;
  956. adapter->phy_info_timer.data = (unsigned long) adapter;
  957. INIT_WORK(&adapter->reset_task, e1000_reset_task);
  958. e1000_check_options(adapter);
  959. /* Initial Wake on LAN setting
  960. * If APM wake is enabled in the EEPROM,
  961. * enable the ACPI Magic Packet filter
  962. */
  963. switch (adapter->hw.mac_type) {
  964. case e1000_82542_rev2_0:
  965. case e1000_82542_rev2_1:
  966. case e1000_82543:
  967. break;
  968. case e1000_82544:
  969. e1000_read_eeprom(&adapter->hw,
  970. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  971. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  972. break;
  973. case e1000_ich8lan:
  974. e1000_read_eeprom(&adapter->hw,
  975. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  976. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  977. break;
  978. case e1000_82546:
  979. case e1000_82546_rev_3:
  980. case e1000_82571:
  981. case e1000_80003es2lan:
  982. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  983. e1000_read_eeprom(&adapter->hw,
  984. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  985. break;
  986. }
  987. /* Fall Through */
  988. default:
  989. e1000_read_eeprom(&adapter->hw,
  990. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  991. break;
  992. }
  993. if (eeprom_data & eeprom_apme_mask)
  994. adapter->eeprom_wol |= E1000_WUFC_MAG;
  995. /* now that we have the eeprom settings, apply the special cases
  996. * where the eeprom may be wrong or the board simply won't support
  997. * wake on lan on a particular port */
  998. switch (pdev->device) {
  999. case E1000_DEV_ID_82546GB_PCIE:
  1000. adapter->eeprom_wol = 0;
  1001. break;
  1002. case E1000_DEV_ID_82546EB_FIBER:
  1003. case E1000_DEV_ID_82546GB_FIBER:
  1004. case E1000_DEV_ID_82571EB_FIBER:
  1005. /* Wake events only supported on port A for dual fiber
  1006. * regardless of eeprom setting */
  1007. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  1008. adapter->eeprom_wol = 0;
  1009. break;
  1010. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1011. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  1012. case E1000_DEV_ID_82571EB_QUAD_FIBER:
  1013. case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
  1014. case E1000_DEV_ID_82571PT_QUAD_COPPER:
  1015. /* if quad port adapter, disable WoL on all but port A */
  1016. if (global_quad_port_a != 0)
  1017. adapter->eeprom_wol = 0;
  1018. else
  1019. adapter->quad_port_a = 1;
  1020. /* Reset for multiple quad port adapters */
  1021. if (++global_quad_port_a == 4)
  1022. global_quad_port_a = 0;
  1023. break;
  1024. }
  1025. /* initialize the wol settings based on the eeprom settings */
  1026. adapter->wol = adapter->eeprom_wol;
  1027. /* print bus type/speed/width info */
  1028. {
  1029. struct e1000_hw *hw = &adapter->hw;
  1030. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  1031. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  1032. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  1033. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  1034. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  1035. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  1036. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  1037. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  1038. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  1039. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  1040. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  1041. "32-bit"));
  1042. }
  1043. printk("%s\n", print_mac(mac, netdev->dev_addr));
  1044. if (adapter->hw.bus_type == e1000_bus_type_pci_express) {
  1045. DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
  1046. "longer be supported by this driver in the future.\n",
  1047. pdev->vendor, pdev->device);
  1048. DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
  1049. "driver instead.\n");
  1050. }
  1051. /* reset the hardware with the new settings */
  1052. e1000_reset(adapter);
  1053. /* If the controller is 82573 and f/w is AMT, do not set
  1054. * DRV_LOAD until the interface is up. For all other cases,
  1055. * let the f/w know that the h/w is now under the control
  1056. * of the driver. */
  1057. if (adapter->hw.mac_type != e1000_82573 ||
  1058. !e1000_check_mng_mode(&adapter->hw))
  1059. e1000_get_hw_control(adapter);
  1060. /* tell the stack to leave us alone until e1000_open() is called */
  1061. netif_carrier_off(netdev);
  1062. netif_stop_queue(netdev);
  1063. strcpy(netdev->name, "eth%d");
  1064. if ((err = register_netdev(netdev)))
  1065. goto err_register;
  1066. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  1067. cards_found++;
  1068. return 0;
  1069. err_register:
  1070. e1000_release_hw_control(adapter);
  1071. err_eeprom:
  1072. if (!e1000_check_phy_reset_block(&adapter->hw))
  1073. e1000_phy_hw_reset(&adapter->hw);
  1074. if (adapter->hw.flash_address)
  1075. iounmap(adapter->hw.flash_address);
  1076. err_flashmap:
  1077. #ifdef CONFIG_E1000_NAPI
  1078. for (i = 0; i < adapter->num_rx_queues; i++)
  1079. dev_put(&adapter->polling_netdev[i]);
  1080. #endif
  1081. kfree(adapter->tx_ring);
  1082. kfree(adapter->rx_ring);
  1083. #ifdef CONFIG_E1000_NAPI
  1084. kfree(adapter->polling_netdev);
  1085. #endif
  1086. err_sw_init:
  1087. iounmap(adapter->hw.hw_addr);
  1088. err_ioremap:
  1089. free_netdev(netdev);
  1090. err_alloc_etherdev:
  1091. pci_release_regions(pdev);
  1092. err_pci_reg:
  1093. err_dma:
  1094. pci_disable_device(pdev);
  1095. return err;
  1096. }
  1097. /**
  1098. * e1000_remove - Device Removal Routine
  1099. * @pdev: PCI device information struct
  1100. *
  1101. * e1000_remove is called by the PCI subsystem to alert the driver
  1102. * that it should release a PCI device. The could be caused by a
  1103. * Hot-Plug event, or because the driver is going to be removed from
  1104. * memory.
  1105. **/
  1106. static void __devexit
  1107. e1000_remove(struct pci_dev *pdev)
  1108. {
  1109. struct net_device *netdev = pci_get_drvdata(pdev);
  1110. struct e1000_adapter *adapter = netdev_priv(netdev);
  1111. #ifdef CONFIG_E1000_NAPI
  1112. int i;
  1113. #endif
  1114. cancel_work_sync(&adapter->reset_task);
  1115. e1000_release_manageability(adapter);
  1116. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  1117. * would have already happened in close and is redundant. */
  1118. e1000_release_hw_control(adapter);
  1119. #ifdef CONFIG_E1000_NAPI
  1120. for (i = 0; i < adapter->num_rx_queues; i++)
  1121. dev_put(&adapter->polling_netdev[i]);
  1122. #endif
  1123. unregister_netdev(netdev);
  1124. if (!e1000_check_phy_reset_block(&adapter->hw))
  1125. e1000_phy_hw_reset(&adapter->hw);
  1126. kfree(adapter->tx_ring);
  1127. kfree(adapter->rx_ring);
  1128. #ifdef CONFIG_E1000_NAPI
  1129. kfree(adapter->polling_netdev);
  1130. #endif
  1131. iounmap(adapter->hw.hw_addr);
  1132. if (adapter->hw.flash_address)
  1133. iounmap(adapter->hw.flash_address);
  1134. pci_release_regions(pdev);
  1135. free_netdev(netdev);
  1136. pci_disable_device(pdev);
  1137. }
  1138. /**
  1139. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  1140. * @adapter: board private structure to initialize
  1141. *
  1142. * e1000_sw_init initializes the Adapter private data structure.
  1143. * Fields are initialized based on PCI device information and
  1144. * OS network device settings (MTU size).
  1145. **/
  1146. static int __devinit
  1147. e1000_sw_init(struct e1000_adapter *adapter)
  1148. {
  1149. struct e1000_hw *hw = &adapter->hw;
  1150. struct net_device *netdev = adapter->netdev;
  1151. struct pci_dev *pdev = adapter->pdev;
  1152. #ifdef CONFIG_E1000_NAPI
  1153. int i;
  1154. #endif
  1155. /* PCI config space info */
  1156. hw->vendor_id = pdev->vendor;
  1157. hw->device_id = pdev->device;
  1158. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1159. hw->subsystem_id = pdev->subsystem_device;
  1160. hw->revision_id = pdev->revision;
  1161. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  1162. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  1163. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  1164. hw->max_frame_size = netdev->mtu +
  1165. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1166. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  1167. /* identify the MAC */
  1168. if (e1000_set_mac_type(hw)) {
  1169. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  1170. return -EIO;
  1171. }
  1172. switch (hw->mac_type) {
  1173. default:
  1174. break;
  1175. case e1000_82541:
  1176. case e1000_82547:
  1177. case e1000_82541_rev_2:
  1178. case e1000_82547_rev_2:
  1179. hw->phy_init_script = 1;
  1180. break;
  1181. }
  1182. e1000_set_media_type(hw);
  1183. hw->wait_autoneg_complete = false;
  1184. hw->tbi_compatibility_en = true;
  1185. hw->adaptive_ifs = true;
  1186. /* Copper options */
  1187. if (hw->media_type == e1000_media_type_copper) {
  1188. hw->mdix = AUTO_ALL_MODES;
  1189. hw->disable_polarity_correction = false;
  1190. hw->master_slave = E1000_MASTER_SLAVE;
  1191. }
  1192. adapter->num_tx_queues = 1;
  1193. adapter->num_rx_queues = 1;
  1194. if (e1000_alloc_queues(adapter)) {
  1195. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  1196. return -ENOMEM;
  1197. }
  1198. #ifdef CONFIG_E1000_NAPI
  1199. for (i = 0; i < adapter->num_rx_queues; i++) {
  1200. adapter->polling_netdev[i].priv = adapter;
  1201. dev_hold(&adapter->polling_netdev[i]);
  1202. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  1203. }
  1204. spin_lock_init(&adapter->tx_queue_lock);
  1205. #endif
  1206. /* Explicitly disable IRQ since the NIC can be in any state. */
  1207. e1000_irq_disable(adapter);
  1208. spin_lock_init(&adapter->stats_lock);
  1209. set_bit(__E1000_DOWN, &adapter->flags);
  1210. return 0;
  1211. }
  1212. /**
  1213. * e1000_alloc_queues - Allocate memory for all rings
  1214. * @adapter: board private structure to initialize
  1215. *
  1216. * We allocate one ring per queue at run-time since we don't know the
  1217. * number of queues at compile-time. The polling_netdev array is
  1218. * intended for Multiqueue, but should work fine with a single queue.
  1219. **/
  1220. static int __devinit
  1221. e1000_alloc_queues(struct e1000_adapter *adapter)
  1222. {
  1223. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1224. sizeof(struct e1000_tx_ring), GFP_KERNEL);
  1225. if (!adapter->tx_ring)
  1226. return -ENOMEM;
  1227. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1228. sizeof(struct e1000_rx_ring), GFP_KERNEL);
  1229. if (!adapter->rx_ring) {
  1230. kfree(adapter->tx_ring);
  1231. return -ENOMEM;
  1232. }
  1233. #ifdef CONFIG_E1000_NAPI
  1234. adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
  1235. sizeof(struct net_device),
  1236. GFP_KERNEL);
  1237. if (!adapter->polling_netdev) {
  1238. kfree(adapter->tx_ring);
  1239. kfree(adapter->rx_ring);
  1240. return -ENOMEM;
  1241. }
  1242. #endif
  1243. return E1000_SUCCESS;
  1244. }
  1245. /**
  1246. * e1000_open - Called when a network interface is made active
  1247. * @netdev: network interface device structure
  1248. *
  1249. * Returns 0 on success, negative value on failure
  1250. *
  1251. * The open entry point is called when a network interface is made
  1252. * active by the system (IFF_UP). At this point all resources needed
  1253. * for transmit and receive operations are allocated, the interrupt
  1254. * handler is registered with the OS, the watchdog timer is started,
  1255. * and the stack is notified that the interface is ready.
  1256. **/
  1257. static int
  1258. e1000_open(struct net_device *netdev)
  1259. {
  1260. struct e1000_adapter *adapter = netdev_priv(netdev);
  1261. int err;
  1262. /* disallow open during test */
  1263. if (test_bit(__E1000_TESTING, &adapter->flags))
  1264. return -EBUSY;
  1265. /* allocate transmit descriptors */
  1266. err = e1000_setup_all_tx_resources(adapter);
  1267. if (err)
  1268. goto err_setup_tx;
  1269. /* allocate receive descriptors */
  1270. err = e1000_setup_all_rx_resources(adapter);
  1271. if (err)
  1272. goto err_setup_rx;
  1273. e1000_power_up_phy(adapter);
  1274. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1275. if ((adapter->hw.mng_cookie.status &
  1276. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1277. e1000_update_mng_vlan(adapter);
  1278. }
  1279. /* If AMT is enabled, let the firmware know that the network
  1280. * interface is now open */
  1281. if (adapter->hw.mac_type == e1000_82573 &&
  1282. e1000_check_mng_mode(&adapter->hw))
  1283. e1000_get_hw_control(adapter);
  1284. /* before we allocate an interrupt, we must be ready to handle it.
  1285. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
  1286. * as soon as we call pci_request_irq, so we have to setup our
  1287. * clean_rx handler before we do so. */
  1288. e1000_configure(adapter);
  1289. err = e1000_request_irq(adapter);
  1290. if (err)
  1291. goto err_req_irq;
  1292. /* From here on the code is the same as e1000_up() */
  1293. clear_bit(__E1000_DOWN, &adapter->flags);
  1294. #ifdef CONFIG_E1000_NAPI
  1295. napi_enable(&adapter->napi);
  1296. #endif
  1297. e1000_irq_enable(adapter);
  1298. /* fire a link status change interrupt to start the watchdog */
  1299. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
  1300. return E1000_SUCCESS;
  1301. err_req_irq:
  1302. e1000_release_hw_control(adapter);
  1303. e1000_power_down_phy(adapter);
  1304. e1000_free_all_rx_resources(adapter);
  1305. err_setup_rx:
  1306. e1000_free_all_tx_resources(adapter);
  1307. err_setup_tx:
  1308. e1000_reset(adapter);
  1309. return err;
  1310. }
  1311. /**
  1312. * e1000_close - Disables a network interface
  1313. * @netdev: network interface device structure
  1314. *
  1315. * Returns 0, this is not allowed to fail
  1316. *
  1317. * The close entry point is called when an interface is de-activated
  1318. * by the OS. The hardware is still under the drivers control, but
  1319. * needs to be disabled. A global MAC reset is issued to stop the
  1320. * hardware, and all transmit and receive resources are freed.
  1321. **/
  1322. static int
  1323. e1000_close(struct net_device *netdev)
  1324. {
  1325. struct e1000_adapter *adapter = netdev_priv(netdev);
  1326. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1327. e1000_down(adapter);
  1328. e1000_power_down_phy(adapter);
  1329. e1000_free_irq(adapter);
  1330. e1000_free_all_tx_resources(adapter);
  1331. e1000_free_all_rx_resources(adapter);
  1332. /* kill manageability vlan ID if supported, but not if a vlan with
  1333. * the same ID is registered on the host OS (let 8021q kill it) */
  1334. if ((adapter->hw.mng_cookie.status &
  1335. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  1336. !(adapter->vlgrp &&
  1337. vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
  1338. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1339. }
  1340. /* If AMT is enabled, let the firmware know that the network
  1341. * interface is now closed */
  1342. if (adapter->hw.mac_type == e1000_82573 &&
  1343. e1000_check_mng_mode(&adapter->hw))
  1344. e1000_release_hw_control(adapter);
  1345. return 0;
  1346. }
  1347. /**
  1348. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1349. * @adapter: address of board private structure
  1350. * @start: address of beginning of memory
  1351. * @len: length of memory
  1352. **/
  1353. static bool
  1354. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1355. void *start, unsigned long len)
  1356. {
  1357. unsigned long begin = (unsigned long) start;
  1358. unsigned long end = begin + len;
  1359. /* First rev 82545 and 82546 need to not allow any memory
  1360. * write location to cross 64k boundary due to errata 23 */
  1361. if (adapter->hw.mac_type == e1000_82545 ||
  1362. adapter->hw.mac_type == e1000_82546) {
  1363. return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
  1364. }
  1365. return true;
  1366. }
  1367. /**
  1368. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1369. * @adapter: board private structure
  1370. * @txdr: tx descriptor ring (for a specific queue) to setup
  1371. *
  1372. * Return 0 on success, negative on failure
  1373. **/
  1374. static int
  1375. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1376. struct e1000_tx_ring *txdr)
  1377. {
  1378. struct pci_dev *pdev = adapter->pdev;
  1379. int size;
  1380. size = sizeof(struct e1000_buffer) * txdr->count;
  1381. txdr->buffer_info = vmalloc(size);
  1382. if (!txdr->buffer_info) {
  1383. DPRINTK(PROBE, ERR,
  1384. "Unable to allocate memory for the transmit descriptor ring\n");
  1385. return -ENOMEM;
  1386. }
  1387. memset(txdr->buffer_info, 0, size);
  1388. /* round up to nearest 4K */
  1389. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1390. txdr->size = ALIGN(txdr->size, 4096);
  1391. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1392. if (!txdr->desc) {
  1393. setup_tx_desc_die:
  1394. vfree(txdr->buffer_info);
  1395. DPRINTK(PROBE, ERR,
  1396. "Unable to allocate memory for the transmit descriptor ring\n");
  1397. return -ENOMEM;
  1398. }
  1399. /* Fix for errata 23, can't cross 64kB boundary */
  1400. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1401. void *olddesc = txdr->desc;
  1402. dma_addr_t olddma = txdr->dma;
  1403. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1404. "at %p\n", txdr->size, txdr->desc);
  1405. /* Try again, without freeing the previous */
  1406. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1407. /* Failed allocation, critical failure */
  1408. if (!txdr->desc) {
  1409. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1410. goto setup_tx_desc_die;
  1411. }
  1412. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1413. /* give up */
  1414. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1415. txdr->dma);
  1416. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1417. DPRINTK(PROBE, ERR,
  1418. "Unable to allocate aligned memory "
  1419. "for the transmit descriptor ring\n");
  1420. vfree(txdr->buffer_info);
  1421. return -ENOMEM;
  1422. } else {
  1423. /* Free old allocation, new allocation was successful */
  1424. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1425. }
  1426. }
  1427. memset(txdr->desc, 0, txdr->size);
  1428. txdr->next_to_use = 0;
  1429. txdr->next_to_clean = 0;
  1430. spin_lock_init(&txdr->tx_lock);
  1431. return 0;
  1432. }
  1433. /**
  1434. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1435. * (Descriptors) for all queues
  1436. * @adapter: board private structure
  1437. *
  1438. * Return 0 on success, negative on failure
  1439. **/
  1440. int
  1441. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1442. {
  1443. int i, err = 0;
  1444. for (i = 0; i < adapter->num_tx_queues; i++) {
  1445. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1446. if (err) {
  1447. DPRINTK(PROBE, ERR,
  1448. "Allocation for Tx Queue %u failed\n", i);
  1449. for (i-- ; i >= 0; i--)
  1450. e1000_free_tx_resources(adapter,
  1451. &adapter->tx_ring[i]);
  1452. break;
  1453. }
  1454. }
  1455. return err;
  1456. }
  1457. /**
  1458. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1459. * @adapter: board private structure
  1460. *
  1461. * Configure the Tx unit of the MAC after a reset.
  1462. **/
  1463. static void
  1464. e1000_configure_tx(struct e1000_adapter *adapter)
  1465. {
  1466. u64 tdba;
  1467. struct e1000_hw *hw = &adapter->hw;
  1468. u32 tdlen, tctl, tipg, tarc;
  1469. u32 ipgr1, ipgr2;
  1470. /* Setup the HW Tx Head and Tail descriptor pointers */
  1471. switch (adapter->num_tx_queues) {
  1472. case 1:
  1473. default:
  1474. tdba = adapter->tx_ring[0].dma;
  1475. tdlen = adapter->tx_ring[0].count *
  1476. sizeof(struct e1000_tx_desc);
  1477. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1478. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1479. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1480. E1000_WRITE_REG(hw, TDT, 0);
  1481. E1000_WRITE_REG(hw, TDH, 0);
  1482. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  1483. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  1484. break;
  1485. }
  1486. /* Set the default values for the Tx Inter Packet Gap timer */
  1487. if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
  1488. (hw->media_type == e1000_media_type_fiber ||
  1489. hw->media_type == e1000_media_type_internal_serdes))
  1490. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1491. else
  1492. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1493. switch (hw->mac_type) {
  1494. case e1000_82542_rev2_0:
  1495. case e1000_82542_rev2_1:
  1496. tipg = DEFAULT_82542_TIPG_IPGT;
  1497. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1498. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1499. break;
  1500. case e1000_80003es2lan:
  1501. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1502. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1503. break;
  1504. default:
  1505. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1506. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1507. break;
  1508. }
  1509. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1510. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1511. E1000_WRITE_REG(hw, TIPG, tipg);
  1512. /* Set the Tx Interrupt Delay register */
  1513. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1514. if (hw->mac_type >= e1000_82540)
  1515. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1516. /* Program the Transmit Control Register */
  1517. tctl = E1000_READ_REG(hw, TCTL);
  1518. tctl &= ~E1000_TCTL_CT;
  1519. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1520. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1521. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1522. tarc = E1000_READ_REG(hw, TARC0);
  1523. /* set the speed mode bit, we'll clear it if we're not at
  1524. * gigabit link later */
  1525. tarc |= (1 << 21);
  1526. E1000_WRITE_REG(hw, TARC0, tarc);
  1527. } else if (hw->mac_type == e1000_80003es2lan) {
  1528. tarc = E1000_READ_REG(hw, TARC0);
  1529. tarc |= 1;
  1530. E1000_WRITE_REG(hw, TARC0, tarc);
  1531. tarc = E1000_READ_REG(hw, TARC1);
  1532. tarc |= 1;
  1533. E1000_WRITE_REG(hw, TARC1, tarc);
  1534. }
  1535. e1000_config_collision_dist(hw);
  1536. /* Setup Transmit Descriptor Settings for eop descriptor */
  1537. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  1538. /* only set IDE if we are delaying interrupts using the timers */
  1539. if (adapter->tx_int_delay)
  1540. adapter->txd_cmd |= E1000_TXD_CMD_IDE;
  1541. if (hw->mac_type < e1000_82543)
  1542. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1543. else
  1544. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1545. /* Cache if we're 82544 running in PCI-X because we'll
  1546. * need this to apply a workaround later in the send path. */
  1547. if (hw->mac_type == e1000_82544 &&
  1548. hw->bus_type == e1000_bus_type_pcix)
  1549. adapter->pcix_82544 = 1;
  1550. E1000_WRITE_REG(hw, TCTL, tctl);
  1551. }
  1552. /**
  1553. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1554. * @adapter: board private structure
  1555. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1556. *
  1557. * Returns 0 on success, negative on failure
  1558. **/
  1559. static int
  1560. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1561. struct e1000_rx_ring *rxdr)
  1562. {
  1563. struct pci_dev *pdev = adapter->pdev;
  1564. int size, desc_len;
  1565. size = sizeof(struct e1000_buffer) * rxdr->count;
  1566. rxdr->buffer_info = vmalloc(size);
  1567. if (!rxdr->buffer_info) {
  1568. DPRINTK(PROBE, ERR,
  1569. "Unable to allocate memory for the receive descriptor ring\n");
  1570. return -ENOMEM;
  1571. }
  1572. memset(rxdr->buffer_info, 0, size);
  1573. rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
  1574. GFP_KERNEL);
  1575. if (!rxdr->ps_page) {
  1576. vfree(rxdr->buffer_info);
  1577. DPRINTK(PROBE, ERR,
  1578. "Unable to allocate memory for the receive descriptor ring\n");
  1579. return -ENOMEM;
  1580. }
  1581. rxdr->ps_page_dma = kcalloc(rxdr->count,
  1582. sizeof(struct e1000_ps_page_dma),
  1583. GFP_KERNEL);
  1584. if (!rxdr->ps_page_dma) {
  1585. vfree(rxdr->buffer_info);
  1586. kfree(rxdr->ps_page);
  1587. DPRINTK(PROBE, ERR,
  1588. "Unable to allocate memory for the receive descriptor ring\n");
  1589. return -ENOMEM;
  1590. }
  1591. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1592. desc_len = sizeof(struct e1000_rx_desc);
  1593. else
  1594. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1595. /* Round up to nearest 4K */
  1596. rxdr->size = rxdr->count * desc_len;
  1597. rxdr->size = ALIGN(rxdr->size, 4096);
  1598. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1599. if (!rxdr->desc) {
  1600. DPRINTK(PROBE, ERR,
  1601. "Unable to allocate memory for the receive descriptor ring\n");
  1602. setup_rx_desc_die:
  1603. vfree(rxdr->buffer_info);
  1604. kfree(rxdr->ps_page);
  1605. kfree(rxdr->ps_page_dma);
  1606. return -ENOMEM;
  1607. }
  1608. /* Fix for errata 23, can't cross 64kB boundary */
  1609. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1610. void *olddesc = rxdr->desc;
  1611. dma_addr_t olddma = rxdr->dma;
  1612. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1613. "at %p\n", rxdr->size, rxdr->desc);
  1614. /* Try again, without freeing the previous */
  1615. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1616. /* Failed allocation, critical failure */
  1617. if (!rxdr->desc) {
  1618. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1619. DPRINTK(PROBE, ERR,
  1620. "Unable to allocate memory "
  1621. "for the receive descriptor ring\n");
  1622. goto setup_rx_desc_die;
  1623. }
  1624. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1625. /* give up */
  1626. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1627. rxdr->dma);
  1628. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1629. DPRINTK(PROBE, ERR,
  1630. "Unable to allocate aligned memory "
  1631. "for the receive descriptor ring\n");
  1632. goto setup_rx_desc_die;
  1633. } else {
  1634. /* Free old allocation, new allocation was successful */
  1635. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1636. }
  1637. }
  1638. memset(rxdr->desc, 0, rxdr->size);
  1639. rxdr->next_to_clean = 0;
  1640. rxdr->next_to_use = 0;
  1641. return 0;
  1642. }
  1643. /**
  1644. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1645. * (Descriptors) for all queues
  1646. * @adapter: board private structure
  1647. *
  1648. * Return 0 on success, negative on failure
  1649. **/
  1650. int
  1651. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1652. {
  1653. int i, err = 0;
  1654. for (i = 0; i < adapter->num_rx_queues; i++) {
  1655. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1656. if (err) {
  1657. DPRINTK(PROBE, ERR,
  1658. "Allocation for Rx Queue %u failed\n", i);
  1659. for (i-- ; i >= 0; i--)
  1660. e1000_free_rx_resources(adapter,
  1661. &adapter->rx_ring[i]);
  1662. break;
  1663. }
  1664. }
  1665. return err;
  1666. }
  1667. /**
  1668. * e1000_setup_rctl - configure the receive control registers
  1669. * @adapter: Board private structure
  1670. **/
  1671. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1672. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1673. static void
  1674. e1000_setup_rctl(struct e1000_adapter *adapter)
  1675. {
  1676. u32 rctl, rfctl;
  1677. u32 psrctl = 0;
  1678. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1679. u32 pages = 0;
  1680. #endif
  1681. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1682. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1683. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1684. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1685. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1686. if (adapter->hw.tbi_compatibility_on == 1)
  1687. rctl |= E1000_RCTL_SBP;
  1688. else
  1689. rctl &= ~E1000_RCTL_SBP;
  1690. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1691. rctl &= ~E1000_RCTL_LPE;
  1692. else
  1693. rctl |= E1000_RCTL_LPE;
  1694. /* Setup buffer sizes */
  1695. rctl &= ~E1000_RCTL_SZ_4096;
  1696. rctl |= E1000_RCTL_BSEX;
  1697. switch (adapter->rx_buffer_len) {
  1698. case E1000_RXBUFFER_256:
  1699. rctl |= E1000_RCTL_SZ_256;
  1700. rctl &= ~E1000_RCTL_BSEX;
  1701. break;
  1702. case E1000_RXBUFFER_512:
  1703. rctl |= E1000_RCTL_SZ_512;
  1704. rctl &= ~E1000_RCTL_BSEX;
  1705. break;
  1706. case E1000_RXBUFFER_1024:
  1707. rctl |= E1000_RCTL_SZ_1024;
  1708. rctl &= ~E1000_RCTL_BSEX;
  1709. break;
  1710. case E1000_RXBUFFER_2048:
  1711. default:
  1712. rctl |= E1000_RCTL_SZ_2048;
  1713. rctl &= ~E1000_RCTL_BSEX;
  1714. break;
  1715. case E1000_RXBUFFER_4096:
  1716. rctl |= E1000_RCTL_SZ_4096;
  1717. break;
  1718. case E1000_RXBUFFER_8192:
  1719. rctl |= E1000_RCTL_SZ_8192;
  1720. break;
  1721. case E1000_RXBUFFER_16384:
  1722. rctl |= E1000_RCTL_SZ_16384;
  1723. break;
  1724. }
  1725. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1726. /* 82571 and greater support packet-split where the protocol
  1727. * header is placed in skb->data and the packet data is
  1728. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1729. * In the case of a non-split, skb->data is linearly filled,
  1730. * followed by the page buffers. Therefore, skb->data is
  1731. * sized to hold the largest protocol header.
  1732. */
  1733. /* allocations using alloc_page take too long for regular MTU
  1734. * so only enable packet split for jumbo frames */
  1735. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1736. if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
  1737. PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
  1738. adapter->rx_ps_pages = pages;
  1739. else
  1740. adapter->rx_ps_pages = 0;
  1741. #endif
  1742. if (adapter->rx_ps_pages) {
  1743. /* Configure extra packet-split registers */
  1744. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1745. rfctl |= E1000_RFCTL_EXTEN;
  1746. /* disable packet split support for IPv6 extension headers,
  1747. * because some malformed IPv6 headers can hang the RX */
  1748. rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
  1749. E1000_RFCTL_NEW_IPV6_EXT_DIS);
  1750. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1751. rctl |= E1000_RCTL_DTYP_PS;
  1752. psrctl |= adapter->rx_ps_bsize0 >>
  1753. E1000_PSRCTL_BSIZE0_SHIFT;
  1754. switch (adapter->rx_ps_pages) {
  1755. case 3:
  1756. psrctl |= PAGE_SIZE <<
  1757. E1000_PSRCTL_BSIZE3_SHIFT;
  1758. case 2:
  1759. psrctl |= PAGE_SIZE <<
  1760. E1000_PSRCTL_BSIZE2_SHIFT;
  1761. case 1:
  1762. psrctl |= PAGE_SIZE >>
  1763. E1000_PSRCTL_BSIZE1_SHIFT;
  1764. break;
  1765. }
  1766. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1767. }
  1768. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1769. }
  1770. /**
  1771. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1772. * @adapter: board private structure
  1773. *
  1774. * Configure the Rx unit of the MAC after a reset.
  1775. **/
  1776. static void
  1777. e1000_configure_rx(struct e1000_adapter *adapter)
  1778. {
  1779. u64 rdba;
  1780. struct e1000_hw *hw = &adapter->hw;
  1781. u32 rdlen, rctl, rxcsum, ctrl_ext;
  1782. if (adapter->rx_ps_pages) {
  1783. /* this is a 32 byte descriptor */
  1784. rdlen = adapter->rx_ring[0].count *
  1785. sizeof(union e1000_rx_desc_packet_split);
  1786. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1787. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1788. } else {
  1789. rdlen = adapter->rx_ring[0].count *
  1790. sizeof(struct e1000_rx_desc);
  1791. adapter->clean_rx = e1000_clean_rx_irq;
  1792. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1793. }
  1794. /* disable receives while setting up the descriptors */
  1795. rctl = E1000_READ_REG(hw, RCTL);
  1796. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1797. /* set the Receive Delay Timer Register */
  1798. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1799. if (hw->mac_type >= e1000_82540) {
  1800. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1801. if (adapter->itr_setting != 0)
  1802. E1000_WRITE_REG(hw, ITR,
  1803. 1000000000 / (adapter->itr * 256));
  1804. }
  1805. if (hw->mac_type >= e1000_82571) {
  1806. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1807. /* Reset delay timers after every interrupt */
  1808. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1809. #ifdef CONFIG_E1000_NAPI
  1810. /* Auto-Mask interrupts upon ICR access */
  1811. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1812. E1000_WRITE_REG(hw, IAM, 0xffffffff);
  1813. #endif
  1814. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1815. E1000_WRITE_FLUSH(hw);
  1816. }
  1817. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1818. * the Base and Length of the Rx Descriptor Ring */
  1819. switch (adapter->num_rx_queues) {
  1820. case 1:
  1821. default:
  1822. rdba = adapter->rx_ring[0].dma;
  1823. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1824. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1825. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1826. E1000_WRITE_REG(hw, RDT, 0);
  1827. E1000_WRITE_REG(hw, RDH, 0);
  1828. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
  1829. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
  1830. break;
  1831. }
  1832. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1833. if (hw->mac_type >= e1000_82543) {
  1834. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1835. if (adapter->rx_csum) {
  1836. rxcsum |= E1000_RXCSUM_TUOFL;
  1837. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1838. * Must be used in conjunction with packet-split. */
  1839. if ((hw->mac_type >= e1000_82571) &&
  1840. (adapter->rx_ps_pages)) {
  1841. rxcsum |= E1000_RXCSUM_IPPCSE;
  1842. }
  1843. } else {
  1844. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1845. /* don't need to clear IPPCSE as it defaults to 0 */
  1846. }
  1847. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1848. }
  1849. /* enable early receives on 82573, only takes effect if using > 2048
  1850. * byte total frame size. for example only for jumbo frames */
  1851. #define E1000_ERT_2048 0x100
  1852. if (hw->mac_type == e1000_82573)
  1853. E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
  1854. /* Enable Receives */
  1855. E1000_WRITE_REG(hw, RCTL, rctl);
  1856. }
  1857. /**
  1858. * e1000_free_tx_resources - Free Tx Resources per Queue
  1859. * @adapter: board private structure
  1860. * @tx_ring: Tx descriptor ring for a specific queue
  1861. *
  1862. * Free all transmit software resources
  1863. **/
  1864. static void
  1865. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1866. struct e1000_tx_ring *tx_ring)
  1867. {
  1868. struct pci_dev *pdev = adapter->pdev;
  1869. e1000_clean_tx_ring(adapter, tx_ring);
  1870. vfree(tx_ring->buffer_info);
  1871. tx_ring->buffer_info = NULL;
  1872. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1873. tx_ring->desc = NULL;
  1874. }
  1875. /**
  1876. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1877. * @adapter: board private structure
  1878. *
  1879. * Free all transmit software resources
  1880. **/
  1881. void
  1882. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1883. {
  1884. int i;
  1885. for (i = 0; i < adapter->num_tx_queues; i++)
  1886. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1887. }
  1888. static void
  1889. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1890. struct e1000_buffer *buffer_info)
  1891. {
  1892. if (buffer_info->dma) {
  1893. pci_unmap_page(adapter->pdev,
  1894. buffer_info->dma,
  1895. buffer_info->length,
  1896. PCI_DMA_TODEVICE);
  1897. buffer_info->dma = 0;
  1898. }
  1899. if (buffer_info->skb) {
  1900. dev_kfree_skb_any(buffer_info->skb);
  1901. buffer_info->skb = NULL;
  1902. }
  1903. /* buffer_info must be completely set up in the transmit path */
  1904. }
  1905. /**
  1906. * e1000_clean_tx_ring - Free Tx Buffers
  1907. * @adapter: board private structure
  1908. * @tx_ring: ring to be cleaned
  1909. **/
  1910. static void
  1911. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1912. struct e1000_tx_ring *tx_ring)
  1913. {
  1914. struct e1000_buffer *buffer_info;
  1915. unsigned long size;
  1916. unsigned int i;
  1917. /* Free all the Tx ring sk_buffs */
  1918. for (i = 0; i < tx_ring->count; i++) {
  1919. buffer_info = &tx_ring->buffer_info[i];
  1920. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1921. }
  1922. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1923. memset(tx_ring->buffer_info, 0, size);
  1924. /* Zero out the descriptor ring */
  1925. memset(tx_ring->desc, 0, tx_ring->size);
  1926. tx_ring->next_to_use = 0;
  1927. tx_ring->next_to_clean = 0;
  1928. tx_ring->last_tx_tso = 0;
  1929. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1930. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1931. }
  1932. /**
  1933. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1934. * @adapter: board private structure
  1935. **/
  1936. static void
  1937. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1938. {
  1939. int i;
  1940. for (i = 0; i < adapter->num_tx_queues; i++)
  1941. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1942. }
  1943. /**
  1944. * e1000_free_rx_resources - Free Rx Resources
  1945. * @adapter: board private structure
  1946. * @rx_ring: ring to clean the resources from
  1947. *
  1948. * Free all receive software resources
  1949. **/
  1950. static void
  1951. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1952. struct e1000_rx_ring *rx_ring)
  1953. {
  1954. struct pci_dev *pdev = adapter->pdev;
  1955. e1000_clean_rx_ring(adapter, rx_ring);
  1956. vfree(rx_ring->buffer_info);
  1957. rx_ring->buffer_info = NULL;
  1958. kfree(rx_ring->ps_page);
  1959. rx_ring->ps_page = NULL;
  1960. kfree(rx_ring->ps_page_dma);
  1961. rx_ring->ps_page_dma = NULL;
  1962. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1963. rx_ring->desc = NULL;
  1964. }
  1965. /**
  1966. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1967. * @adapter: board private structure
  1968. *
  1969. * Free all receive software resources
  1970. **/
  1971. void
  1972. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1973. {
  1974. int i;
  1975. for (i = 0; i < adapter->num_rx_queues; i++)
  1976. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1977. }
  1978. /**
  1979. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1980. * @adapter: board private structure
  1981. * @rx_ring: ring to free buffers from
  1982. **/
  1983. static void
  1984. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1985. struct e1000_rx_ring *rx_ring)
  1986. {
  1987. struct e1000_buffer *buffer_info;
  1988. struct e1000_ps_page *ps_page;
  1989. struct e1000_ps_page_dma *ps_page_dma;
  1990. struct pci_dev *pdev = adapter->pdev;
  1991. unsigned long size;
  1992. unsigned int i, j;
  1993. /* Free all the Rx ring sk_buffs */
  1994. for (i = 0; i < rx_ring->count; i++) {
  1995. buffer_info = &rx_ring->buffer_info[i];
  1996. if (buffer_info->skb) {
  1997. pci_unmap_single(pdev,
  1998. buffer_info->dma,
  1999. buffer_info->length,
  2000. PCI_DMA_FROMDEVICE);
  2001. dev_kfree_skb(buffer_info->skb);
  2002. buffer_info->skb = NULL;
  2003. }
  2004. ps_page = &rx_ring->ps_page[i];
  2005. ps_page_dma = &rx_ring->ps_page_dma[i];
  2006. for (j = 0; j < adapter->rx_ps_pages; j++) {
  2007. if (!ps_page->ps_page[j]) break;
  2008. pci_unmap_page(pdev,
  2009. ps_page_dma->ps_page_dma[j],
  2010. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  2011. ps_page_dma->ps_page_dma[j] = 0;
  2012. put_page(ps_page->ps_page[j]);
  2013. ps_page->ps_page[j] = NULL;
  2014. }
  2015. }
  2016. size = sizeof(struct e1000_buffer) * rx_ring->count;
  2017. memset(rx_ring->buffer_info, 0, size);
  2018. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  2019. memset(rx_ring->ps_page, 0, size);
  2020. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  2021. memset(rx_ring->ps_page_dma, 0, size);
  2022. /* Zero out the descriptor ring */
  2023. memset(rx_ring->desc, 0, rx_ring->size);
  2024. rx_ring->next_to_clean = 0;
  2025. rx_ring->next_to_use = 0;
  2026. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  2027. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  2028. }
  2029. /**
  2030. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  2031. * @adapter: board private structure
  2032. **/
  2033. static void
  2034. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  2035. {
  2036. int i;
  2037. for (i = 0; i < adapter->num_rx_queues; i++)
  2038. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  2039. }
  2040. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  2041. * and memory write and invalidate disabled for certain operations
  2042. */
  2043. static void
  2044. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  2045. {
  2046. struct net_device *netdev = adapter->netdev;
  2047. u32 rctl;
  2048. e1000_pci_clear_mwi(&adapter->hw);
  2049. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2050. rctl |= E1000_RCTL_RST;
  2051. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2052. E1000_WRITE_FLUSH(&adapter->hw);
  2053. mdelay(5);
  2054. if (netif_running(netdev))
  2055. e1000_clean_all_rx_rings(adapter);
  2056. }
  2057. static void
  2058. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  2059. {
  2060. struct net_device *netdev = adapter->netdev;
  2061. u32 rctl;
  2062. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2063. rctl &= ~E1000_RCTL_RST;
  2064. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2065. E1000_WRITE_FLUSH(&adapter->hw);
  2066. mdelay(5);
  2067. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  2068. e1000_pci_set_mwi(&adapter->hw);
  2069. if (netif_running(netdev)) {
  2070. /* No need to loop, because 82542 supports only 1 queue */
  2071. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  2072. e1000_configure_rx(adapter);
  2073. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  2074. }
  2075. }
  2076. /**
  2077. * e1000_set_mac - Change the Ethernet Address of the NIC
  2078. * @netdev: network interface device structure
  2079. * @p: pointer to an address structure
  2080. *
  2081. * Returns 0 on success, negative on failure
  2082. **/
  2083. static int
  2084. e1000_set_mac(struct net_device *netdev, void *p)
  2085. {
  2086. struct e1000_adapter *adapter = netdev_priv(netdev);
  2087. struct sockaddr *addr = p;
  2088. if (!is_valid_ether_addr(addr->sa_data))
  2089. return -EADDRNOTAVAIL;
  2090. /* 82542 2.0 needs to be in reset to write receive address registers */
  2091. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  2092. e1000_enter_82542_rst(adapter);
  2093. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  2094. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  2095. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2096. /* With 82571 controllers, LAA may be overwritten (with the default)
  2097. * due to controller reset from the other port. */
  2098. if (adapter->hw.mac_type == e1000_82571) {
  2099. /* activate the work around */
  2100. adapter->hw.laa_is_present = 1;
  2101. /* Hold a copy of the LAA in RAR[14] This is done so that
  2102. * between the time RAR[0] gets clobbered and the time it
  2103. * gets fixed (in e1000_watchdog), the actual LAA is in one
  2104. * of the RARs and no incoming packets directed to this port
  2105. * are dropped. Eventaully the LAA will be in RAR[0] and
  2106. * RAR[14] */
  2107. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  2108. E1000_RAR_ENTRIES - 1);
  2109. }
  2110. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  2111. e1000_leave_82542_rst(adapter);
  2112. return 0;
  2113. }
  2114. /**
  2115. * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
  2116. * @netdev: network interface device structure
  2117. *
  2118. * The set_rx_mode entry point is called whenever the unicast or multicast
  2119. * address lists or the network interface flags are updated. This routine is
  2120. * responsible for configuring the hardware for proper unicast, multicast,
  2121. * promiscuous mode, and all-multi behavior.
  2122. **/
  2123. static void
  2124. e1000_set_rx_mode(struct net_device *netdev)
  2125. {
  2126. struct e1000_adapter *adapter = netdev_priv(netdev);
  2127. struct e1000_hw *hw = &adapter->hw;
  2128. struct dev_addr_list *uc_ptr;
  2129. struct dev_addr_list *mc_ptr;
  2130. u32 rctl;
  2131. u32 hash_value;
  2132. int i, rar_entries = E1000_RAR_ENTRIES;
  2133. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  2134. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  2135. E1000_NUM_MTA_REGISTERS;
  2136. if (adapter->hw.mac_type == e1000_ich8lan)
  2137. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  2138. /* reserve RAR[14] for LAA over-write work-around */
  2139. if (adapter->hw.mac_type == e1000_82571)
  2140. rar_entries--;
  2141. /* Check for Promiscuous and All Multicast modes */
  2142. rctl = E1000_READ_REG(hw, RCTL);
  2143. if (netdev->flags & IFF_PROMISC) {
  2144. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  2145. } else if (netdev->flags & IFF_ALLMULTI) {
  2146. rctl |= E1000_RCTL_MPE;
  2147. } else {
  2148. rctl &= ~E1000_RCTL_MPE;
  2149. }
  2150. uc_ptr = NULL;
  2151. if (netdev->uc_count > rar_entries - 1) {
  2152. rctl |= E1000_RCTL_UPE;
  2153. } else if (!(netdev->flags & IFF_PROMISC)) {
  2154. rctl &= ~E1000_RCTL_UPE;
  2155. uc_ptr = netdev->uc_list;
  2156. }
  2157. E1000_WRITE_REG(hw, RCTL, rctl);
  2158. /* 82542 2.0 needs to be in reset to write receive address registers */
  2159. if (hw->mac_type == e1000_82542_rev2_0)
  2160. e1000_enter_82542_rst(adapter);
  2161. /* load the first 14 addresses into the exact filters 1-14. Unicast
  2162. * addresses take precedence to avoid disabling unicast filtering
  2163. * when possible.
  2164. *
  2165. * RAR 0 is used for the station MAC adddress
  2166. * if there are not 14 addresses, go ahead and clear the filters
  2167. * -- with 82571 controllers only 0-13 entries are filled here
  2168. */
  2169. mc_ptr = netdev->mc_list;
  2170. for (i = 1; i < rar_entries; i++) {
  2171. if (uc_ptr) {
  2172. e1000_rar_set(hw, uc_ptr->da_addr, i);
  2173. uc_ptr = uc_ptr->next;
  2174. } else if (mc_ptr) {
  2175. e1000_rar_set(hw, mc_ptr->da_addr, i);
  2176. mc_ptr = mc_ptr->next;
  2177. } else {
  2178. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  2179. E1000_WRITE_FLUSH(hw);
  2180. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  2181. E1000_WRITE_FLUSH(hw);
  2182. }
  2183. }
  2184. WARN_ON(uc_ptr != NULL);
  2185. /* clear the old settings from the multicast hash table */
  2186. for (i = 0; i < mta_reg_count; i++) {
  2187. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  2188. E1000_WRITE_FLUSH(hw);
  2189. }
  2190. /* load any remaining addresses into the hash table */
  2191. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  2192. hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
  2193. e1000_mta_set(hw, hash_value);
  2194. }
  2195. if (hw->mac_type == e1000_82542_rev2_0)
  2196. e1000_leave_82542_rst(adapter);
  2197. }
  2198. /* Need to wait a few seconds after link up to get diagnostic information from
  2199. * the phy */
  2200. static void
  2201. e1000_update_phy_info(unsigned long data)
  2202. {
  2203. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2204. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  2205. }
  2206. /**
  2207. * e1000_82547_tx_fifo_stall - Timer Call-back
  2208. * @data: pointer to adapter cast into an unsigned long
  2209. **/
  2210. static void
  2211. e1000_82547_tx_fifo_stall(unsigned long data)
  2212. {
  2213. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2214. struct net_device *netdev = adapter->netdev;
  2215. u32 tctl;
  2216. if (atomic_read(&adapter->tx_fifo_stall)) {
  2217. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  2218. E1000_READ_REG(&adapter->hw, TDH)) &&
  2219. (E1000_READ_REG(&adapter->hw, TDFT) ==
  2220. E1000_READ_REG(&adapter->hw, TDFH)) &&
  2221. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  2222. E1000_READ_REG(&adapter->hw, TDFHS))) {
  2223. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2224. E1000_WRITE_REG(&adapter->hw, TCTL,
  2225. tctl & ~E1000_TCTL_EN);
  2226. E1000_WRITE_REG(&adapter->hw, TDFT,
  2227. adapter->tx_head_addr);
  2228. E1000_WRITE_REG(&adapter->hw, TDFH,
  2229. adapter->tx_head_addr);
  2230. E1000_WRITE_REG(&adapter->hw, TDFTS,
  2231. adapter->tx_head_addr);
  2232. E1000_WRITE_REG(&adapter->hw, TDFHS,
  2233. adapter->tx_head_addr);
  2234. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2235. E1000_WRITE_FLUSH(&adapter->hw);
  2236. adapter->tx_fifo_head = 0;
  2237. atomic_set(&adapter->tx_fifo_stall, 0);
  2238. netif_wake_queue(netdev);
  2239. } else {
  2240. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2241. }
  2242. }
  2243. }
  2244. /**
  2245. * e1000_watchdog - Timer Call-back
  2246. * @data: pointer to adapter cast into an unsigned long
  2247. **/
  2248. static void
  2249. e1000_watchdog(unsigned long data)
  2250. {
  2251. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2252. struct net_device *netdev = adapter->netdev;
  2253. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2254. u32 link, tctl;
  2255. s32 ret_val;
  2256. ret_val = e1000_check_for_link(&adapter->hw);
  2257. if ((ret_val == E1000_ERR_PHY) &&
  2258. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  2259. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  2260. /* See e1000_kumeran_lock_loss_workaround() */
  2261. DPRINTK(LINK, INFO,
  2262. "Gigabit has been disabled, downgrading speed\n");
  2263. }
  2264. if (adapter->hw.mac_type == e1000_82573) {
  2265. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2266. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2267. e1000_update_mng_vlan(adapter);
  2268. }
  2269. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2270. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2271. link = !adapter->hw.serdes_link_down;
  2272. else
  2273. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2274. if (link) {
  2275. if (!netif_carrier_ok(netdev)) {
  2276. u32 ctrl;
  2277. bool txb2b = true;
  2278. e1000_get_speed_and_duplex(&adapter->hw,
  2279. &adapter->link_speed,
  2280. &adapter->link_duplex);
  2281. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2282. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
  2283. "Flow Control: %s\n",
  2284. adapter->link_speed,
  2285. adapter->link_duplex == FULL_DUPLEX ?
  2286. "Full Duplex" : "Half Duplex",
  2287. ((ctrl & E1000_CTRL_TFCE) && (ctrl &
  2288. E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
  2289. E1000_CTRL_RFCE) ? "RX" : ((ctrl &
  2290. E1000_CTRL_TFCE) ? "TX" : "None" )));
  2291. /* tweak tx_queue_len according to speed/duplex
  2292. * and adjust the timeout factor */
  2293. netdev->tx_queue_len = adapter->tx_queue_len;
  2294. adapter->tx_timeout_factor = 1;
  2295. switch (adapter->link_speed) {
  2296. case SPEED_10:
  2297. txb2b = false;
  2298. netdev->tx_queue_len = 10;
  2299. adapter->tx_timeout_factor = 8;
  2300. break;
  2301. case SPEED_100:
  2302. txb2b = false;
  2303. netdev->tx_queue_len = 100;
  2304. /* maybe add some timeout factor ? */
  2305. break;
  2306. }
  2307. if ((adapter->hw.mac_type == e1000_82571 ||
  2308. adapter->hw.mac_type == e1000_82572) &&
  2309. !txb2b) {
  2310. u32 tarc0;
  2311. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2312. tarc0 &= ~(1 << 21);
  2313. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2314. }
  2315. /* disable TSO for pcie and 10/100 speeds, to avoid
  2316. * some hardware issues */
  2317. if (!adapter->tso_force &&
  2318. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2319. switch (adapter->link_speed) {
  2320. case SPEED_10:
  2321. case SPEED_100:
  2322. DPRINTK(PROBE,INFO,
  2323. "10/100 speed: disabling TSO\n");
  2324. netdev->features &= ~NETIF_F_TSO;
  2325. netdev->features &= ~NETIF_F_TSO6;
  2326. break;
  2327. case SPEED_1000:
  2328. netdev->features |= NETIF_F_TSO;
  2329. netdev->features |= NETIF_F_TSO6;
  2330. break;
  2331. default:
  2332. /* oops */
  2333. break;
  2334. }
  2335. }
  2336. /* enable transmits in the hardware, need to do this
  2337. * after setting TARC0 */
  2338. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2339. tctl |= E1000_TCTL_EN;
  2340. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2341. netif_carrier_on(netdev);
  2342. netif_wake_queue(netdev);
  2343. mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
  2344. adapter->smartspeed = 0;
  2345. } else {
  2346. /* make sure the receive unit is started */
  2347. if (adapter->hw.rx_needs_kicking) {
  2348. struct e1000_hw *hw = &adapter->hw;
  2349. u32 rctl = E1000_READ_REG(hw, RCTL);
  2350. E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
  2351. }
  2352. }
  2353. } else {
  2354. if (netif_carrier_ok(netdev)) {
  2355. adapter->link_speed = 0;
  2356. adapter->link_duplex = 0;
  2357. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2358. netif_carrier_off(netdev);
  2359. netif_stop_queue(netdev);
  2360. mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
  2361. /* 80003ES2LAN workaround--
  2362. * For packet buffer work-around on link down event;
  2363. * disable receives in the ISR and
  2364. * reset device here in the watchdog
  2365. */
  2366. if (adapter->hw.mac_type == e1000_80003es2lan)
  2367. /* reset device */
  2368. schedule_work(&adapter->reset_task);
  2369. }
  2370. e1000_smartspeed(adapter);
  2371. }
  2372. e1000_update_stats(adapter);
  2373. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2374. adapter->tpt_old = adapter->stats.tpt;
  2375. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2376. adapter->colc_old = adapter->stats.colc;
  2377. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2378. adapter->gorcl_old = adapter->stats.gorcl;
  2379. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2380. adapter->gotcl_old = adapter->stats.gotcl;
  2381. e1000_update_adaptive(&adapter->hw);
  2382. if (!netif_carrier_ok(netdev)) {
  2383. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2384. /* We've lost link, so the controller stops DMA,
  2385. * but we've got queued Tx work that's never going
  2386. * to get done, so reset controller to flush Tx.
  2387. * (Do the reset outside of interrupt context). */
  2388. adapter->tx_timeout_count++;
  2389. schedule_work(&adapter->reset_task);
  2390. }
  2391. }
  2392. /* Cause software interrupt to ensure rx ring is cleaned */
  2393. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2394. /* Force detection of hung controller every watchdog period */
  2395. adapter->detect_tx_hung = true;
  2396. /* With 82571 controllers, LAA may be overwritten due to controller
  2397. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2398. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2399. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2400. /* Reset the timer */
  2401. mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
  2402. }
  2403. enum latency_range {
  2404. lowest_latency = 0,
  2405. low_latency = 1,
  2406. bulk_latency = 2,
  2407. latency_invalid = 255
  2408. };
  2409. /**
  2410. * e1000_update_itr - update the dynamic ITR value based on statistics
  2411. * Stores a new ITR value based on packets and byte
  2412. * counts during the last interrupt. The advantage of per interrupt
  2413. * computation is faster updates and more accurate ITR for the current
  2414. * traffic pattern. Constants in this function were computed
  2415. * based on theoretical maximum wire speed and thresholds were set based
  2416. * on testing data as well as attempting to minimize response time
  2417. * while increasing bulk throughput.
  2418. * this functionality is controlled by the InterruptThrottleRate module
  2419. * parameter (see e1000_param.c)
  2420. * @adapter: pointer to adapter
  2421. * @itr_setting: current adapter->itr
  2422. * @packets: the number of packets during this measurement interval
  2423. * @bytes: the number of bytes during this measurement interval
  2424. **/
  2425. static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
  2426. u16 itr_setting,
  2427. int packets,
  2428. int bytes)
  2429. {
  2430. unsigned int retval = itr_setting;
  2431. struct e1000_hw *hw = &adapter->hw;
  2432. if (unlikely(hw->mac_type < e1000_82540))
  2433. goto update_itr_done;
  2434. if (packets == 0)
  2435. goto update_itr_done;
  2436. switch (itr_setting) {
  2437. case lowest_latency:
  2438. /* jumbo frames get bulk treatment*/
  2439. if (bytes/packets > 8000)
  2440. retval = bulk_latency;
  2441. else if ((packets < 5) && (bytes > 512))
  2442. retval = low_latency;
  2443. break;
  2444. case low_latency: /* 50 usec aka 20000 ints/s */
  2445. if (bytes > 10000) {
  2446. /* jumbo frames need bulk latency setting */
  2447. if (bytes/packets > 8000)
  2448. retval = bulk_latency;
  2449. else if ((packets < 10) || ((bytes/packets) > 1200))
  2450. retval = bulk_latency;
  2451. else if ((packets > 35))
  2452. retval = lowest_latency;
  2453. } else if (bytes/packets > 2000)
  2454. retval = bulk_latency;
  2455. else if (packets <= 2 && bytes < 512)
  2456. retval = lowest_latency;
  2457. break;
  2458. case bulk_latency: /* 250 usec aka 4000 ints/s */
  2459. if (bytes > 25000) {
  2460. if (packets > 35)
  2461. retval = low_latency;
  2462. } else if (bytes < 6000) {
  2463. retval = low_latency;
  2464. }
  2465. break;
  2466. }
  2467. update_itr_done:
  2468. return retval;
  2469. }
  2470. static void e1000_set_itr(struct e1000_adapter *adapter)
  2471. {
  2472. struct e1000_hw *hw = &adapter->hw;
  2473. u16 current_itr;
  2474. u32 new_itr = adapter->itr;
  2475. if (unlikely(hw->mac_type < e1000_82540))
  2476. return;
  2477. /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
  2478. if (unlikely(adapter->link_speed != SPEED_1000)) {
  2479. current_itr = 0;
  2480. new_itr = 4000;
  2481. goto set_itr_now;
  2482. }
  2483. adapter->tx_itr = e1000_update_itr(adapter,
  2484. adapter->tx_itr,
  2485. adapter->total_tx_packets,
  2486. adapter->total_tx_bytes);
  2487. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2488. if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
  2489. adapter->tx_itr = low_latency;
  2490. adapter->rx_itr = e1000_update_itr(adapter,
  2491. adapter->rx_itr,
  2492. adapter->total_rx_packets,
  2493. adapter->total_rx_bytes);
  2494. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2495. if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
  2496. adapter->rx_itr = low_latency;
  2497. current_itr = max(adapter->rx_itr, adapter->tx_itr);
  2498. switch (current_itr) {
  2499. /* counts and packets in update_itr are dependent on these numbers */
  2500. case lowest_latency:
  2501. new_itr = 70000;
  2502. break;
  2503. case low_latency:
  2504. new_itr = 20000; /* aka hwitr = ~200 */
  2505. break;
  2506. case bulk_latency:
  2507. new_itr = 4000;
  2508. break;
  2509. default:
  2510. break;
  2511. }
  2512. set_itr_now:
  2513. if (new_itr != adapter->itr) {
  2514. /* this attempts to bias the interrupt rate towards Bulk
  2515. * by adding intermediate steps when interrupt rate is
  2516. * increasing */
  2517. new_itr = new_itr > adapter->itr ?
  2518. min(adapter->itr + (new_itr >> 2), new_itr) :
  2519. new_itr;
  2520. adapter->itr = new_itr;
  2521. E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
  2522. }
  2523. return;
  2524. }
  2525. #define E1000_TX_FLAGS_CSUM 0x00000001
  2526. #define E1000_TX_FLAGS_VLAN 0x00000002
  2527. #define E1000_TX_FLAGS_TSO 0x00000004
  2528. #define E1000_TX_FLAGS_IPV4 0x00000008
  2529. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2530. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2531. static int
  2532. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2533. struct sk_buff *skb)
  2534. {
  2535. struct e1000_context_desc *context_desc;
  2536. struct e1000_buffer *buffer_info;
  2537. unsigned int i;
  2538. u32 cmd_length = 0;
  2539. u16 ipcse = 0, tucse, mss;
  2540. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  2541. int err;
  2542. if (skb_is_gso(skb)) {
  2543. if (skb_header_cloned(skb)) {
  2544. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2545. if (err)
  2546. return err;
  2547. }
  2548. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2549. mss = skb_shinfo(skb)->gso_size;
  2550. if (skb->protocol == htons(ETH_P_IP)) {
  2551. struct iphdr *iph = ip_hdr(skb);
  2552. iph->tot_len = 0;
  2553. iph->check = 0;
  2554. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2555. iph->daddr, 0,
  2556. IPPROTO_TCP,
  2557. 0);
  2558. cmd_length = E1000_TXD_CMD_IP;
  2559. ipcse = skb_transport_offset(skb) - 1;
  2560. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2561. ipv6_hdr(skb)->payload_len = 0;
  2562. tcp_hdr(skb)->check =
  2563. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2564. &ipv6_hdr(skb)->daddr,
  2565. 0, IPPROTO_TCP, 0);
  2566. ipcse = 0;
  2567. }
  2568. ipcss = skb_network_offset(skb);
  2569. ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
  2570. tucss = skb_transport_offset(skb);
  2571. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  2572. tucse = 0;
  2573. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2574. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2575. i = tx_ring->next_to_use;
  2576. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2577. buffer_info = &tx_ring->buffer_info[i];
  2578. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2579. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2580. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2581. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2582. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2583. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2584. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2585. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2586. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2587. buffer_info->time_stamp = jiffies;
  2588. buffer_info->next_to_watch = i;
  2589. if (++i == tx_ring->count) i = 0;
  2590. tx_ring->next_to_use = i;
  2591. return true;
  2592. }
  2593. return false;
  2594. }
  2595. static bool
  2596. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2597. struct sk_buff *skb)
  2598. {
  2599. struct e1000_context_desc *context_desc;
  2600. struct e1000_buffer *buffer_info;
  2601. unsigned int i;
  2602. u8 css;
  2603. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  2604. css = skb_transport_offset(skb);
  2605. i = tx_ring->next_to_use;
  2606. buffer_info = &tx_ring->buffer_info[i];
  2607. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2608. context_desc->lower_setup.ip_config = 0;
  2609. context_desc->upper_setup.tcp_fields.tucss = css;
  2610. context_desc->upper_setup.tcp_fields.tucso =
  2611. css + skb->csum_offset;
  2612. context_desc->upper_setup.tcp_fields.tucse = 0;
  2613. context_desc->tcp_seg_setup.data = 0;
  2614. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2615. buffer_info->time_stamp = jiffies;
  2616. buffer_info->next_to_watch = i;
  2617. if (unlikely(++i == tx_ring->count)) i = 0;
  2618. tx_ring->next_to_use = i;
  2619. return true;
  2620. }
  2621. return false;
  2622. }
  2623. #define E1000_MAX_TXD_PWR 12
  2624. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2625. static int
  2626. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2627. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2628. unsigned int nr_frags, unsigned int mss)
  2629. {
  2630. struct e1000_buffer *buffer_info;
  2631. unsigned int len = skb->len;
  2632. unsigned int offset = 0, size, count = 0, i;
  2633. unsigned int f;
  2634. len -= skb->data_len;
  2635. i = tx_ring->next_to_use;
  2636. while (len) {
  2637. buffer_info = &tx_ring->buffer_info[i];
  2638. size = min(len, max_per_txd);
  2639. /* Workaround for Controller erratum --
  2640. * descriptor for non-tso packet in a linear SKB that follows a
  2641. * tso gets written back prematurely before the data is fully
  2642. * DMA'd to the controller */
  2643. if (!skb->data_len && tx_ring->last_tx_tso &&
  2644. !skb_is_gso(skb)) {
  2645. tx_ring->last_tx_tso = 0;
  2646. size -= 4;
  2647. }
  2648. /* Workaround for premature desc write-backs
  2649. * in TSO mode. Append 4-byte sentinel desc */
  2650. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2651. size -= 4;
  2652. /* work-around for errata 10 and it applies
  2653. * to all controllers in PCI-X mode
  2654. * The fix is to make sure that the first descriptor of a
  2655. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2656. */
  2657. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2658. (size > 2015) && count == 0))
  2659. size = 2015;
  2660. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2661. * terminating buffers within evenly-aligned dwords. */
  2662. if (unlikely(adapter->pcix_82544 &&
  2663. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2664. size > 4))
  2665. size -= 4;
  2666. buffer_info->length = size;
  2667. buffer_info->dma =
  2668. pci_map_single(adapter->pdev,
  2669. skb->data + offset,
  2670. size,
  2671. PCI_DMA_TODEVICE);
  2672. buffer_info->time_stamp = jiffies;
  2673. buffer_info->next_to_watch = i;
  2674. len -= size;
  2675. offset += size;
  2676. count++;
  2677. if (unlikely(++i == tx_ring->count)) i = 0;
  2678. }
  2679. for (f = 0; f < nr_frags; f++) {
  2680. struct skb_frag_struct *frag;
  2681. frag = &skb_shinfo(skb)->frags[f];
  2682. len = frag->size;
  2683. offset = frag->page_offset;
  2684. while (len) {
  2685. buffer_info = &tx_ring->buffer_info[i];
  2686. size = min(len, max_per_txd);
  2687. /* Workaround for premature desc write-backs
  2688. * in TSO mode. Append 4-byte sentinel desc */
  2689. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2690. size -= 4;
  2691. /* Workaround for potential 82544 hang in PCI-X.
  2692. * Avoid terminating buffers within evenly-aligned
  2693. * dwords. */
  2694. if (unlikely(adapter->pcix_82544 &&
  2695. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2696. size > 4))
  2697. size -= 4;
  2698. buffer_info->length = size;
  2699. buffer_info->dma =
  2700. pci_map_page(adapter->pdev,
  2701. frag->page,
  2702. offset,
  2703. size,
  2704. PCI_DMA_TODEVICE);
  2705. buffer_info->time_stamp = jiffies;
  2706. buffer_info->next_to_watch = i;
  2707. len -= size;
  2708. offset += size;
  2709. count++;
  2710. if (unlikely(++i == tx_ring->count)) i = 0;
  2711. }
  2712. }
  2713. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2714. tx_ring->buffer_info[i].skb = skb;
  2715. tx_ring->buffer_info[first].next_to_watch = i;
  2716. return count;
  2717. }
  2718. static void
  2719. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2720. int tx_flags, int count)
  2721. {
  2722. struct e1000_tx_desc *tx_desc = NULL;
  2723. struct e1000_buffer *buffer_info;
  2724. u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2725. unsigned int i;
  2726. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2727. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2728. E1000_TXD_CMD_TSE;
  2729. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2730. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2731. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2732. }
  2733. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2734. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2735. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2736. }
  2737. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2738. txd_lower |= E1000_TXD_CMD_VLE;
  2739. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2740. }
  2741. i = tx_ring->next_to_use;
  2742. while (count--) {
  2743. buffer_info = &tx_ring->buffer_info[i];
  2744. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2745. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2746. tx_desc->lower.data =
  2747. cpu_to_le32(txd_lower | buffer_info->length);
  2748. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2749. if (unlikely(++i == tx_ring->count)) i = 0;
  2750. }
  2751. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2752. /* Force memory writes to complete before letting h/w
  2753. * know there are new descriptors to fetch. (Only
  2754. * applicable for weak-ordered memory model archs,
  2755. * such as IA-64). */
  2756. wmb();
  2757. tx_ring->next_to_use = i;
  2758. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2759. /* we need this if more than one processor can write to our tail
  2760. * at a time, it syncronizes IO on IA64/Altix systems */
  2761. mmiowb();
  2762. }
  2763. /**
  2764. * 82547 workaround to avoid controller hang in half-duplex environment.
  2765. * The workaround is to avoid queuing a large packet that would span
  2766. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2767. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2768. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2769. * to the beginning of the Tx FIFO.
  2770. **/
  2771. #define E1000_FIFO_HDR 0x10
  2772. #define E1000_82547_PAD_LEN 0x3E0
  2773. static int
  2774. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2775. {
  2776. u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2777. u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2778. skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
  2779. if (adapter->link_duplex != HALF_DUPLEX)
  2780. goto no_fifo_stall_required;
  2781. if (atomic_read(&adapter->tx_fifo_stall))
  2782. return 1;
  2783. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2784. atomic_set(&adapter->tx_fifo_stall, 1);
  2785. return 1;
  2786. }
  2787. no_fifo_stall_required:
  2788. adapter->tx_fifo_head += skb_fifo_len;
  2789. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2790. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2791. return 0;
  2792. }
  2793. #define MINIMUM_DHCP_PACKET_SIZE 282
  2794. static int
  2795. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2796. {
  2797. struct e1000_hw *hw = &adapter->hw;
  2798. u16 length, offset;
  2799. if (vlan_tx_tag_present(skb)) {
  2800. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2801. ( adapter->hw.mng_cookie.status &
  2802. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2803. return 0;
  2804. }
  2805. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2806. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2807. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2808. const struct iphdr *ip =
  2809. (struct iphdr *)((u8 *)skb->data+14);
  2810. if (IPPROTO_UDP == ip->protocol) {
  2811. struct udphdr *udp =
  2812. (struct udphdr *)((u8 *)ip +
  2813. (ip->ihl << 2));
  2814. if (ntohs(udp->dest) == 67) {
  2815. offset = (u8 *)udp + 8 - skb->data;
  2816. length = skb->len - offset;
  2817. return e1000_mng_write_dhcp_info(hw,
  2818. (u8 *)udp + 8,
  2819. length);
  2820. }
  2821. }
  2822. }
  2823. }
  2824. return 0;
  2825. }
  2826. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2827. {
  2828. struct e1000_adapter *adapter = netdev_priv(netdev);
  2829. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2830. netif_stop_queue(netdev);
  2831. /* Herbert's original patch had:
  2832. * smp_mb__after_netif_stop_queue();
  2833. * but since that doesn't exist yet, just open code it. */
  2834. smp_mb();
  2835. /* We need to check again in a case another CPU has just
  2836. * made room available. */
  2837. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2838. return -EBUSY;
  2839. /* A reprieve! */
  2840. netif_start_queue(netdev);
  2841. ++adapter->restart_queue;
  2842. return 0;
  2843. }
  2844. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2845. struct e1000_tx_ring *tx_ring, int size)
  2846. {
  2847. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2848. return 0;
  2849. return __e1000_maybe_stop_tx(netdev, size);
  2850. }
  2851. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2852. static int
  2853. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2854. {
  2855. struct e1000_adapter *adapter = netdev_priv(netdev);
  2856. struct e1000_tx_ring *tx_ring;
  2857. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2858. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2859. unsigned int tx_flags = 0;
  2860. unsigned int len = skb->len - skb->data_len;
  2861. unsigned long flags;
  2862. unsigned int nr_frags;
  2863. unsigned int mss;
  2864. int count = 0;
  2865. int tso;
  2866. unsigned int f;
  2867. /* This goes back to the question of how to logically map a tx queue
  2868. * to a flow. Right now, performance is impacted slightly negatively
  2869. * if using multiple tx queues. If the stack breaks away from a
  2870. * single qdisc implementation, we can look at this again. */
  2871. tx_ring = adapter->tx_ring;
  2872. if (unlikely(skb->len <= 0)) {
  2873. dev_kfree_skb_any(skb);
  2874. return NETDEV_TX_OK;
  2875. }
  2876. /* 82571 and newer doesn't need the workaround that limited descriptor
  2877. * length to 4kB */
  2878. if (adapter->hw.mac_type >= e1000_82571)
  2879. max_per_txd = 8192;
  2880. mss = skb_shinfo(skb)->gso_size;
  2881. /* The controller does a simple calculation to
  2882. * make sure there is enough room in the FIFO before
  2883. * initiating the DMA for each buffer. The calc is:
  2884. * 4 = ceil(buffer len/mss). To make sure we don't
  2885. * overrun the FIFO, adjust the max buffer len if mss
  2886. * drops. */
  2887. if (mss) {
  2888. u8 hdr_len;
  2889. max_per_txd = min(mss << 2, max_per_txd);
  2890. max_txd_pwr = fls(max_per_txd) - 1;
  2891. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2892. * points to just header, pull a few bytes of payload from
  2893. * frags into skb->data */
  2894. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2895. if (skb->data_len && hdr_len == len) {
  2896. switch (adapter->hw.mac_type) {
  2897. unsigned int pull_size;
  2898. case e1000_82544:
  2899. /* Make sure we have room to chop off 4 bytes,
  2900. * and that the end alignment will work out to
  2901. * this hardware's requirements
  2902. * NOTE: this is a TSO only workaround
  2903. * if end byte alignment not correct move us
  2904. * into the next dword */
  2905. if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
  2906. break;
  2907. /* fall through */
  2908. case e1000_82571:
  2909. case e1000_82572:
  2910. case e1000_82573:
  2911. case e1000_ich8lan:
  2912. pull_size = min((unsigned int)4, skb->data_len);
  2913. if (!__pskb_pull_tail(skb, pull_size)) {
  2914. DPRINTK(DRV, ERR,
  2915. "__pskb_pull_tail failed.\n");
  2916. dev_kfree_skb_any(skb);
  2917. return NETDEV_TX_OK;
  2918. }
  2919. len = skb->len - skb->data_len;
  2920. break;
  2921. default:
  2922. /* do nothing */
  2923. break;
  2924. }
  2925. }
  2926. }
  2927. /* reserve a descriptor for the offload context */
  2928. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2929. count++;
  2930. count++;
  2931. /* Controller Erratum workaround */
  2932. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2933. count++;
  2934. count += TXD_USE_COUNT(len, max_txd_pwr);
  2935. if (adapter->pcix_82544)
  2936. count++;
  2937. /* work-around for errata 10 and it applies to all controllers
  2938. * in PCI-X mode, so add one more descriptor to the count
  2939. */
  2940. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2941. (len > 2015)))
  2942. count++;
  2943. nr_frags = skb_shinfo(skb)->nr_frags;
  2944. for (f = 0; f < nr_frags; f++)
  2945. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2946. max_txd_pwr);
  2947. if (adapter->pcix_82544)
  2948. count += nr_frags;
  2949. if (adapter->hw.tx_pkt_filtering &&
  2950. (adapter->hw.mac_type == e1000_82573))
  2951. e1000_transfer_dhcp_info(adapter, skb);
  2952. if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
  2953. /* Collision - tell upper layer to requeue */
  2954. return NETDEV_TX_LOCKED;
  2955. /* need: count + 2 desc gap to keep tail from touching
  2956. * head, otherwise try next time */
  2957. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
  2958. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2959. return NETDEV_TX_BUSY;
  2960. }
  2961. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2962. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2963. netif_stop_queue(netdev);
  2964. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2965. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2966. return NETDEV_TX_BUSY;
  2967. }
  2968. }
  2969. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2970. tx_flags |= E1000_TX_FLAGS_VLAN;
  2971. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2972. }
  2973. first = tx_ring->next_to_use;
  2974. tso = e1000_tso(adapter, tx_ring, skb);
  2975. if (tso < 0) {
  2976. dev_kfree_skb_any(skb);
  2977. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2978. return NETDEV_TX_OK;
  2979. }
  2980. if (likely(tso)) {
  2981. tx_ring->last_tx_tso = 1;
  2982. tx_flags |= E1000_TX_FLAGS_TSO;
  2983. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2984. tx_flags |= E1000_TX_FLAGS_CSUM;
  2985. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2986. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2987. * no longer assume, we must. */
  2988. if (likely(skb->protocol == htons(ETH_P_IP)))
  2989. tx_flags |= E1000_TX_FLAGS_IPV4;
  2990. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2991. e1000_tx_map(adapter, tx_ring, skb, first,
  2992. max_per_txd, nr_frags, mss));
  2993. netdev->trans_start = jiffies;
  2994. /* Make sure there is space in the ring for the next send. */
  2995. e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  2996. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2997. return NETDEV_TX_OK;
  2998. }
  2999. /**
  3000. * e1000_tx_timeout - Respond to a Tx Hang
  3001. * @netdev: network interface device structure
  3002. **/
  3003. static void
  3004. e1000_tx_timeout(struct net_device *netdev)
  3005. {
  3006. struct e1000_adapter *adapter = netdev_priv(netdev);
  3007. /* Do the reset outside of interrupt context */
  3008. adapter->tx_timeout_count++;
  3009. schedule_work(&adapter->reset_task);
  3010. }
  3011. static void
  3012. e1000_reset_task(struct work_struct *work)
  3013. {
  3014. struct e1000_adapter *adapter =
  3015. container_of(work, struct e1000_adapter, reset_task);
  3016. e1000_reinit_locked(adapter);
  3017. }
  3018. /**
  3019. * e1000_get_stats - Get System Network Statistics
  3020. * @netdev: network interface device structure
  3021. *
  3022. * Returns the address of the device statistics structure.
  3023. * The statistics are actually updated from the timer callback.
  3024. **/
  3025. static struct net_device_stats *
  3026. e1000_get_stats(struct net_device *netdev)
  3027. {
  3028. struct e1000_adapter *adapter = netdev_priv(netdev);
  3029. /* only return the current stats */
  3030. return &adapter->net_stats;
  3031. }
  3032. /**
  3033. * e1000_change_mtu - Change the Maximum Transfer Unit
  3034. * @netdev: network interface device structure
  3035. * @new_mtu: new value for maximum frame size
  3036. *
  3037. * Returns 0 on success, negative on failure
  3038. **/
  3039. static int
  3040. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  3041. {
  3042. struct e1000_adapter *adapter = netdev_priv(netdev);
  3043. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  3044. u16 eeprom_data = 0;
  3045. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  3046. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  3047. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  3048. return -EINVAL;
  3049. }
  3050. /* Adapter-specific max frame size limits. */
  3051. switch (adapter->hw.mac_type) {
  3052. case e1000_undefined ... e1000_82542_rev2_1:
  3053. case e1000_ich8lan:
  3054. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  3055. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  3056. return -EINVAL;
  3057. }
  3058. break;
  3059. case e1000_82573:
  3060. /* Jumbo Frames not supported if:
  3061. * - this is not an 82573L device
  3062. * - ASPM is enabled in any way (0x1A bits 3:2) */
  3063. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  3064. &eeprom_data);
  3065. if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
  3066. (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
  3067. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  3068. DPRINTK(PROBE, ERR,
  3069. "Jumbo Frames not supported.\n");
  3070. return -EINVAL;
  3071. }
  3072. break;
  3073. }
  3074. /* ERT will be enabled later to enable wire speed receives */
  3075. /* fall through to get support */
  3076. case e1000_82571:
  3077. case e1000_82572:
  3078. case e1000_80003es2lan:
  3079. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  3080. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  3081. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  3082. return -EINVAL;
  3083. }
  3084. break;
  3085. default:
  3086. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  3087. break;
  3088. }
  3089. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  3090. * means we reserve 2 more, this pushes us to allocate from the next
  3091. * larger slab size
  3092. * i.e. RXBUFFER_2048 --> size-4096 slab */
  3093. if (max_frame <= E1000_RXBUFFER_256)
  3094. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  3095. else if (max_frame <= E1000_RXBUFFER_512)
  3096. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  3097. else if (max_frame <= E1000_RXBUFFER_1024)
  3098. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  3099. else if (max_frame <= E1000_RXBUFFER_2048)
  3100. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  3101. else if (max_frame <= E1000_RXBUFFER_4096)
  3102. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  3103. else if (max_frame <= E1000_RXBUFFER_8192)
  3104. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  3105. else if (max_frame <= E1000_RXBUFFER_16384)
  3106. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  3107. /* adjust allocation if LPE protects us, and we aren't using SBP */
  3108. if (!adapter->hw.tbi_compatibility_on &&
  3109. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  3110. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  3111. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  3112. netdev->mtu = new_mtu;
  3113. adapter->hw.max_frame_size = max_frame;
  3114. if (netif_running(netdev))
  3115. e1000_reinit_locked(adapter);
  3116. return 0;
  3117. }
  3118. /**
  3119. * e1000_update_stats - Update the board statistics counters
  3120. * @adapter: board private structure
  3121. **/
  3122. void
  3123. e1000_update_stats(struct e1000_adapter *adapter)
  3124. {
  3125. struct e1000_hw *hw = &adapter->hw;
  3126. struct pci_dev *pdev = adapter->pdev;
  3127. unsigned long flags;
  3128. u16 phy_tmp;
  3129. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  3130. /*
  3131. * Prevent stats update while adapter is being reset, or if the pci
  3132. * connection is down.
  3133. */
  3134. if (adapter->link_speed == 0)
  3135. return;
  3136. if (pci_channel_offline(pdev))
  3137. return;
  3138. spin_lock_irqsave(&adapter->stats_lock, flags);
  3139. /* these counters are modified from e1000_tbi_adjust_stats,
  3140. * called from the interrupt context, so they must only
  3141. * be written while holding adapter->stats_lock
  3142. */
  3143. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  3144. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  3145. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  3146. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  3147. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  3148. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  3149. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  3150. if (adapter->hw.mac_type != e1000_ich8lan) {
  3151. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  3152. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  3153. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  3154. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  3155. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  3156. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  3157. }
  3158. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  3159. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  3160. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  3161. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  3162. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  3163. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  3164. adapter->stats.dc += E1000_READ_REG(hw, DC);
  3165. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  3166. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  3167. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  3168. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  3169. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  3170. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  3171. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  3172. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  3173. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  3174. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  3175. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  3176. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  3177. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  3178. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  3179. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  3180. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  3181. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  3182. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  3183. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  3184. if (adapter->hw.mac_type != e1000_ich8lan) {
  3185. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  3186. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  3187. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  3188. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  3189. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  3190. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  3191. }
  3192. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  3193. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  3194. /* used for adaptive IFS */
  3195. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  3196. adapter->stats.tpt += hw->tx_packet_delta;
  3197. hw->collision_delta = E1000_READ_REG(hw, COLC);
  3198. adapter->stats.colc += hw->collision_delta;
  3199. if (hw->mac_type >= e1000_82543) {
  3200. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  3201. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  3202. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  3203. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  3204. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  3205. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  3206. }
  3207. if (hw->mac_type > e1000_82547_rev_2) {
  3208. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  3209. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  3210. if (adapter->hw.mac_type != e1000_ich8lan) {
  3211. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  3212. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  3213. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  3214. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  3215. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  3216. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  3217. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  3218. }
  3219. }
  3220. /* Fill out the OS statistics structure */
  3221. adapter->net_stats.multicast = adapter->stats.mprc;
  3222. adapter->net_stats.collisions = adapter->stats.colc;
  3223. /* Rx Errors */
  3224. /* RLEC on some newer hardware can be incorrect so build
  3225. * our own version based on RUC and ROC */
  3226. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  3227. adapter->stats.crcerrs + adapter->stats.algnerrc +
  3228. adapter->stats.ruc + adapter->stats.roc +
  3229. adapter->stats.cexterr;
  3230. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  3231. adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
  3232. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  3233. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  3234. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  3235. /* Tx Errors */
  3236. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  3237. adapter->net_stats.tx_errors = adapter->stats.txerrc;
  3238. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  3239. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  3240. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  3241. if (adapter->hw.bad_tx_carr_stats_fd &&
  3242. adapter->link_duplex == FULL_DUPLEX) {
  3243. adapter->net_stats.tx_carrier_errors = 0;
  3244. adapter->stats.tncrs = 0;
  3245. }
  3246. /* Tx Dropped needs to be maintained elsewhere */
  3247. /* Phy Stats */
  3248. if (hw->media_type == e1000_media_type_copper) {
  3249. if ((adapter->link_speed == SPEED_1000) &&
  3250. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  3251. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  3252. adapter->phy_stats.idle_errors += phy_tmp;
  3253. }
  3254. if ((hw->mac_type <= e1000_82546) &&
  3255. (hw->phy_type == e1000_phy_m88) &&
  3256. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  3257. adapter->phy_stats.receive_errors += phy_tmp;
  3258. }
  3259. /* Management Stats */
  3260. if (adapter->hw.has_smbus) {
  3261. adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
  3262. adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
  3263. adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
  3264. }
  3265. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3266. }
  3267. /**
  3268. * e1000_intr_msi - Interrupt Handler
  3269. * @irq: interrupt number
  3270. * @data: pointer to a network interface device structure
  3271. **/
  3272. static irqreturn_t
  3273. e1000_intr_msi(int irq, void *data)
  3274. {
  3275. struct net_device *netdev = data;
  3276. struct e1000_adapter *adapter = netdev_priv(netdev);
  3277. struct e1000_hw *hw = &adapter->hw;
  3278. #ifndef CONFIG_E1000_NAPI
  3279. int i;
  3280. #endif
  3281. u32 icr = E1000_READ_REG(hw, ICR);
  3282. /* in NAPI mode read ICR disables interrupts using IAM */
  3283. if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
  3284. hw->get_link_status = 1;
  3285. /* 80003ES2LAN workaround-- For packet buffer work-around on
  3286. * link down event; disable receives here in the ISR and reset
  3287. * adapter in watchdog */
  3288. if (netif_carrier_ok(netdev) &&
  3289. (adapter->hw.mac_type == e1000_80003es2lan)) {
  3290. /* disable receives */
  3291. u32 rctl = E1000_READ_REG(hw, RCTL);
  3292. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  3293. }
  3294. /* guard against interrupt when we're going down */
  3295. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3296. mod_timer(&adapter->watchdog_timer, jiffies + 1);
  3297. }
  3298. #ifdef CONFIG_E1000_NAPI
  3299. if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
  3300. adapter->total_tx_bytes = 0;
  3301. adapter->total_tx_packets = 0;
  3302. adapter->total_rx_bytes = 0;
  3303. adapter->total_rx_packets = 0;
  3304. __netif_rx_schedule(netdev, &adapter->napi);
  3305. } else
  3306. e1000_irq_enable(adapter);
  3307. #else
  3308. adapter->total_tx_bytes = 0;
  3309. adapter->total_rx_bytes = 0;
  3310. adapter->total_tx_packets = 0;
  3311. adapter->total_rx_packets = 0;
  3312. for (i = 0; i < E1000_MAX_INTR; i++)
  3313. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  3314. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  3315. break;
  3316. if (likely(adapter->itr_setting & 3))
  3317. e1000_set_itr(adapter);
  3318. #endif
  3319. return IRQ_HANDLED;
  3320. }
  3321. /**
  3322. * e1000_intr - Interrupt Handler
  3323. * @irq: interrupt number
  3324. * @data: pointer to a network interface device structure
  3325. **/
  3326. static irqreturn_t
  3327. e1000_intr(int irq, void *data)
  3328. {
  3329. struct net_device *netdev = data;
  3330. struct e1000_adapter *adapter = netdev_priv(netdev);
  3331. struct e1000_hw *hw = &adapter->hw;
  3332. u32 rctl, icr = E1000_READ_REG(hw, ICR);
  3333. #ifndef CONFIG_E1000_NAPI
  3334. int i;
  3335. #endif
  3336. if (unlikely(!icr))
  3337. return IRQ_NONE; /* Not our interrupt */
  3338. #ifdef CONFIG_E1000_NAPI
  3339. /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
  3340. * not set, then the adapter didn't send an interrupt */
  3341. if (unlikely(hw->mac_type >= e1000_82571 &&
  3342. !(icr & E1000_ICR_INT_ASSERTED)))
  3343. return IRQ_NONE;
  3344. /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
  3345. * need for the IMC write */
  3346. #endif
  3347. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  3348. hw->get_link_status = 1;
  3349. /* 80003ES2LAN workaround--
  3350. * For packet buffer work-around on link down event;
  3351. * disable receives here in the ISR and
  3352. * reset adapter in watchdog
  3353. */
  3354. if (netif_carrier_ok(netdev) &&
  3355. (adapter->hw.mac_type == e1000_80003es2lan)) {
  3356. /* disable receives */
  3357. rctl = E1000_READ_REG(hw, RCTL);
  3358. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  3359. }
  3360. /* guard against interrupt when we're going down */
  3361. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3362. mod_timer(&adapter->watchdog_timer, jiffies + 1);
  3363. }
  3364. #ifdef CONFIG_E1000_NAPI
  3365. if (unlikely(hw->mac_type < e1000_82571)) {
  3366. /* disable interrupts, without the synchronize_irq bit */
  3367. E1000_WRITE_REG(hw, IMC, ~0);
  3368. E1000_WRITE_FLUSH(hw);
  3369. }
  3370. if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
  3371. adapter->total_tx_bytes = 0;
  3372. adapter->total_tx_packets = 0;
  3373. adapter->total_rx_bytes = 0;
  3374. adapter->total_rx_packets = 0;
  3375. __netif_rx_schedule(netdev, &adapter->napi);
  3376. } else
  3377. /* this really should not happen! if it does it is basically a
  3378. * bug, but not a hard error, so enable ints and continue */
  3379. e1000_irq_enable(adapter);
  3380. #else
  3381. /* Writing IMC and IMS is needed for 82547.
  3382. * Due to Hub Link bus being occupied, an interrupt
  3383. * de-assertion message is not able to be sent.
  3384. * When an interrupt assertion message is generated later,
  3385. * two messages are re-ordered and sent out.
  3386. * That causes APIC to think 82547 is in de-assertion
  3387. * state, while 82547 is in assertion state, resulting
  3388. * in dead lock. Writing IMC forces 82547 into
  3389. * de-assertion state.
  3390. */
  3391. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  3392. E1000_WRITE_REG(hw, IMC, ~0);
  3393. adapter->total_tx_bytes = 0;
  3394. adapter->total_rx_bytes = 0;
  3395. adapter->total_tx_packets = 0;
  3396. adapter->total_rx_packets = 0;
  3397. for (i = 0; i < E1000_MAX_INTR; i++)
  3398. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  3399. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  3400. break;
  3401. if (likely(adapter->itr_setting & 3))
  3402. e1000_set_itr(adapter);
  3403. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  3404. e1000_irq_enable(adapter);
  3405. #endif
  3406. return IRQ_HANDLED;
  3407. }
  3408. #ifdef CONFIG_E1000_NAPI
  3409. /**
  3410. * e1000_clean - NAPI Rx polling callback
  3411. * @adapter: board private structure
  3412. **/
  3413. static int
  3414. e1000_clean(struct napi_struct *napi, int budget)
  3415. {
  3416. struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
  3417. struct net_device *poll_dev = adapter->netdev;
  3418. int tx_cleaned = 0, work_done = 0;
  3419. /* Must NOT use netdev_priv macro here. */
  3420. adapter = poll_dev->priv;
  3421. /* e1000_clean is called per-cpu. This lock protects
  3422. * tx_ring[0] from being cleaned by multiple cpus
  3423. * simultaneously. A failure obtaining the lock means
  3424. * tx_ring[0] is currently being cleaned anyway. */
  3425. if (spin_trylock(&adapter->tx_queue_lock)) {
  3426. tx_cleaned = e1000_clean_tx_irq(adapter,
  3427. &adapter->tx_ring[0]);
  3428. spin_unlock(&adapter->tx_queue_lock);
  3429. }
  3430. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  3431. &work_done, budget);
  3432. if (tx_cleaned)
  3433. work_done = budget;
  3434. /* If budget not fully consumed, exit the polling mode */
  3435. if (work_done < budget) {
  3436. if (likely(adapter->itr_setting & 3))
  3437. e1000_set_itr(adapter);
  3438. netif_rx_complete(poll_dev, napi);
  3439. e1000_irq_enable(adapter);
  3440. }
  3441. return work_done;
  3442. }
  3443. #endif
  3444. /**
  3445. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3446. * @adapter: board private structure
  3447. **/
  3448. static bool
  3449. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3450. struct e1000_tx_ring *tx_ring)
  3451. {
  3452. struct net_device *netdev = adapter->netdev;
  3453. struct e1000_tx_desc *tx_desc, *eop_desc;
  3454. struct e1000_buffer *buffer_info;
  3455. unsigned int i, eop;
  3456. #ifdef CONFIG_E1000_NAPI
  3457. unsigned int count = 0;
  3458. #endif
  3459. bool cleaned = false;
  3460. unsigned int total_tx_bytes=0, total_tx_packets=0;
  3461. i = tx_ring->next_to_clean;
  3462. eop = tx_ring->buffer_info[i].next_to_watch;
  3463. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3464. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  3465. for (cleaned = false; !cleaned; ) {
  3466. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3467. buffer_info = &tx_ring->buffer_info[i];
  3468. cleaned = (i == eop);
  3469. if (cleaned) {
  3470. struct sk_buff *skb = buffer_info->skb;
  3471. unsigned int segs, bytecount;
  3472. segs = skb_shinfo(skb)->gso_segs ?: 1;
  3473. /* multiply data chunks by size of headers */
  3474. bytecount = ((segs - 1) * skb_headlen(skb)) +
  3475. skb->len;
  3476. total_tx_packets += segs;
  3477. total_tx_bytes += bytecount;
  3478. }
  3479. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3480. tx_desc->upper.data = 0;
  3481. if (unlikely(++i == tx_ring->count)) i = 0;
  3482. }
  3483. eop = tx_ring->buffer_info[i].next_to_watch;
  3484. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3485. #ifdef CONFIG_E1000_NAPI
  3486. #define E1000_TX_WEIGHT 64
  3487. /* weight of a sort for tx, to avoid endless transmit cleanup */
  3488. if (count++ == E1000_TX_WEIGHT) break;
  3489. #endif
  3490. }
  3491. tx_ring->next_to_clean = i;
  3492. #define TX_WAKE_THRESHOLD 32
  3493. if (unlikely(cleaned && netif_carrier_ok(netdev) &&
  3494. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3495. /* Make sure that anybody stopping the queue after this
  3496. * sees the new next_to_clean.
  3497. */
  3498. smp_mb();
  3499. if (netif_queue_stopped(netdev)) {
  3500. netif_wake_queue(netdev);
  3501. ++adapter->restart_queue;
  3502. }
  3503. }
  3504. if (adapter->detect_tx_hung) {
  3505. /* Detect a transmit hang in hardware, this serializes the
  3506. * check with the clearing of time_stamp and movement of i */
  3507. adapter->detect_tx_hung = false;
  3508. if (tx_ring->buffer_info[eop].dma &&
  3509. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3510. (adapter->tx_timeout_factor * HZ))
  3511. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3512. E1000_STATUS_TXOFF)) {
  3513. /* detected Tx unit hang */
  3514. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3515. " Tx Queue <%lu>\n"
  3516. " TDH <%x>\n"
  3517. " TDT <%x>\n"
  3518. " next_to_use <%x>\n"
  3519. " next_to_clean <%x>\n"
  3520. "buffer_info[next_to_clean]\n"
  3521. " time_stamp <%lx>\n"
  3522. " next_to_watch <%x>\n"
  3523. " jiffies <%lx>\n"
  3524. " next_to_watch.status <%x>\n",
  3525. (unsigned long)((tx_ring - adapter->tx_ring) /
  3526. sizeof(struct e1000_tx_ring)),
  3527. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3528. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3529. tx_ring->next_to_use,
  3530. tx_ring->next_to_clean,
  3531. tx_ring->buffer_info[eop].time_stamp,
  3532. eop,
  3533. jiffies,
  3534. eop_desc->upper.fields.status);
  3535. netif_stop_queue(netdev);
  3536. }
  3537. }
  3538. adapter->total_tx_bytes += total_tx_bytes;
  3539. adapter->total_tx_packets += total_tx_packets;
  3540. adapter->net_stats.tx_bytes += total_tx_bytes;
  3541. adapter->net_stats.tx_packets += total_tx_packets;
  3542. return cleaned;
  3543. }
  3544. /**
  3545. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3546. * @adapter: board private structure
  3547. * @status_err: receive descriptor status and error fields
  3548. * @csum: receive descriptor csum field
  3549. * @sk_buff: socket buffer with received data
  3550. **/
  3551. static void
  3552. e1000_rx_checksum(struct e1000_adapter *adapter,
  3553. u32 status_err, u32 csum,
  3554. struct sk_buff *skb)
  3555. {
  3556. u16 status = (u16)status_err;
  3557. u8 errors = (u8)(status_err >> 24);
  3558. skb->ip_summed = CHECKSUM_NONE;
  3559. /* 82543 or newer only */
  3560. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3561. /* Ignore Checksum bit is set */
  3562. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3563. /* TCP/UDP checksum error bit is set */
  3564. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3565. /* let the stack verify checksum errors */
  3566. adapter->hw_csum_err++;
  3567. return;
  3568. }
  3569. /* TCP/UDP Checksum has not been calculated */
  3570. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3571. if (!(status & E1000_RXD_STAT_TCPCS))
  3572. return;
  3573. } else {
  3574. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3575. return;
  3576. }
  3577. /* It must be a TCP or UDP packet with a valid checksum */
  3578. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3579. /* TCP checksum is good */
  3580. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3581. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3582. /* IP fragment with UDP payload */
  3583. /* Hardware complements the payload checksum, so we undo it
  3584. * and then put the value in host order for further stack use.
  3585. */
  3586. __sum16 sum = (__force __sum16)htons(csum);
  3587. skb->csum = csum_unfold(~sum);
  3588. skb->ip_summed = CHECKSUM_COMPLETE;
  3589. }
  3590. adapter->hw_csum_good++;
  3591. }
  3592. /**
  3593. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3594. * @adapter: board private structure
  3595. **/
  3596. static bool
  3597. #ifdef CONFIG_E1000_NAPI
  3598. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3599. struct e1000_rx_ring *rx_ring,
  3600. int *work_done, int work_to_do)
  3601. #else
  3602. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3603. struct e1000_rx_ring *rx_ring)
  3604. #endif
  3605. {
  3606. struct net_device *netdev = adapter->netdev;
  3607. struct pci_dev *pdev = adapter->pdev;
  3608. struct e1000_rx_desc *rx_desc, *next_rxd;
  3609. struct e1000_buffer *buffer_info, *next_buffer;
  3610. unsigned long flags;
  3611. u32 length;
  3612. u8 last_byte;
  3613. unsigned int i;
  3614. int cleaned_count = 0;
  3615. bool cleaned = false;
  3616. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3617. i = rx_ring->next_to_clean;
  3618. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3619. buffer_info = &rx_ring->buffer_info[i];
  3620. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3621. struct sk_buff *skb;
  3622. u8 status;
  3623. #ifdef CONFIG_E1000_NAPI
  3624. if (*work_done >= work_to_do)
  3625. break;
  3626. (*work_done)++;
  3627. #endif
  3628. status = rx_desc->status;
  3629. skb = buffer_info->skb;
  3630. buffer_info->skb = NULL;
  3631. prefetch(skb->data - NET_IP_ALIGN);
  3632. if (++i == rx_ring->count) i = 0;
  3633. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3634. prefetch(next_rxd);
  3635. next_buffer = &rx_ring->buffer_info[i];
  3636. cleaned = true;
  3637. cleaned_count++;
  3638. pci_unmap_single(pdev,
  3639. buffer_info->dma,
  3640. buffer_info->length,
  3641. PCI_DMA_FROMDEVICE);
  3642. length = le16_to_cpu(rx_desc->length);
  3643. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3644. /* All receives must fit into a single buffer */
  3645. E1000_DBG("%s: Receive packet consumed multiple"
  3646. " buffers\n", netdev->name);
  3647. /* recycle */
  3648. buffer_info->skb = skb;
  3649. goto next_desc;
  3650. }
  3651. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3652. last_byte = *(skb->data + length - 1);
  3653. if (TBI_ACCEPT(&adapter->hw, status,
  3654. rx_desc->errors, length, last_byte)) {
  3655. spin_lock_irqsave(&adapter->stats_lock, flags);
  3656. e1000_tbi_adjust_stats(&adapter->hw,
  3657. &adapter->stats,
  3658. length, skb->data);
  3659. spin_unlock_irqrestore(&adapter->stats_lock,
  3660. flags);
  3661. length--;
  3662. } else {
  3663. /* recycle */
  3664. buffer_info->skb = skb;
  3665. goto next_desc;
  3666. }
  3667. }
  3668. /* adjust length to remove Ethernet CRC, this must be
  3669. * done after the TBI_ACCEPT workaround above */
  3670. length -= 4;
  3671. /* probably a little skewed due to removing CRC */
  3672. total_rx_bytes += length;
  3673. total_rx_packets++;
  3674. /* code added for copybreak, this should improve
  3675. * performance for small packets with large amounts
  3676. * of reassembly being done in the stack */
  3677. if (length < copybreak) {
  3678. struct sk_buff *new_skb =
  3679. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3680. if (new_skb) {
  3681. skb_reserve(new_skb, NET_IP_ALIGN);
  3682. skb_copy_to_linear_data_offset(new_skb,
  3683. -NET_IP_ALIGN,
  3684. (skb->data -
  3685. NET_IP_ALIGN),
  3686. (length +
  3687. NET_IP_ALIGN));
  3688. /* save the skb in buffer_info as good */
  3689. buffer_info->skb = skb;
  3690. skb = new_skb;
  3691. }
  3692. /* else just continue with the old one */
  3693. }
  3694. /* end copybreak code */
  3695. skb_put(skb, length);
  3696. /* Receive Checksum Offload */
  3697. e1000_rx_checksum(adapter,
  3698. (u32)(status) |
  3699. ((u32)(rx_desc->errors) << 24),
  3700. le16_to_cpu(rx_desc->csum), skb);
  3701. skb->protocol = eth_type_trans(skb, netdev);
  3702. #ifdef CONFIG_E1000_NAPI
  3703. if (unlikely(adapter->vlgrp &&
  3704. (status & E1000_RXD_STAT_VP))) {
  3705. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3706. le16_to_cpu(rx_desc->special) &
  3707. E1000_RXD_SPC_VLAN_MASK);
  3708. } else {
  3709. netif_receive_skb(skb);
  3710. }
  3711. #else /* CONFIG_E1000_NAPI */
  3712. if (unlikely(adapter->vlgrp &&
  3713. (status & E1000_RXD_STAT_VP))) {
  3714. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3715. le16_to_cpu(rx_desc->special) &
  3716. E1000_RXD_SPC_VLAN_MASK);
  3717. } else {
  3718. netif_rx(skb);
  3719. }
  3720. #endif /* CONFIG_E1000_NAPI */
  3721. netdev->last_rx = jiffies;
  3722. next_desc:
  3723. rx_desc->status = 0;
  3724. /* return some buffers to hardware, one at a time is too slow */
  3725. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3726. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3727. cleaned_count = 0;
  3728. }
  3729. /* use prefetched values */
  3730. rx_desc = next_rxd;
  3731. buffer_info = next_buffer;
  3732. }
  3733. rx_ring->next_to_clean = i;
  3734. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3735. if (cleaned_count)
  3736. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3737. adapter->total_rx_packets += total_rx_packets;
  3738. adapter->total_rx_bytes += total_rx_bytes;
  3739. adapter->net_stats.rx_bytes += total_rx_bytes;
  3740. adapter->net_stats.rx_packets += total_rx_packets;
  3741. return cleaned;
  3742. }
  3743. /**
  3744. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3745. * @adapter: board private structure
  3746. **/
  3747. static bool
  3748. #ifdef CONFIG_E1000_NAPI
  3749. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3750. struct e1000_rx_ring *rx_ring,
  3751. int *work_done, int work_to_do)
  3752. #else
  3753. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3754. struct e1000_rx_ring *rx_ring)
  3755. #endif
  3756. {
  3757. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3758. struct net_device *netdev = adapter->netdev;
  3759. struct pci_dev *pdev = adapter->pdev;
  3760. struct e1000_buffer *buffer_info, *next_buffer;
  3761. struct e1000_ps_page *ps_page;
  3762. struct e1000_ps_page_dma *ps_page_dma;
  3763. struct sk_buff *skb;
  3764. unsigned int i, j;
  3765. u32 length, staterr;
  3766. int cleaned_count = 0;
  3767. bool cleaned = false;
  3768. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3769. i = rx_ring->next_to_clean;
  3770. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3771. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3772. buffer_info = &rx_ring->buffer_info[i];
  3773. while (staterr & E1000_RXD_STAT_DD) {
  3774. ps_page = &rx_ring->ps_page[i];
  3775. ps_page_dma = &rx_ring->ps_page_dma[i];
  3776. #ifdef CONFIG_E1000_NAPI
  3777. if (unlikely(*work_done >= work_to_do))
  3778. break;
  3779. (*work_done)++;
  3780. #endif
  3781. skb = buffer_info->skb;
  3782. /* in the packet split case this is header only */
  3783. prefetch(skb->data - NET_IP_ALIGN);
  3784. if (++i == rx_ring->count) i = 0;
  3785. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3786. prefetch(next_rxd);
  3787. next_buffer = &rx_ring->buffer_info[i];
  3788. cleaned = true;
  3789. cleaned_count++;
  3790. pci_unmap_single(pdev, buffer_info->dma,
  3791. buffer_info->length,
  3792. PCI_DMA_FROMDEVICE);
  3793. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3794. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3795. " the full packet\n", netdev->name);
  3796. dev_kfree_skb_irq(skb);
  3797. goto next_desc;
  3798. }
  3799. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3800. dev_kfree_skb_irq(skb);
  3801. goto next_desc;
  3802. }
  3803. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3804. if (unlikely(!length)) {
  3805. E1000_DBG("%s: Last part of the packet spanning"
  3806. " multiple descriptors\n", netdev->name);
  3807. dev_kfree_skb_irq(skb);
  3808. goto next_desc;
  3809. }
  3810. /* Good Receive */
  3811. skb_put(skb, length);
  3812. {
  3813. /* this looks ugly, but it seems compiler issues make it
  3814. more efficient than reusing j */
  3815. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3816. /* page alloc/put takes too long and effects small packet
  3817. * throughput, so unsplit small packets and save the alloc/put*/
  3818. if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3819. u8 *vaddr;
  3820. /* there is no documentation about how to call
  3821. * kmap_atomic, so we can't hold the mapping
  3822. * very long */
  3823. pci_dma_sync_single_for_cpu(pdev,
  3824. ps_page_dma->ps_page_dma[0],
  3825. PAGE_SIZE,
  3826. PCI_DMA_FROMDEVICE);
  3827. vaddr = kmap_atomic(ps_page->ps_page[0],
  3828. KM_SKB_DATA_SOFTIRQ);
  3829. memcpy(skb_tail_pointer(skb), vaddr, l1);
  3830. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3831. pci_dma_sync_single_for_device(pdev,
  3832. ps_page_dma->ps_page_dma[0],
  3833. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3834. /* remove the CRC */
  3835. l1 -= 4;
  3836. skb_put(skb, l1);
  3837. goto copydone;
  3838. } /* if */
  3839. }
  3840. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3841. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3842. break;
  3843. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3844. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3845. ps_page_dma->ps_page_dma[j] = 0;
  3846. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3847. length);
  3848. ps_page->ps_page[j] = NULL;
  3849. skb->len += length;
  3850. skb->data_len += length;
  3851. skb->truesize += length;
  3852. }
  3853. /* strip the ethernet crc, problem is we're using pages now so
  3854. * this whole operation can get a little cpu intensive */
  3855. pskb_trim(skb, skb->len - 4);
  3856. copydone:
  3857. total_rx_bytes += skb->len;
  3858. total_rx_packets++;
  3859. e1000_rx_checksum(adapter, staterr,
  3860. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3861. skb->protocol = eth_type_trans(skb, netdev);
  3862. if (likely(rx_desc->wb.upper.header_status &
  3863. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3864. adapter->rx_hdr_split++;
  3865. #ifdef CONFIG_E1000_NAPI
  3866. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3867. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3868. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3869. E1000_RXD_SPC_VLAN_MASK);
  3870. } else {
  3871. netif_receive_skb(skb);
  3872. }
  3873. #else /* CONFIG_E1000_NAPI */
  3874. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3875. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3876. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3877. E1000_RXD_SPC_VLAN_MASK);
  3878. } else {
  3879. netif_rx(skb);
  3880. }
  3881. #endif /* CONFIG_E1000_NAPI */
  3882. netdev->last_rx = jiffies;
  3883. next_desc:
  3884. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3885. buffer_info->skb = NULL;
  3886. /* return some buffers to hardware, one at a time is too slow */
  3887. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3888. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3889. cleaned_count = 0;
  3890. }
  3891. /* use prefetched values */
  3892. rx_desc = next_rxd;
  3893. buffer_info = next_buffer;
  3894. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3895. }
  3896. rx_ring->next_to_clean = i;
  3897. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3898. if (cleaned_count)
  3899. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3900. adapter->total_rx_packets += total_rx_packets;
  3901. adapter->total_rx_bytes += total_rx_bytes;
  3902. adapter->net_stats.rx_bytes += total_rx_bytes;
  3903. adapter->net_stats.rx_packets += total_rx_packets;
  3904. return cleaned;
  3905. }
  3906. /**
  3907. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3908. * @adapter: address of board private structure
  3909. **/
  3910. static void
  3911. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3912. struct e1000_rx_ring *rx_ring,
  3913. int cleaned_count)
  3914. {
  3915. struct net_device *netdev = adapter->netdev;
  3916. struct pci_dev *pdev = adapter->pdev;
  3917. struct e1000_rx_desc *rx_desc;
  3918. struct e1000_buffer *buffer_info;
  3919. struct sk_buff *skb;
  3920. unsigned int i;
  3921. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3922. i = rx_ring->next_to_use;
  3923. buffer_info = &rx_ring->buffer_info[i];
  3924. while (cleaned_count--) {
  3925. skb = buffer_info->skb;
  3926. if (skb) {
  3927. skb_trim(skb, 0);
  3928. goto map_skb;
  3929. }
  3930. skb = netdev_alloc_skb(netdev, bufsz);
  3931. if (unlikely(!skb)) {
  3932. /* Better luck next round */
  3933. adapter->alloc_rx_buff_failed++;
  3934. break;
  3935. }
  3936. /* Fix for errata 23, can't cross 64kB boundary */
  3937. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3938. struct sk_buff *oldskb = skb;
  3939. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3940. "at %p\n", bufsz, skb->data);
  3941. /* Try again, without freeing the previous */
  3942. skb = netdev_alloc_skb(netdev, bufsz);
  3943. /* Failed allocation, critical failure */
  3944. if (!skb) {
  3945. dev_kfree_skb(oldskb);
  3946. break;
  3947. }
  3948. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3949. /* give up */
  3950. dev_kfree_skb(skb);
  3951. dev_kfree_skb(oldskb);
  3952. break; /* while !buffer_info->skb */
  3953. }
  3954. /* Use new allocation */
  3955. dev_kfree_skb(oldskb);
  3956. }
  3957. /* Make buffer alignment 2 beyond a 16 byte boundary
  3958. * this will result in a 16 byte aligned IP header after
  3959. * the 14 byte MAC header is removed
  3960. */
  3961. skb_reserve(skb, NET_IP_ALIGN);
  3962. buffer_info->skb = skb;
  3963. buffer_info->length = adapter->rx_buffer_len;
  3964. map_skb:
  3965. buffer_info->dma = pci_map_single(pdev,
  3966. skb->data,
  3967. adapter->rx_buffer_len,
  3968. PCI_DMA_FROMDEVICE);
  3969. /* Fix for errata 23, can't cross 64kB boundary */
  3970. if (!e1000_check_64k_bound(adapter,
  3971. (void *)(unsigned long)buffer_info->dma,
  3972. adapter->rx_buffer_len)) {
  3973. DPRINTK(RX_ERR, ERR,
  3974. "dma align check failed: %u bytes at %p\n",
  3975. adapter->rx_buffer_len,
  3976. (void *)(unsigned long)buffer_info->dma);
  3977. dev_kfree_skb(skb);
  3978. buffer_info->skb = NULL;
  3979. pci_unmap_single(pdev, buffer_info->dma,
  3980. adapter->rx_buffer_len,
  3981. PCI_DMA_FROMDEVICE);
  3982. break; /* while !buffer_info->skb */
  3983. }
  3984. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3985. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3986. if (unlikely(++i == rx_ring->count))
  3987. i = 0;
  3988. buffer_info = &rx_ring->buffer_info[i];
  3989. }
  3990. if (likely(rx_ring->next_to_use != i)) {
  3991. rx_ring->next_to_use = i;
  3992. if (unlikely(i-- == 0))
  3993. i = (rx_ring->count - 1);
  3994. /* Force memory writes to complete before letting h/w
  3995. * know there are new descriptors to fetch. (Only
  3996. * applicable for weak-ordered memory model archs,
  3997. * such as IA-64). */
  3998. wmb();
  3999. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  4000. }
  4001. }
  4002. /**
  4003. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  4004. * @adapter: address of board private structure
  4005. **/
  4006. static void
  4007. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  4008. struct e1000_rx_ring *rx_ring,
  4009. int cleaned_count)
  4010. {
  4011. struct net_device *netdev = adapter->netdev;
  4012. struct pci_dev *pdev = adapter->pdev;
  4013. union e1000_rx_desc_packet_split *rx_desc;
  4014. struct e1000_buffer *buffer_info;
  4015. struct e1000_ps_page *ps_page;
  4016. struct e1000_ps_page_dma *ps_page_dma;
  4017. struct sk_buff *skb;
  4018. unsigned int i, j;
  4019. i = rx_ring->next_to_use;
  4020. buffer_info = &rx_ring->buffer_info[i];
  4021. ps_page = &rx_ring->ps_page[i];
  4022. ps_page_dma = &rx_ring->ps_page_dma[i];
  4023. while (cleaned_count--) {
  4024. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  4025. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  4026. if (j < adapter->rx_ps_pages) {
  4027. if (likely(!ps_page->ps_page[j])) {
  4028. ps_page->ps_page[j] =
  4029. alloc_page(GFP_ATOMIC);
  4030. if (unlikely(!ps_page->ps_page[j])) {
  4031. adapter->alloc_rx_buff_failed++;
  4032. goto no_buffers;
  4033. }
  4034. ps_page_dma->ps_page_dma[j] =
  4035. pci_map_page(pdev,
  4036. ps_page->ps_page[j],
  4037. 0, PAGE_SIZE,
  4038. PCI_DMA_FROMDEVICE);
  4039. }
  4040. /* Refresh the desc even if buffer_addrs didn't
  4041. * change because each write-back erases
  4042. * this info.
  4043. */
  4044. rx_desc->read.buffer_addr[j+1] =
  4045. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  4046. } else
  4047. rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
  4048. }
  4049. skb = netdev_alloc_skb(netdev,
  4050. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  4051. if (unlikely(!skb)) {
  4052. adapter->alloc_rx_buff_failed++;
  4053. break;
  4054. }
  4055. /* Make buffer alignment 2 beyond a 16 byte boundary
  4056. * this will result in a 16 byte aligned IP header after
  4057. * the 14 byte MAC header is removed
  4058. */
  4059. skb_reserve(skb, NET_IP_ALIGN);
  4060. buffer_info->skb = skb;
  4061. buffer_info->length = adapter->rx_ps_bsize0;
  4062. buffer_info->dma = pci_map_single(pdev, skb->data,
  4063. adapter->rx_ps_bsize0,
  4064. PCI_DMA_FROMDEVICE);
  4065. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  4066. if (unlikely(++i == rx_ring->count)) i = 0;
  4067. buffer_info = &rx_ring->buffer_info[i];
  4068. ps_page = &rx_ring->ps_page[i];
  4069. ps_page_dma = &rx_ring->ps_page_dma[i];
  4070. }
  4071. no_buffers:
  4072. if (likely(rx_ring->next_to_use != i)) {
  4073. rx_ring->next_to_use = i;
  4074. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  4075. /* Force memory writes to complete before letting h/w
  4076. * know there are new descriptors to fetch. (Only
  4077. * applicable for weak-ordered memory model archs,
  4078. * such as IA-64). */
  4079. wmb();
  4080. /* Hardware increments by 16 bytes, but packet split
  4081. * descriptors are 32 bytes...so we increment tail
  4082. * twice as much.
  4083. */
  4084. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  4085. }
  4086. }
  4087. /**
  4088. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  4089. * @adapter:
  4090. **/
  4091. static void
  4092. e1000_smartspeed(struct e1000_adapter *adapter)
  4093. {
  4094. u16 phy_status;
  4095. u16 phy_ctrl;
  4096. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  4097. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  4098. return;
  4099. if (adapter->smartspeed == 0) {
  4100. /* If Master/Slave config fault is asserted twice,
  4101. * we assume back-to-back */
  4102. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  4103. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  4104. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  4105. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  4106. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  4107. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  4108. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  4109. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  4110. phy_ctrl);
  4111. adapter->smartspeed++;
  4112. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  4113. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  4114. &phy_ctrl)) {
  4115. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4116. MII_CR_RESTART_AUTO_NEG);
  4117. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  4118. phy_ctrl);
  4119. }
  4120. }
  4121. return;
  4122. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  4123. /* If still no link, perhaps using 2/3 pair cable */
  4124. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  4125. phy_ctrl |= CR_1000T_MS_ENABLE;
  4126. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  4127. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  4128. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  4129. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4130. MII_CR_RESTART_AUTO_NEG);
  4131. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  4132. }
  4133. }
  4134. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  4135. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  4136. adapter->smartspeed = 0;
  4137. }
  4138. /**
  4139. * e1000_ioctl -
  4140. * @netdev:
  4141. * @ifreq:
  4142. * @cmd:
  4143. **/
  4144. static int
  4145. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4146. {
  4147. switch (cmd) {
  4148. case SIOCGMIIPHY:
  4149. case SIOCGMIIREG:
  4150. case SIOCSMIIREG:
  4151. return e1000_mii_ioctl(netdev, ifr, cmd);
  4152. default:
  4153. return -EOPNOTSUPP;
  4154. }
  4155. }
  4156. /**
  4157. * e1000_mii_ioctl -
  4158. * @netdev:
  4159. * @ifreq:
  4160. * @cmd:
  4161. **/
  4162. static int
  4163. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4164. {
  4165. struct e1000_adapter *adapter = netdev_priv(netdev);
  4166. struct mii_ioctl_data *data = if_mii(ifr);
  4167. int retval;
  4168. u16 mii_reg;
  4169. u16 spddplx;
  4170. unsigned long flags;
  4171. if (adapter->hw.media_type != e1000_media_type_copper)
  4172. return -EOPNOTSUPP;
  4173. switch (cmd) {
  4174. case SIOCGMIIPHY:
  4175. data->phy_id = adapter->hw.phy_addr;
  4176. break;
  4177. case SIOCGMIIREG:
  4178. if (!capable(CAP_NET_ADMIN))
  4179. return -EPERM;
  4180. spin_lock_irqsave(&adapter->stats_lock, flags);
  4181. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  4182. &data->val_out)) {
  4183. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4184. return -EIO;
  4185. }
  4186. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4187. break;
  4188. case SIOCSMIIREG:
  4189. if (!capable(CAP_NET_ADMIN))
  4190. return -EPERM;
  4191. if (data->reg_num & ~(0x1F))
  4192. return -EFAULT;
  4193. mii_reg = data->val_in;
  4194. spin_lock_irqsave(&adapter->stats_lock, flags);
  4195. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  4196. mii_reg)) {
  4197. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4198. return -EIO;
  4199. }
  4200. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4201. if (adapter->hw.media_type == e1000_media_type_copper) {
  4202. switch (data->reg_num) {
  4203. case PHY_CTRL:
  4204. if (mii_reg & MII_CR_POWER_DOWN)
  4205. break;
  4206. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  4207. adapter->hw.autoneg = 1;
  4208. adapter->hw.autoneg_advertised = 0x2F;
  4209. } else {
  4210. if (mii_reg & 0x40)
  4211. spddplx = SPEED_1000;
  4212. else if (mii_reg & 0x2000)
  4213. spddplx = SPEED_100;
  4214. else
  4215. spddplx = SPEED_10;
  4216. spddplx += (mii_reg & 0x100)
  4217. ? DUPLEX_FULL :
  4218. DUPLEX_HALF;
  4219. retval = e1000_set_spd_dplx(adapter,
  4220. spddplx);
  4221. if (retval)
  4222. return retval;
  4223. }
  4224. if (netif_running(adapter->netdev))
  4225. e1000_reinit_locked(adapter);
  4226. else
  4227. e1000_reset(adapter);
  4228. break;
  4229. case M88E1000_PHY_SPEC_CTRL:
  4230. case M88E1000_EXT_PHY_SPEC_CTRL:
  4231. if (e1000_phy_reset(&adapter->hw))
  4232. return -EIO;
  4233. break;
  4234. }
  4235. } else {
  4236. switch (data->reg_num) {
  4237. case PHY_CTRL:
  4238. if (mii_reg & MII_CR_POWER_DOWN)
  4239. break;
  4240. if (netif_running(adapter->netdev))
  4241. e1000_reinit_locked(adapter);
  4242. else
  4243. e1000_reset(adapter);
  4244. break;
  4245. }
  4246. }
  4247. break;
  4248. default:
  4249. return -EOPNOTSUPP;
  4250. }
  4251. return E1000_SUCCESS;
  4252. }
  4253. void
  4254. e1000_pci_set_mwi(struct e1000_hw *hw)
  4255. {
  4256. struct e1000_adapter *adapter = hw->back;
  4257. int ret_val = pci_set_mwi(adapter->pdev);
  4258. if (ret_val)
  4259. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  4260. }
  4261. void
  4262. e1000_pci_clear_mwi(struct e1000_hw *hw)
  4263. {
  4264. struct e1000_adapter *adapter = hw->back;
  4265. pci_clear_mwi(adapter->pdev);
  4266. }
  4267. int
  4268. e1000_pcix_get_mmrbc(struct e1000_hw *hw)
  4269. {
  4270. struct e1000_adapter *adapter = hw->back;
  4271. return pcix_get_mmrbc(adapter->pdev);
  4272. }
  4273. void
  4274. e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
  4275. {
  4276. struct e1000_adapter *adapter = hw->back;
  4277. pcix_set_mmrbc(adapter->pdev, mmrbc);
  4278. }
  4279. s32
  4280. e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
  4281. {
  4282. struct e1000_adapter *adapter = hw->back;
  4283. u16 cap_offset;
  4284. cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
  4285. if (!cap_offset)
  4286. return -E1000_ERR_CONFIG;
  4287. pci_read_config_word(adapter->pdev, cap_offset + reg, value);
  4288. return E1000_SUCCESS;
  4289. }
  4290. void
  4291. e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
  4292. {
  4293. outl(value, port);
  4294. }
  4295. static void
  4296. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  4297. {
  4298. struct e1000_adapter *adapter = netdev_priv(netdev);
  4299. u32 ctrl, rctl;
  4300. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4301. e1000_irq_disable(adapter);
  4302. adapter->vlgrp = grp;
  4303. if (grp) {
  4304. /* enable VLAN tag insert/strip */
  4305. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4306. ctrl |= E1000_CTRL_VME;
  4307. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4308. if (adapter->hw.mac_type != e1000_ich8lan) {
  4309. /* enable VLAN receive filtering */
  4310. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4311. rctl |= E1000_RCTL_VFE;
  4312. rctl &= ~E1000_RCTL_CFIEN;
  4313. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4314. e1000_update_mng_vlan(adapter);
  4315. }
  4316. } else {
  4317. /* disable VLAN tag insert/strip */
  4318. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4319. ctrl &= ~E1000_CTRL_VME;
  4320. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4321. if (adapter->hw.mac_type != e1000_ich8lan) {
  4322. /* disable VLAN filtering */
  4323. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4324. rctl &= ~E1000_RCTL_VFE;
  4325. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4326. if (adapter->mng_vlan_id !=
  4327. (u16)E1000_MNG_VLAN_NONE) {
  4328. e1000_vlan_rx_kill_vid(netdev,
  4329. adapter->mng_vlan_id);
  4330. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  4331. }
  4332. }
  4333. }
  4334. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4335. e1000_irq_enable(adapter);
  4336. }
  4337. static void
  4338. e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  4339. {
  4340. struct e1000_adapter *adapter = netdev_priv(netdev);
  4341. u32 vfta, index;
  4342. if ((adapter->hw.mng_cookie.status &
  4343. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4344. (vid == adapter->mng_vlan_id))
  4345. return;
  4346. /* add VID to filter table */
  4347. index = (vid >> 5) & 0x7F;
  4348. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  4349. vfta |= (1 << (vid & 0x1F));
  4350. e1000_write_vfta(&adapter->hw, index, vfta);
  4351. }
  4352. static void
  4353. e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  4354. {
  4355. struct e1000_adapter *adapter = netdev_priv(netdev);
  4356. u32 vfta, index;
  4357. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4358. e1000_irq_disable(adapter);
  4359. vlan_group_set_device(adapter->vlgrp, vid, NULL);
  4360. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4361. e1000_irq_enable(adapter);
  4362. if ((adapter->hw.mng_cookie.status &
  4363. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4364. (vid == adapter->mng_vlan_id)) {
  4365. /* release control to f/w */
  4366. e1000_release_hw_control(adapter);
  4367. return;
  4368. }
  4369. /* remove VID from filter table */
  4370. index = (vid >> 5) & 0x7F;
  4371. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  4372. vfta &= ~(1 << (vid & 0x1F));
  4373. e1000_write_vfta(&adapter->hw, index, vfta);
  4374. }
  4375. static void
  4376. e1000_restore_vlan(struct e1000_adapter *adapter)
  4377. {
  4378. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  4379. if (adapter->vlgrp) {
  4380. u16 vid;
  4381. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  4382. if (!vlan_group_get_device(adapter->vlgrp, vid))
  4383. continue;
  4384. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  4385. }
  4386. }
  4387. }
  4388. int
  4389. e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
  4390. {
  4391. adapter->hw.autoneg = 0;
  4392. /* Fiber NICs only allow 1000 gbps Full duplex */
  4393. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  4394. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  4395. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  4396. return -EINVAL;
  4397. }
  4398. switch (spddplx) {
  4399. case SPEED_10 + DUPLEX_HALF:
  4400. adapter->hw.forced_speed_duplex = e1000_10_half;
  4401. break;
  4402. case SPEED_10 + DUPLEX_FULL:
  4403. adapter->hw.forced_speed_duplex = e1000_10_full;
  4404. break;
  4405. case SPEED_100 + DUPLEX_HALF:
  4406. adapter->hw.forced_speed_duplex = e1000_100_half;
  4407. break;
  4408. case SPEED_100 + DUPLEX_FULL:
  4409. adapter->hw.forced_speed_duplex = e1000_100_full;
  4410. break;
  4411. case SPEED_1000 + DUPLEX_FULL:
  4412. adapter->hw.autoneg = 1;
  4413. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  4414. break;
  4415. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  4416. default:
  4417. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  4418. return -EINVAL;
  4419. }
  4420. return 0;
  4421. }
  4422. static int
  4423. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  4424. {
  4425. struct net_device *netdev = pci_get_drvdata(pdev);
  4426. struct e1000_adapter *adapter = netdev_priv(netdev);
  4427. u32 ctrl, ctrl_ext, rctl, status;
  4428. u32 wufc = adapter->wol;
  4429. #ifdef CONFIG_PM
  4430. int retval = 0;
  4431. #endif
  4432. netif_device_detach(netdev);
  4433. if (netif_running(netdev)) {
  4434. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4435. e1000_down(adapter);
  4436. }
  4437. #ifdef CONFIG_PM
  4438. retval = pci_save_state(pdev);
  4439. if (retval)
  4440. return retval;
  4441. #endif
  4442. status = E1000_READ_REG(&adapter->hw, STATUS);
  4443. if (status & E1000_STATUS_LU)
  4444. wufc &= ~E1000_WUFC_LNKC;
  4445. if (wufc) {
  4446. e1000_setup_rctl(adapter);
  4447. e1000_set_rx_mode(netdev);
  4448. /* turn on all-multi mode if wake on multicast is enabled */
  4449. if (wufc & E1000_WUFC_MC) {
  4450. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4451. rctl |= E1000_RCTL_MPE;
  4452. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4453. }
  4454. if (adapter->hw.mac_type >= e1000_82540) {
  4455. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4456. /* advertise wake from D3Cold */
  4457. #define E1000_CTRL_ADVD3WUC 0x00100000
  4458. /* phy power management enable */
  4459. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4460. ctrl |= E1000_CTRL_ADVD3WUC |
  4461. E1000_CTRL_EN_PHY_PWR_MGMT;
  4462. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4463. }
  4464. if (adapter->hw.media_type == e1000_media_type_fiber ||
  4465. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  4466. /* keep the laser running in D3 */
  4467. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  4468. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4469. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  4470. }
  4471. /* Allow time for pending master requests to run */
  4472. e1000_disable_pciex_master(&adapter->hw);
  4473. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4474. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4475. pci_enable_wake(pdev, PCI_D3hot, 1);
  4476. pci_enable_wake(pdev, PCI_D3cold, 1);
  4477. } else {
  4478. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4479. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4480. pci_enable_wake(pdev, PCI_D3hot, 0);
  4481. pci_enable_wake(pdev, PCI_D3cold, 0);
  4482. }
  4483. e1000_release_manageability(adapter);
  4484. /* make sure adapter isn't asleep if manageability is enabled */
  4485. if (adapter->en_mng_pt) {
  4486. pci_enable_wake(pdev, PCI_D3hot, 1);
  4487. pci_enable_wake(pdev, PCI_D3cold, 1);
  4488. }
  4489. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4490. e1000_phy_powerdown_workaround(&adapter->hw);
  4491. if (netif_running(netdev))
  4492. e1000_free_irq(adapter);
  4493. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4494. * would have already happened in close and is redundant. */
  4495. e1000_release_hw_control(adapter);
  4496. pci_disable_device(pdev);
  4497. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4498. return 0;
  4499. }
  4500. #ifdef CONFIG_PM
  4501. static int
  4502. e1000_resume(struct pci_dev *pdev)
  4503. {
  4504. struct net_device *netdev = pci_get_drvdata(pdev);
  4505. struct e1000_adapter *adapter = netdev_priv(netdev);
  4506. u32 err;
  4507. pci_set_power_state(pdev, PCI_D0);
  4508. pci_restore_state(pdev);
  4509. if ((err = pci_enable_device(pdev))) {
  4510. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4511. return err;
  4512. }
  4513. pci_set_master(pdev);
  4514. pci_enable_wake(pdev, PCI_D3hot, 0);
  4515. pci_enable_wake(pdev, PCI_D3cold, 0);
  4516. if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
  4517. return err;
  4518. e1000_power_up_phy(adapter);
  4519. e1000_reset(adapter);
  4520. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4521. e1000_init_manageability(adapter);
  4522. if (netif_running(netdev))
  4523. e1000_up(adapter);
  4524. netif_device_attach(netdev);
  4525. /* If the controller is 82573 and f/w is AMT, do not set
  4526. * DRV_LOAD until the interface is up. For all other cases,
  4527. * let the f/w know that the h/w is now under the control
  4528. * of the driver. */
  4529. if (adapter->hw.mac_type != e1000_82573 ||
  4530. !e1000_check_mng_mode(&adapter->hw))
  4531. e1000_get_hw_control(adapter);
  4532. return 0;
  4533. }
  4534. #endif
  4535. static void e1000_shutdown(struct pci_dev *pdev)
  4536. {
  4537. e1000_suspend(pdev, PMSG_SUSPEND);
  4538. }
  4539. #ifdef CONFIG_NET_POLL_CONTROLLER
  4540. /*
  4541. * Polling 'interrupt' - used by things like netconsole to send skbs
  4542. * without having to re-enable interrupts. It's not called while
  4543. * the interrupt routine is executing.
  4544. */
  4545. static void
  4546. e1000_netpoll(struct net_device *netdev)
  4547. {
  4548. struct e1000_adapter *adapter = netdev_priv(netdev);
  4549. disable_irq(adapter->pdev->irq);
  4550. e1000_intr(adapter->pdev->irq, netdev);
  4551. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4552. #ifndef CONFIG_E1000_NAPI
  4553. adapter->clean_rx(adapter, adapter->rx_ring);
  4554. #endif
  4555. enable_irq(adapter->pdev->irq);
  4556. }
  4557. #endif
  4558. /**
  4559. * e1000_io_error_detected - called when PCI error is detected
  4560. * @pdev: Pointer to PCI device
  4561. * @state: The current pci conneection state
  4562. *
  4563. * This function is called after a PCI bus error affecting
  4564. * this device has been detected.
  4565. */
  4566. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4567. {
  4568. struct net_device *netdev = pci_get_drvdata(pdev);
  4569. struct e1000_adapter *adapter = netdev->priv;
  4570. netif_device_detach(netdev);
  4571. if (netif_running(netdev))
  4572. e1000_down(adapter);
  4573. pci_disable_device(pdev);
  4574. /* Request a slot slot reset. */
  4575. return PCI_ERS_RESULT_NEED_RESET;
  4576. }
  4577. /**
  4578. * e1000_io_slot_reset - called after the pci bus has been reset.
  4579. * @pdev: Pointer to PCI device
  4580. *
  4581. * Restart the card from scratch, as if from a cold-boot. Implementation
  4582. * resembles the first-half of the e1000_resume routine.
  4583. */
  4584. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4585. {
  4586. struct net_device *netdev = pci_get_drvdata(pdev);
  4587. struct e1000_adapter *adapter = netdev->priv;
  4588. if (pci_enable_device(pdev)) {
  4589. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4590. return PCI_ERS_RESULT_DISCONNECT;
  4591. }
  4592. pci_set_master(pdev);
  4593. pci_enable_wake(pdev, PCI_D3hot, 0);
  4594. pci_enable_wake(pdev, PCI_D3cold, 0);
  4595. e1000_reset(adapter);
  4596. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4597. return PCI_ERS_RESULT_RECOVERED;
  4598. }
  4599. /**
  4600. * e1000_io_resume - called when traffic can start flowing again.
  4601. * @pdev: Pointer to PCI device
  4602. *
  4603. * This callback is called when the error recovery driver tells us that
  4604. * its OK to resume normal operation. Implementation resembles the
  4605. * second-half of the e1000_resume routine.
  4606. */
  4607. static void e1000_io_resume(struct pci_dev *pdev)
  4608. {
  4609. struct net_device *netdev = pci_get_drvdata(pdev);
  4610. struct e1000_adapter *adapter = netdev->priv;
  4611. e1000_init_manageability(adapter);
  4612. if (netif_running(netdev)) {
  4613. if (e1000_up(adapter)) {
  4614. printk("e1000: can't bring device back up after reset\n");
  4615. return;
  4616. }
  4617. }
  4618. netif_device_attach(netdev);
  4619. /* If the controller is 82573 and f/w is AMT, do not set
  4620. * DRV_LOAD until the interface is up. For all other cases,
  4621. * let the f/w know that the h/w is now under the control
  4622. * of the driver. */
  4623. if (adapter->hw.mac_type != e1000_82573 ||
  4624. !e1000_check_mng_mode(&adapter->hw))
  4625. e1000_get_hw_control(adapter);
  4626. }
  4627. /* e1000_main.c */