mga_irq.c 4.9 KB

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  1. /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
  2. *
  3. * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
  4. *
  5. * The Weather Channel (TM) funded Tungsten Graphics to develop the
  6. * initial release of the Radeon 8500 driver under the XFree86 license.
  7. * This notice must be preserved.
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the next
  17. * paragraph) shall be included in all copies or substantial portions of the
  18. * Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  26. * DEALINGS IN THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Keith Whitwell <keith@tungstengraphics.com>
  30. * Eric Anholt <anholt@FreeBSD.org>
  31. */
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "mga_drm.h"
  35. #include "mga_drv.h"
  36. u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
  37. {
  38. const drm_mga_private_t *const dev_priv =
  39. (drm_mga_private_t *) dev->dev_private;
  40. if (crtc != 0) {
  41. return 0;
  42. }
  43. return atomic_read(&dev_priv->vbl_received);
  44. }
  45. irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
  46. {
  47. struct drm_device *dev = (struct drm_device *) arg;
  48. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  49. int status;
  50. int handled = 0;
  51. status = MGA_READ(MGA_STATUS);
  52. /* VBLANK interrupt */
  53. if (status & MGA_VLINEPEN) {
  54. MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
  55. atomic_inc(&dev_priv->vbl_received);
  56. drm_handle_vblank(dev, 0);
  57. handled = 1;
  58. }
  59. /* SOFTRAP interrupt */
  60. if (status & MGA_SOFTRAPEN) {
  61. const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
  62. const u32 prim_end = MGA_READ(MGA_PRIMEND);
  63. MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
  64. /* In addition to clearing the interrupt-pending bit, we
  65. * have to write to MGA_PRIMEND to re-start the DMA operation.
  66. */
  67. if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
  68. MGA_WRITE(MGA_PRIMEND, prim_end);
  69. }
  70. atomic_inc(&dev_priv->last_fence_retired);
  71. DRM_WAKEUP(&dev_priv->fence_queue);
  72. handled = 1;
  73. }
  74. if (handled) {
  75. return IRQ_HANDLED;
  76. }
  77. return IRQ_NONE;
  78. }
  79. int mga_enable_vblank(struct drm_device *dev, int crtc)
  80. {
  81. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  82. if (crtc != 0) {
  83. DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
  84. crtc);
  85. return 0;
  86. }
  87. MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
  88. return 0;
  89. }
  90. void mga_disable_vblank(struct drm_device *dev, int crtc)
  91. {
  92. if (crtc != 0) {
  93. DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
  94. crtc);
  95. }
  96. /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
  97. * a nice hardware counter that tracks the number of refreshes when
  98. * the interrupt is disabled, and the kernel doesn't know the refresh
  99. * rate to calculate an estimate.
  100. */
  101. /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
  102. }
  103. int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
  104. {
  105. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  106. unsigned int cur_fence;
  107. int ret = 0;
  108. /* Assume that the user has missed the current sequence number
  109. * by about a day rather than she wants to wait for years
  110. * using fences.
  111. */
  112. DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
  113. (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
  114. - *sequence) <= (1 << 23)));
  115. *sequence = cur_fence;
  116. return ret;
  117. }
  118. void mga_driver_irq_preinstall(struct drm_device * dev)
  119. {
  120. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  121. /* Disable *all* interrupts */
  122. MGA_WRITE(MGA_IEN, 0);
  123. /* Clear bits if they're already high */
  124. MGA_WRITE(MGA_ICLEAR, ~0);
  125. }
  126. int mga_driver_irq_postinstall(struct drm_device * dev)
  127. {
  128. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  129. int ret;
  130. ret = drm_vblank_init(dev, 1);
  131. if (ret)
  132. return ret;
  133. DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
  134. /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
  135. * in mga_enable_vblank.
  136. */
  137. MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
  138. return 0;
  139. }
  140. void mga_driver_irq_uninstall(struct drm_device * dev)
  141. {
  142. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  143. if (!dev_priv)
  144. return;
  145. /* Disable *all* interrupts */
  146. MGA_WRITE(MGA_IEN, 0);
  147. dev->irq_enabled = 0;
  148. }