mmu.c 55 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 1;
  57. #endif
  58. #ifndef MMU_DEBUG
  59. #define ASSERT(x) do { } while (0)
  60. #else
  61. #define ASSERT(x) \
  62. if (!(x)) { \
  63. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  64. __FILE__, __LINE__, #x); \
  65. }
  66. #endif
  67. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  68. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  69. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  70. #define PT64_LEVEL_BITS 9
  71. #define PT64_LEVEL_SHIFT(level) \
  72. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  73. #define PT64_LEVEL_MASK(level) \
  74. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  75. #define PT64_INDEX(address, level)\
  76. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  77. #define PT32_LEVEL_BITS 10
  78. #define PT32_LEVEL_SHIFT(level) \
  79. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  80. #define PT32_LEVEL_MASK(level) \
  81. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  82. #define PT32_INDEX(address, level)\
  83. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  84. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  85. #define PT64_DIR_BASE_ADDR_MASK \
  86. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  87. #define PT32_BASE_ADDR_MASK PAGE_MASK
  88. #define PT32_DIR_BASE_ADDR_MASK \
  89. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  90. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  91. | PT64_NX_MASK)
  92. #define PFERR_PRESENT_MASK (1U << 0)
  93. #define PFERR_WRITE_MASK (1U << 1)
  94. #define PFERR_USER_MASK (1U << 2)
  95. #define PFERR_FETCH_MASK (1U << 4)
  96. #define PT_DIRECTORY_LEVEL 2
  97. #define PT_PAGE_TABLE_LEVEL 1
  98. #define RMAP_EXT 4
  99. #define ACC_EXEC_MASK 1
  100. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  101. #define ACC_USER_MASK PT_USER_MASK
  102. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  103. struct kvm_pv_mmu_op_buffer {
  104. void *ptr;
  105. unsigned len;
  106. unsigned processed;
  107. char buf[512] __aligned(sizeof(long));
  108. };
  109. struct kvm_rmap_desc {
  110. u64 *shadow_ptes[RMAP_EXT];
  111. struct kvm_rmap_desc *more;
  112. };
  113. static struct kmem_cache *pte_chain_cache;
  114. static struct kmem_cache *rmap_desc_cache;
  115. static struct kmem_cache *mmu_page_header_cache;
  116. static u64 __read_mostly shadow_trap_nonpresent_pte;
  117. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  118. static u64 __read_mostly shadow_base_present_pte;
  119. static u64 __read_mostly shadow_nx_mask;
  120. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  121. static u64 __read_mostly shadow_user_mask;
  122. static u64 __read_mostly shadow_accessed_mask;
  123. static u64 __read_mostly shadow_dirty_mask;
  124. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  125. {
  126. shadow_trap_nonpresent_pte = trap_pte;
  127. shadow_notrap_nonpresent_pte = notrap_pte;
  128. }
  129. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  130. void kvm_mmu_set_base_ptes(u64 base_pte)
  131. {
  132. shadow_base_present_pte = base_pte;
  133. }
  134. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  135. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  136. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  137. {
  138. shadow_user_mask = user_mask;
  139. shadow_accessed_mask = accessed_mask;
  140. shadow_dirty_mask = dirty_mask;
  141. shadow_nx_mask = nx_mask;
  142. shadow_x_mask = x_mask;
  143. }
  144. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  145. static int is_write_protection(struct kvm_vcpu *vcpu)
  146. {
  147. return vcpu->arch.cr0 & X86_CR0_WP;
  148. }
  149. static int is_cpuid_PSE36(void)
  150. {
  151. return 1;
  152. }
  153. static int is_nx(struct kvm_vcpu *vcpu)
  154. {
  155. return vcpu->arch.shadow_efer & EFER_NX;
  156. }
  157. static int is_present_pte(unsigned long pte)
  158. {
  159. return pte & PT_PRESENT_MASK;
  160. }
  161. static int is_shadow_present_pte(u64 pte)
  162. {
  163. return pte != shadow_trap_nonpresent_pte
  164. && pte != shadow_notrap_nonpresent_pte;
  165. }
  166. static int is_large_pte(u64 pte)
  167. {
  168. return pte & PT_PAGE_SIZE_MASK;
  169. }
  170. static int is_writeble_pte(unsigned long pte)
  171. {
  172. return pte & PT_WRITABLE_MASK;
  173. }
  174. static int is_dirty_pte(unsigned long pte)
  175. {
  176. return pte & shadow_dirty_mask;
  177. }
  178. static int is_rmap_pte(u64 pte)
  179. {
  180. return is_shadow_present_pte(pte);
  181. }
  182. static pfn_t spte_to_pfn(u64 pte)
  183. {
  184. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  185. }
  186. static gfn_t pse36_gfn_delta(u32 gpte)
  187. {
  188. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  189. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  190. }
  191. static void set_shadow_pte(u64 *sptep, u64 spte)
  192. {
  193. #ifdef CONFIG_X86_64
  194. set_64bit((unsigned long *)sptep, spte);
  195. #else
  196. set_64bit((unsigned long long *)sptep, spte);
  197. #endif
  198. }
  199. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  200. struct kmem_cache *base_cache, int min)
  201. {
  202. void *obj;
  203. if (cache->nobjs >= min)
  204. return 0;
  205. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  206. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  207. if (!obj)
  208. return -ENOMEM;
  209. cache->objects[cache->nobjs++] = obj;
  210. }
  211. return 0;
  212. }
  213. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  214. {
  215. while (mc->nobjs)
  216. kfree(mc->objects[--mc->nobjs]);
  217. }
  218. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  219. int min)
  220. {
  221. struct page *page;
  222. if (cache->nobjs >= min)
  223. return 0;
  224. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  225. page = alloc_page(GFP_KERNEL);
  226. if (!page)
  227. return -ENOMEM;
  228. set_page_private(page, 0);
  229. cache->objects[cache->nobjs++] = page_address(page);
  230. }
  231. return 0;
  232. }
  233. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  234. {
  235. while (mc->nobjs)
  236. free_page((unsigned long)mc->objects[--mc->nobjs]);
  237. }
  238. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  239. {
  240. int r;
  241. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  242. pte_chain_cache, 4);
  243. if (r)
  244. goto out;
  245. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  246. rmap_desc_cache, 1);
  247. if (r)
  248. goto out;
  249. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  250. if (r)
  251. goto out;
  252. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  253. mmu_page_header_cache, 4);
  254. out:
  255. return r;
  256. }
  257. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  258. {
  259. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  260. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  261. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  262. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  263. }
  264. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  265. size_t size)
  266. {
  267. void *p;
  268. BUG_ON(!mc->nobjs);
  269. p = mc->objects[--mc->nobjs];
  270. memset(p, 0, size);
  271. return p;
  272. }
  273. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  274. {
  275. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  276. sizeof(struct kvm_pte_chain));
  277. }
  278. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  279. {
  280. kfree(pc);
  281. }
  282. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  283. {
  284. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  285. sizeof(struct kvm_rmap_desc));
  286. }
  287. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  288. {
  289. kfree(rd);
  290. }
  291. /*
  292. * Return the pointer to the largepage write count for a given
  293. * gfn, handling slots that are not large page aligned.
  294. */
  295. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  296. {
  297. unsigned long idx;
  298. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  299. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  300. return &slot->lpage_info[idx].write_count;
  301. }
  302. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  303. {
  304. int *write_count;
  305. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  306. *write_count += 1;
  307. }
  308. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  309. {
  310. int *write_count;
  311. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  312. *write_count -= 1;
  313. WARN_ON(*write_count < 0);
  314. }
  315. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  316. {
  317. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  318. int *largepage_idx;
  319. if (slot) {
  320. largepage_idx = slot_largepage_idx(gfn, slot);
  321. return *largepage_idx;
  322. }
  323. return 1;
  324. }
  325. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  326. {
  327. struct vm_area_struct *vma;
  328. unsigned long addr;
  329. addr = gfn_to_hva(kvm, gfn);
  330. if (kvm_is_error_hva(addr))
  331. return 0;
  332. vma = find_vma(current->mm, addr);
  333. if (vma && is_vm_hugetlb_page(vma))
  334. return 1;
  335. return 0;
  336. }
  337. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  338. {
  339. struct kvm_memory_slot *slot;
  340. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  341. return 0;
  342. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  343. return 0;
  344. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  345. if (slot && slot->dirty_bitmap)
  346. return 0;
  347. return 1;
  348. }
  349. /*
  350. * Take gfn and return the reverse mapping to it.
  351. * Note: gfn must be unaliased before this function get called
  352. */
  353. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  354. {
  355. struct kvm_memory_slot *slot;
  356. unsigned long idx;
  357. slot = gfn_to_memslot(kvm, gfn);
  358. if (!lpage)
  359. return &slot->rmap[gfn - slot->base_gfn];
  360. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  361. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  362. return &slot->lpage_info[idx].rmap_pde;
  363. }
  364. /*
  365. * Reverse mapping data structures:
  366. *
  367. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  368. * that points to page_address(page).
  369. *
  370. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  371. * containing more mappings.
  372. */
  373. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  374. {
  375. struct kvm_mmu_page *sp;
  376. struct kvm_rmap_desc *desc;
  377. unsigned long *rmapp;
  378. int i;
  379. if (!is_rmap_pte(*spte))
  380. return;
  381. gfn = unalias_gfn(vcpu->kvm, gfn);
  382. sp = page_header(__pa(spte));
  383. sp->gfns[spte - sp->spt] = gfn;
  384. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  385. if (!*rmapp) {
  386. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  387. *rmapp = (unsigned long)spte;
  388. } else if (!(*rmapp & 1)) {
  389. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  390. desc = mmu_alloc_rmap_desc(vcpu);
  391. desc->shadow_ptes[0] = (u64 *)*rmapp;
  392. desc->shadow_ptes[1] = spte;
  393. *rmapp = (unsigned long)desc | 1;
  394. } else {
  395. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  396. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  397. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  398. desc = desc->more;
  399. if (desc->shadow_ptes[RMAP_EXT-1]) {
  400. desc->more = mmu_alloc_rmap_desc(vcpu);
  401. desc = desc->more;
  402. }
  403. for (i = 0; desc->shadow_ptes[i]; ++i)
  404. ;
  405. desc->shadow_ptes[i] = spte;
  406. }
  407. }
  408. static void rmap_desc_remove_entry(unsigned long *rmapp,
  409. struct kvm_rmap_desc *desc,
  410. int i,
  411. struct kvm_rmap_desc *prev_desc)
  412. {
  413. int j;
  414. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  415. ;
  416. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  417. desc->shadow_ptes[j] = NULL;
  418. if (j != 0)
  419. return;
  420. if (!prev_desc && !desc->more)
  421. *rmapp = (unsigned long)desc->shadow_ptes[0];
  422. else
  423. if (prev_desc)
  424. prev_desc->more = desc->more;
  425. else
  426. *rmapp = (unsigned long)desc->more | 1;
  427. mmu_free_rmap_desc(desc);
  428. }
  429. static void rmap_remove(struct kvm *kvm, u64 *spte)
  430. {
  431. struct kvm_rmap_desc *desc;
  432. struct kvm_rmap_desc *prev_desc;
  433. struct kvm_mmu_page *sp;
  434. pfn_t pfn;
  435. unsigned long *rmapp;
  436. int i;
  437. if (!is_rmap_pte(*spte))
  438. return;
  439. sp = page_header(__pa(spte));
  440. pfn = spte_to_pfn(*spte);
  441. if (*spte & shadow_accessed_mask)
  442. kvm_set_pfn_accessed(pfn);
  443. if (is_writeble_pte(*spte))
  444. kvm_release_pfn_dirty(pfn);
  445. else
  446. kvm_release_pfn_clean(pfn);
  447. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  448. if (!*rmapp) {
  449. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  450. BUG();
  451. } else if (!(*rmapp & 1)) {
  452. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  453. if ((u64 *)*rmapp != spte) {
  454. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  455. spte, *spte);
  456. BUG();
  457. }
  458. *rmapp = 0;
  459. } else {
  460. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  461. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  462. prev_desc = NULL;
  463. while (desc) {
  464. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  465. if (desc->shadow_ptes[i] == spte) {
  466. rmap_desc_remove_entry(rmapp,
  467. desc, i,
  468. prev_desc);
  469. return;
  470. }
  471. prev_desc = desc;
  472. desc = desc->more;
  473. }
  474. BUG();
  475. }
  476. }
  477. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  478. {
  479. struct kvm_rmap_desc *desc;
  480. struct kvm_rmap_desc *prev_desc;
  481. u64 *prev_spte;
  482. int i;
  483. if (!*rmapp)
  484. return NULL;
  485. else if (!(*rmapp & 1)) {
  486. if (!spte)
  487. return (u64 *)*rmapp;
  488. return NULL;
  489. }
  490. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  491. prev_desc = NULL;
  492. prev_spte = NULL;
  493. while (desc) {
  494. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  495. if (prev_spte == spte)
  496. return desc->shadow_ptes[i];
  497. prev_spte = desc->shadow_ptes[i];
  498. }
  499. desc = desc->more;
  500. }
  501. return NULL;
  502. }
  503. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  504. {
  505. unsigned long *rmapp;
  506. u64 *spte;
  507. int write_protected = 0;
  508. gfn = unalias_gfn(kvm, gfn);
  509. rmapp = gfn_to_rmap(kvm, gfn, 0);
  510. spte = rmap_next(kvm, rmapp, NULL);
  511. while (spte) {
  512. BUG_ON(!spte);
  513. BUG_ON(!(*spte & PT_PRESENT_MASK));
  514. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  515. if (is_writeble_pte(*spte)) {
  516. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  517. write_protected = 1;
  518. }
  519. spte = rmap_next(kvm, rmapp, spte);
  520. }
  521. if (write_protected) {
  522. pfn_t pfn;
  523. spte = rmap_next(kvm, rmapp, NULL);
  524. pfn = spte_to_pfn(*spte);
  525. kvm_set_pfn_dirty(pfn);
  526. }
  527. /* check for huge page mappings */
  528. rmapp = gfn_to_rmap(kvm, gfn, 1);
  529. spte = rmap_next(kvm, rmapp, NULL);
  530. while (spte) {
  531. BUG_ON(!spte);
  532. BUG_ON(!(*spte & PT_PRESENT_MASK));
  533. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  534. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  535. if (is_writeble_pte(*spte)) {
  536. rmap_remove(kvm, spte);
  537. --kvm->stat.lpages;
  538. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  539. write_protected = 1;
  540. }
  541. spte = rmap_next(kvm, rmapp, spte);
  542. }
  543. if (write_protected)
  544. kvm_flush_remote_tlbs(kvm);
  545. account_shadowed(kvm, gfn);
  546. }
  547. #ifdef MMU_DEBUG
  548. static int is_empty_shadow_page(u64 *spt)
  549. {
  550. u64 *pos;
  551. u64 *end;
  552. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  553. if (*pos != shadow_trap_nonpresent_pte) {
  554. printk(KERN_ERR "%s: %p %llx\n", __func__,
  555. pos, *pos);
  556. return 0;
  557. }
  558. return 1;
  559. }
  560. #endif
  561. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  562. {
  563. ASSERT(is_empty_shadow_page(sp->spt));
  564. list_del(&sp->link);
  565. __free_page(virt_to_page(sp->spt));
  566. __free_page(virt_to_page(sp->gfns));
  567. kfree(sp);
  568. ++kvm->arch.n_free_mmu_pages;
  569. }
  570. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  571. {
  572. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  573. }
  574. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  575. u64 *parent_pte)
  576. {
  577. struct kvm_mmu_page *sp;
  578. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  579. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  580. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  581. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  582. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  583. ASSERT(is_empty_shadow_page(sp->spt));
  584. sp->slot_bitmap = 0;
  585. sp->multimapped = 0;
  586. sp->parent_pte = parent_pte;
  587. --vcpu->kvm->arch.n_free_mmu_pages;
  588. return sp;
  589. }
  590. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  591. struct kvm_mmu_page *sp, u64 *parent_pte)
  592. {
  593. struct kvm_pte_chain *pte_chain;
  594. struct hlist_node *node;
  595. int i;
  596. if (!parent_pte)
  597. return;
  598. if (!sp->multimapped) {
  599. u64 *old = sp->parent_pte;
  600. if (!old) {
  601. sp->parent_pte = parent_pte;
  602. return;
  603. }
  604. sp->multimapped = 1;
  605. pte_chain = mmu_alloc_pte_chain(vcpu);
  606. INIT_HLIST_HEAD(&sp->parent_ptes);
  607. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  608. pte_chain->parent_ptes[0] = old;
  609. }
  610. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  611. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  612. continue;
  613. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  614. if (!pte_chain->parent_ptes[i]) {
  615. pte_chain->parent_ptes[i] = parent_pte;
  616. return;
  617. }
  618. }
  619. pte_chain = mmu_alloc_pte_chain(vcpu);
  620. BUG_ON(!pte_chain);
  621. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  622. pte_chain->parent_ptes[0] = parent_pte;
  623. }
  624. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  625. u64 *parent_pte)
  626. {
  627. struct kvm_pte_chain *pte_chain;
  628. struct hlist_node *node;
  629. int i;
  630. if (!sp->multimapped) {
  631. BUG_ON(sp->parent_pte != parent_pte);
  632. sp->parent_pte = NULL;
  633. return;
  634. }
  635. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  636. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  637. if (!pte_chain->parent_ptes[i])
  638. break;
  639. if (pte_chain->parent_ptes[i] != parent_pte)
  640. continue;
  641. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  642. && pte_chain->parent_ptes[i + 1]) {
  643. pte_chain->parent_ptes[i]
  644. = pte_chain->parent_ptes[i + 1];
  645. ++i;
  646. }
  647. pte_chain->parent_ptes[i] = NULL;
  648. if (i == 0) {
  649. hlist_del(&pte_chain->link);
  650. mmu_free_pte_chain(pte_chain);
  651. if (hlist_empty(&sp->parent_ptes)) {
  652. sp->multimapped = 0;
  653. sp->parent_pte = NULL;
  654. }
  655. }
  656. return;
  657. }
  658. BUG();
  659. }
  660. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  661. {
  662. unsigned index;
  663. struct hlist_head *bucket;
  664. struct kvm_mmu_page *sp;
  665. struct hlist_node *node;
  666. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  667. index = kvm_page_table_hashfn(gfn);
  668. bucket = &kvm->arch.mmu_page_hash[index];
  669. hlist_for_each_entry(sp, node, bucket, hash_link)
  670. if (sp->gfn == gfn && !sp->role.metaphysical
  671. && !sp->role.invalid) {
  672. pgprintk("%s: found role %x\n",
  673. __func__, sp->role.word);
  674. return sp;
  675. }
  676. return NULL;
  677. }
  678. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  679. gfn_t gfn,
  680. gva_t gaddr,
  681. unsigned level,
  682. int metaphysical,
  683. unsigned access,
  684. u64 *parent_pte)
  685. {
  686. union kvm_mmu_page_role role;
  687. unsigned index;
  688. unsigned quadrant;
  689. struct hlist_head *bucket;
  690. struct kvm_mmu_page *sp;
  691. struct hlist_node *node;
  692. role.word = 0;
  693. role.glevels = vcpu->arch.mmu.root_level;
  694. role.level = level;
  695. role.metaphysical = metaphysical;
  696. role.access = access;
  697. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  698. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  699. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  700. role.quadrant = quadrant;
  701. }
  702. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  703. gfn, role.word);
  704. index = kvm_page_table_hashfn(gfn);
  705. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  706. hlist_for_each_entry(sp, node, bucket, hash_link)
  707. if (sp->gfn == gfn && sp->role.word == role.word) {
  708. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  709. pgprintk("%s: found\n", __func__);
  710. return sp;
  711. }
  712. ++vcpu->kvm->stat.mmu_cache_miss;
  713. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  714. if (!sp)
  715. return sp;
  716. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  717. sp->gfn = gfn;
  718. sp->role = role;
  719. hlist_add_head(&sp->hash_link, bucket);
  720. if (!metaphysical)
  721. rmap_write_protect(vcpu->kvm, gfn);
  722. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  723. return sp;
  724. }
  725. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  726. struct kvm_mmu_page *sp)
  727. {
  728. unsigned i;
  729. u64 *pt;
  730. u64 ent;
  731. pt = sp->spt;
  732. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  733. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  734. if (is_shadow_present_pte(pt[i]))
  735. rmap_remove(kvm, &pt[i]);
  736. pt[i] = shadow_trap_nonpresent_pte;
  737. }
  738. kvm_flush_remote_tlbs(kvm);
  739. return;
  740. }
  741. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  742. ent = pt[i];
  743. if (is_shadow_present_pte(ent)) {
  744. if (!is_large_pte(ent)) {
  745. ent &= PT64_BASE_ADDR_MASK;
  746. mmu_page_remove_parent_pte(page_header(ent),
  747. &pt[i]);
  748. } else {
  749. --kvm->stat.lpages;
  750. rmap_remove(kvm, &pt[i]);
  751. }
  752. }
  753. pt[i] = shadow_trap_nonpresent_pte;
  754. }
  755. kvm_flush_remote_tlbs(kvm);
  756. }
  757. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  758. {
  759. mmu_page_remove_parent_pte(sp, parent_pte);
  760. }
  761. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  762. {
  763. int i;
  764. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  765. if (kvm->vcpus[i])
  766. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  767. }
  768. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  769. {
  770. u64 *parent_pte;
  771. ++kvm->stat.mmu_shadow_zapped;
  772. while (sp->multimapped || sp->parent_pte) {
  773. if (!sp->multimapped)
  774. parent_pte = sp->parent_pte;
  775. else {
  776. struct kvm_pte_chain *chain;
  777. chain = container_of(sp->parent_ptes.first,
  778. struct kvm_pte_chain, link);
  779. parent_pte = chain->parent_ptes[0];
  780. }
  781. BUG_ON(!parent_pte);
  782. kvm_mmu_put_page(sp, parent_pte);
  783. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  784. }
  785. kvm_mmu_page_unlink_children(kvm, sp);
  786. if (!sp->root_count) {
  787. if (!sp->role.metaphysical)
  788. unaccount_shadowed(kvm, sp->gfn);
  789. hlist_del(&sp->hash_link);
  790. kvm_mmu_free_page(kvm, sp);
  791. } else {
  792. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  793. sp->role.invalid = 1;
  794. kvm_reload_remote_mmus(kvm);
  795. }
  796. kvm_mmu_reset_last_pte_updated(kvm);
  797. }
  798. /*
  799. * Changing the number of mmu pages allocated to the vm
  800. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  801. */
  802. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  803. {
  804. /*
  805. * If we set the number of mmu pages to be smaller be than the
  806. * number of actived pages , we must to free some mmu pages before we
  807. * change the value
  808. */
  809. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  810. kvm_nr_mmu_pages) {
  811. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  812. - kvm->arch.n_free_mmu_pages;
  813. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  814. struct kvm_mmu_page *page;
  815. page = container_of(kvm->arch.active_mmu_pages.prev,
  816. struct kvm_mmu_page, link);
  817. kvm_mmu_zap_page(kvm, page);
  818. n_used_mmu_pages--;
  819. }
  820. kvm->arch.n_free_mmu_pages = 0;
  821. }
  822. else
  823. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  824. - kvm->arch.n_alloc_mmu_pages;
  825. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  826. }
  827. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  828. {
  829. unsigned index;
  830. struct hlist_head *bucket;
  831. struct kvm_mmu_page *sp;
  832. struct hlist_node *node, *n;
  833. int r;
  834. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  835. r = 0;
  836. index = kvm_page_table_hashfn(gfn);
  837. bucket = &kvm->arch.mmu_page_hash[index];
  838. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  839. if (sp->gfn == gfn && !sp->role.metaphysical) {
  840. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  841. sp->role.word);
  842. kvm_mmu_zap_page(kvm, sp);
  843. r = 1;
  844. }
  845. return r;
  846. }
  847. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  848. {
  849. struct kvm_mmu_page *sp;
  850. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  851. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  852. kvm_mmu_zap_page(kvm, sp);
  853. }
  854. }
  855. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  856. {
  857. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  858. struct kvm_mmu_page *sp = page_header(__pa(pte));
  859. __set_bit(slot, &sp->slot_bitmap);
  860. }
  861. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  862. {
  863. struct page *page;
  864. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  865. if (gpa == UNMAPPED_GVA)
  866. return NULL;
  867. down_read(&current->mm->mmap_sem);
  868. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  869. up_read(&current->mm->mmap_sem);
  870. return page;
  871. }
  872. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  873. unsigned pt_access, unsigned pte_access,
  874. int user_fault, int write_fault, int dirty,
  875. int *ptwrite, int largepage, gfn_t gfn,
  876. pfn_t pfn, bool speculative)
  877. {
  878. u64 spte;
  879. int was_rmapped = 0;
  880. int was_writeble = is_writeble_pte(*shadow_pte);
  881. pgprintk("%s: spte %llx access %x write_fault %d"
  882. " user_fault %d gfn %lx\n",
  883. __func__, *shadow_pte, pt_access,
  884. write_fault, user_fault, gfn);
  885. if (is_rmap_pte(*shadow_pte)) {
  886. /*
  887. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  888. * the parent of the now unreachable PTE.
  889. */
  890. if (largepage && !is_large_pte(*shadow_pte)) {
  891. struct kvm_mmu_page *child;
  892. u64 pte = *shadow_pte;
  893. child = page_header(pte & PT64_BASE_ADDR_MASK);
  894. mmu_page_remove_parent_pte(child, shadow_pte);
  895. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  896. pgprintk("hfn old %lx new %lx\n",
  897. spte_to_pfn(*shadow_pte), pfn);
  898. rmap_remove(vcpu->kvm, shadow_pte);
  899. } else {
  900. if (largepage)
  901. was_rmapped = is_large_pte(*shadow_pte);
  902. else
  903. was_rmapped = 1;
  904. }
  905. }
  906. /*
  907. * We don't set the accessed bit, since we sometimes want to see
  908. * whether the guest actually used the pte (in order to detect
  909. * demand paging).
  910. */
  911. spte = shadow_base_present_pte | shadow_dirty_mask;
  912. if (!speculative)
  913. pte_access |= PT_ACCESSED_MASK;
  914. if (!dirty)
  915. pte_access &= ~ACC_WRITE_MASK;
  916. if (pte_access & ACC_EXEC_MASK)
  917. spte |= shadow_x_mask;
  918. else
  919. spte |= shadow_nx_mask;
  920. if (pte_access & ACC_USER_MASK)
  921. spte |= shadow_user_mask;
  922. if (largepage)
  923. spte |= PT_PAGE_SIZE_MASK;
  924. spte |= (u64)pfn << PAGE_SHIFT;
  925. if ((pte_access & ACC_WRITE_MASK)
  926. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  927. struct kvm_mmu_page *shadow;
  928. spte |= PT_WRITABLE_MASK;
  929. if (user_fault) {
  930. mmu_unshadow(vcpu->kvm, gfn);
  931. goto unshadowed;
  932. }
  933. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  934. if (shadow ||
  935. (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
  936. pgprintk("%s: found shadow page for %lx, marking ro\n",
  937. __func__, gfn);
  938. pte_access &= ~ACC_WRITE_MASK;
  939. if (is_writeble_pte(spte)) {
  940. spte &= ~PT_WRITABLE_MASK;
  941. kvm_x86_ops->tlb_flush(vcpu);
  942. }
  943. if (write_fault)
  944. *ptwrite = 1;
  945. }
  946. }
  947. unshadowed:
  948. if (pte_access & ACC_WRITE_MASK)
  949. mark_page_dirty(vcpu->kvm, gfn);
  950. pgprintk("%s: setting spte %llx\n", __func__, spte);
  951. pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n",
  952. (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
  953. (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
  954. set_shadow_pte(shadow_pte, spte);
  955. if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
  956. && (spte & PT_PRESENT_MASK))
  957. ++vcpu->kvm->stat.lpages;
  958. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  959. if (!was_rmapped) {
  960. rmap_add(vcpu, shadow_pte, gfn, largepage);
  961. if (!is_rmap_pte(*shadow_pte))
  962. kvm_release_pfn_clean(pfn);
  963. } else {
  964. if (was_writeble)
  965. kvm_release_pfn_dirty(pfn);
  966. else
  967. kvm_release_pfn_clean(pfn);
  968. }
  969. if (!ptwrite || !*ptwrite)
  970. vcpu->arch.last_pte_updated = shadow_pte;
  971. }
  972. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  973. {
  974. }
  975. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  976. int largepage, gfn_t gfn, pfn_t pfn,
  977. int level)
  978. {
  979. hpa_t table_addr = vcpu->arch.mmu.root_hpa;
  980. int pt_write = 0;
  981. for (; ; level--) {
  982. u32 index = PT64_INDEX(v, level);
  983. u64 *table;
  984. ASSERT(VALID_PAGE(table_addr));
  985. table = __va(table_addr);
  986. if (level == 1) {
  987. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  988. 0, write, 1, &pt_write, 0, gfn, pfn, false);
  989. return pt_write;
  990. }
  991. if (largepage && level == 2) {
  992. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  993. 0, write, 1, &pt_write, 1, gfn, pfn, false);
  994. return pt_write;
  995. }
  996. if (table[index] == shadow_trap_nonpresent_pte) {
  997. struct kvm_mmu_page *new_table;
  998. gfn_t pseudo_gfn;
  999. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  1000. >> PAGE_SHIFT;
  1001. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  1002. v, level - 1,
  1003. 1, ACC_ALL, &table[index]);
  1004. if (!new_table) {
  1005. pgprintk("nonpaging_map: ENOMEM\n");
  1006. kvm_release_pfn_clean(pfn);
  1007. return -ENOMEM;
  1008. }
  1009. table[index] = __pa(new_table->spt)
  1010. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1011. | shadow_user_mask | shadow_x_mask;
  1012. }
  1013. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  1014. }
  1015. }
  1016. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1017. {
  1018. int r;
  1019. int largepage = 0;
  1020. pfn_t pfn;
  1021. down_read(&current->mm->mmap_sem);
  1022. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1023. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1024. largepage = 1;
  1025. }
  1026. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1027. up_read(&current->mm->mmap_sem);
  1028. /* mmio */
  1029. if (is_error_pfn(pfn)) {
  1030. kvm_release_pfn_clean(pfn);
  1031. return 1;
  1032. }
  1033. spin_lock(&vcpu->kvm->mmu_lock);
  1034. kvm_mmu_free_some_pages(vcpu);
  1035. r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
  1036. PT32E_ROOT_LEVEL);
  1037. spin_unlock(&vcpu->kvm->mmu_lock);
  1038. return r;
  1039. }
  1040. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  1041. struct kvm_mmu_page *sp)
  1042. {
  1043. int i;
  1044. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1045. sp->spt[i] = shadow_trap_nonpresent_pte;
  1046. }
  1047. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1048. {
  1049. int i;
  1050. struct kvm_mmu_page *sp;
  1051. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1052. return;
  1053. spin_lock(&vcpu->kvm->mmu_lock);
  1054. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1055. hpa_t root = vcpu->arch.mmu.root_hpa;
  1056. sp = page_header(root);
  1057. --sp->root_count;
  1058. if (!sp->root_count && sp->role.invalid)
  1059. kvm_mmu_zap_page(vcpu->kvm, sp);
  1060. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1061. spin_unlock(&vcpu->kvm->mmu_lock);
  1062. return;
  1063. }
  1064. for (i = 0; i < 4; ++i) {
  1065. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1066. if (root) {
  1067. root &= PT64_BASE_ADDR_MASK;
  1068. sp = page_header(root);
  1069. --sp->root_count;
  1070. if (!sp->root_count && sp->role.invalid)
  1071. kvm_mmu_zap_page(vcpu->kvm, sp);
  1072. }
  1073. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1074. }
  1075. spin_unlock(&vcpu->kvm->mmu_lock);
  1076. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1077. }
  1078. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1079. {
  1080. int i;
  1081. gfn_t root_gfn;
  1082. struct kvm_mmu_page *sp;
  1083. int metaphysical = 0;
  1084. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1085. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1086. hpa_t root = vcpu->arch.mmu.root_hpa;
  1087. ASSERT(!VALID_PAGE(root));
  1088. if (tdp_enabled)
  1089. metaphysical = 1;
  1090. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1091. PT64_ROOT_LEVEL, metaphysical,
  1092. ACC_ALL, NULL);
  1093. root = __pa(sp->spt);
  1094. ++sp->root_count;
  1095. vcpu->arch.mmu.root_hpa = root;
  1096. return;
  1097. }
  1098. metaphysical = !is_paging(vcpu);
  1099. if (tdp_enabled)
  1100. metaphysical = 1;
  1101. for (i = 0; i < 4; ++i) {
  1102. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1103. ASSERT(!VALID_PAGE(root));
  1104. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1105. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1106. vcpu->arch.mmu.pae_root[i] = 0;
  1107. continue;
  1108. }
  1109. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1110. } else if (vcpu->arch.mmu.root_level == 0)
  1111. root_gfn = 0;
  1112. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1113. PT32_ROOT_LEVEL, metaphysical,
  1114. ACC_ALL, NULL);
  1115. root = __pa(sp->spt);
  1116. ++sp->root_count;
  1117. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1118. }
  1119. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1120. }
  1121. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1122. {
  1123. return vaddr;
  1124. }
  1125. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1126. u32 error_code)
  1127. {
  1128. gfn_t gfn;
  1129. int r;
  1130. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1131. r = mmu_topup_memory_caches(vcpu);
  1132. if (r)
  1133. return r;
  1134. ASSERT(vcpu);
  1135. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1136. gfn = gva >> PAGE_SHIFT;
  1137. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1138. error_code & PFERR_WRITE_MASK, gfn);
  1139. }
  1140. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1141. u32 error_code)
  1142. {
  1143. pfn_t pfn;
  1144. int r;
  1145. int largepage = 0;
  1146. gfn_t gfn = gpa >> PAGE_SHIFT;
  1147. ASSERT(vcpu);
  1148. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1149. r = mmu_topup_memory_caches(vcpu);
  1150. if (r)
  1151. return r;
  1152. down_read(&current->mm->mmap_sem);
  1153. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1154. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1155. largepage = 1;
  1156. }
  1157. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1158. up_read(&current->mm->mmap_sem);
  1159. if (is_error_pfn(pfn)) {
  1160. kvm_release_pfn_clean(pfn);
  1161. return 1;
  1162. }
  1163. spin_lock(&vcpu->kvm->mmu_lock);
  1164. kvm_mmu_free_some_pages(vcpu);
  1165. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1166. largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
  1167. spin_unlock(&vcpu->kvm->mmu_lock);
  1168. return r;
  1169. }
  1170. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1171. {
  1172. mmu_free_roots(vcpu);
  1173. }
  1174. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1175. {
  1176. struct kvm_mmu *context = &vcpu->arch.mmu;
  1177. context->new_cr3 = nonpaging_new_cr3;
  1178. context->page_fault = nonpaging_page_fault;
  1179. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1180. context->free = nonpaging_free;
  1181. context->prefetch_page = nonpaging_prefetch_page;
  1182. context->root_level = 0;
  1183. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1184. context->root_hpa = INVALID_PAGE;
  1185. return 0;
  1186. }
  1187. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1188. {
  1189. ++vcpu->stat.tlb_flush;
  1190. kvm_x86_ops->tlb_flush(vcpu);
  1191. }
  1192. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1193. {
  1194. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1195. mmu_free_roots(vcpu);
  1196. }
  1197. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1198. u64 addr,
  1199. u32 err_code)
  1200. {
  1201. kvm_inject_page_fault(vcpu, addr, err_code);
  1202. }
  1203. static void paging_free(struct kvm_vcpu *vcpu)
  1204. {
  1205. nonpaging_free(vcpu);
  1206. }
  1207. #define PTTYPE 64
  1208. #include "paging_tmpl.h"
  1209. #undef PTTYPE
  1210. #define PTTYPE 32
  1211. #include "paging_tmpl.h"
  1212. #undef PTTYPE
  1213. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1214. {
  1215. struct kvm_mmu *context = &vcpu->arch.mmu;
  1216. ASSERT(is_pae(vcpu));
  1217. context->new_cr3 = paging_new_cr3;
  1218. context->page_fault = paging64_page_fault;
  1219. context->gva_to_gpa = paging64_gva_to_gpa;
  1220. context->prefetch_page = paging64_prefetch_page;
  1221. context->free = paging_free;
  1222. context->root_level = level;
  1223. context->shadow_root_level = level;
  1224. context->root_hpa = INVALID_PAGE;
  1225. return 0;
  1226. }
  1227. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1228. {
  1229. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1230. }
  1231. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1232. {
  1233. struct kvm_mmu *context = &vcpu->arch.mmu;
  1234. context->new_cr3 = paging_new_cr3;
  1235. context->page_fault = paging32_page_fault;
  1236. context->gva_to_gpa = paging32_gva_to_gpa;
  1237. context->free = paging_free;
  1238. context->prefetch_page = paging32_prefetch_page;
  1239. context->root_level = PT32_ROOT_LEVEL;
  1240. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1241. context->root_hpa = INVALID_PAGE;
  1242. return 0;
  1243. }
  1244. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1245. {
  1246. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1247. }
  1248. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1249. {
  1250. struct kvm_mmu *context = &vcpu->arch.mmu;
  1251. context->new_cr3 = nonpaging_new_cr3;
  1252. context->page_fault = tdp_page_fault;
  1253. context->free = nonpaging_free;
  1254. context->prefetch_page = nonpaging_prefetch_page;
  1255. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1256. context->root_hpa = INVALID_PAGE;
  1257. if (!is_paging(vcpu)) {
  1258. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1259. context->root_level = 0;
  1260. } else if (is_long_mode(vcpu)) {
  1261. context->gva_to_gpa = paging64_gva_to_gpa;
  1262. context->root_level = PT64_ROOT_LEVEL;
  1263. } else if (is_pae(vcpu)) {
  1264. context->gva_to_gpa = paging64_gva_to_gpa;
  1265. context->root_level = PT32E_ROOT_LEVEL;
  1266. } else {
  1267. context->gva_to_gpa = paging32_gva_to_gpa;
  1268. context->root_level = PT32_ROOT_LEVEL;
  1269. }
  1270. return 0;
  1271. }
  1272. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1273. {
  1274. ASSERT(vcpu);
  1275. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1276. if (!is_paging(vcpu))
  1277. return nonpaging_init_context(vcpu);
  1278. else if (is_long_mode(vcpu))
  1279. return paging64_init_context(vcpu);
  1280. else if (is_pae(vcpu))
  1281. return paging32E_init_context(vcpu);
  1282. else
  1283. return paging32_init_context(vcpu);
  1284. }
  1285. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1286. {
  1287. vcpu->arch.update_pte.pfn = bad_pfn;
  1288. if (tdp_enabled)
  1289. return init_kvm_tdp_mmu(vcpu);
  1290. else
  1291. return init_kvm_softmmu(vcpu);
  1292. }
  1293. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1294. {
  1295. ASSERT(vcpu);
  1296. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1297. vcpu->arch.mmu.free(vcpu);
  1298. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1299. }
  1300. }
  1301. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1302. {
  1303. destroy_kvm_mmu(vcpu);
  1304. return init_kvm_mmu(vcpu);
  1305. }
  1306. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1307. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1308. {
  1309. int r;
  1310. r = mmu_topup_memory_caches(vcpu);
  1311. if (r)
  1312. goto out;
  1313. spin_lock(&vcpu->kvm->mmu_lock);
  1314. kvm_mmu_free_some_pages(vcpu);
  1315. mmu_alloc_roots(vcpu);
  1316. spin_unlock(&vcpu->kvm->mmu_lock);
  1317. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1318. kvm_mmu_flush_tlb(vcpu);
  1319. out:
  1320. return r;
  1321. }
  1322. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1323. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1324. {
  1325. mmu_free_roots(vcpu);
  1326. }
  1327. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1328. struct kvm_mmu_page *sp,
  1329. u64 *spte)
  1330. {
  1331. u64 pte;
  1332. struct kvm_mmu_page *child;
  1333. pte = *spte;
  1334. if (is_shadow_present_pte(pte)) {
  1335. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1336. is_large_pte(pte))
  1337. rmap_remove(vcpu->kvm, spte);
  1338. else {
  1339. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1340. mmu_page_remove_parent_pte(child, spte);
  1341. }
  1342. }
  1343. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1344. if (is_large_pte(pte))
  1345. --vcpu->kvm->stat.lpages;
  1346. }
  1347. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1348. struct kvm_mmu_page *sp,
  1349. u64 *spte,
  1350. const void *new)
  1351. {
  1352. if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
  1353. && !vcpu->arch.update_pte.largepage) {
  1354. ++vcpu->kvm->stat.mmu_pde_zapped;
  1355. return;
  1356. }
  1357. ++vcpu->kvm->stat.mmu_pte_updated;
  1358. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1359. paging32_update_pte(vcpu, sp, spte, new);
  1360. else
  1361. paging64_update_pte(vcpu, sp, spte, new);
  1362. }
  1363. static bool need_remote_flush(u64 old, u64 new)
  1364. {
  1365. if (!is_shadow_present_pte(old))
  1366. return false;
  1367. if (!is_shadow_present_pte(new))
  1368. return true;
  1369. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1370. return true;
  1371. old ^= PT64_NX_MASK;
  1372. new ^= PT64_NX_MASK;
  1373. return (old & ~new & PT64_PERM_MASK) != 0;
  1374. }
  1375. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1376. {
  1377. if (need_remote_flush(old, new))
  1378. kvm_flush_remote_tlbs(vcpu->kvm);
  1379. else
  1380. kvm_mmu_flush_tlb(vcpu);
  1381. }
  1382. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1383. {
  1384. u64 *spte = vcpu->arch.last_pte_updated;
  1385. return !!(spte && (*spte & shadow_accessed_mask));
  1386. }
  1387. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1388. const u8 *new, int bytes)
  1389. {
  1390. gfn_t gfn;
  1391. int r;
  1392. u64 gpte = 0;
  1393. pfn_t pfn;
  1394. vcpu->arch.update_pte.largepage = 0;
  1395. if (bytes != 4 && bytes != 8)
  1396. return;
  1397. /*
  1398. * Assume that the pte write on a page table of the same type
  1399. * as the current vcpu paging mode. This is nearly always true
  1400. * (might be false while changing modes). Note it is verified later
  1401. * by update_pte().
  1402. */
  1403. if (is_pae(vcpu)) {
  1404. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1405. if ((bytes == 4) && (gpa % 4 == 0)) {
  1406. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1407. if (r)
  1408. return;
  1409. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1410. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1411. memcpy((void *)&gpte, new, 8);
  1412. }
  1413. } else {
  1414. if ((bytes == 4) && (gpa % 4 == 0))
  1415. memcpy((void *)&gpte, new, 4);
  1416. }
  1417. if (!is_present_pte(gpte))
  1418. return;
  1419. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1420. down_read(&current->mm->mmap_sem);
  1421. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1422. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1423. vcpu->arch.update_pte.largepage = 1;
  1424. }
  1425. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1426. up_read(&current->mm->mmap_sem);
  1427. if (is_error_pfn(pfn)) {
  1428. kvm_release_pfn_clean(pfn);
  1429. return;
  1430. }
  1431. vcpu->arch.update_pte.gfn = gfn;
  1432. vcpu->arch.update_pte.pfn = pfn;
  1433. }
  1434. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1435. const u8 *new, int bytes)
  1436. {
  1437. gfn_t gfn = gpa >> PAGE_SHIFT;
  1438. struct kvm_mmu_page *sp;
  1439. struct hlist_node *node, *n;
  1440. struct hlist_head *bucket;
  1441. unsigned index;
  1442. u64 entry, gentry;
  1443. u64 *spte;
  1444. unsigned offset = offset_in_page(gpa);
  1445. unsigned pte_size;
  1446. unsigned page_offset;
  1447. unsigned misaligned;
  1448. unsigned quadrant;
  1449. int level;
  1450. int flooded = 0;
  1451. int npte;
  1452. int r;
  1453. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1454. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1455. spin_lock(&vcpu->kvm->mmu_lock);
  1456. kvm_mmu_free_some_pages(vcpu);
  1457. ++vcpu->kvm->stat.mmu_pte_write;
  1458. kvm_mmu_audit(vcpu, "pre pte write");
  1459. if (gfn == vcpu->arch.last_pt_write_gfn
  1460. && !last_updated_pte_accessed(vcpu)) {
  1461. ++vcpu->arch.last_pt_write_count;
  1462. if (vcpu->arch.last_pt_write_count >= 3)
  1463. flooded = 1;
  1464. } else {
  1465. vcpu->arch.last_pt_write_gfn = gfn;
  1466. vcpu->arch.last_pt_write_count = 1;
  1467. vcpu->arch.last_pte_updated = NULL;
  1468. }
  1469. index = kvm_page_table_hashfn(gfn);
  1470. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1471. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1472. if (sp->gfn != gfn || sp->role.metaphysical)
  1473. continue;
  1474. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1475. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1476. misaligned |= bytes < 4;
  1477. if (misaligned || flooded) {
  1478. /*
  1479. * Misaligned accesses are too much trouble to fix
  1480. * up; also, they usually indicate a page is not used
  1481. * as a page table.
  1482. *
  1483. * If we're seeing too many writes to a page,
  1484. * it may no longer be a page table, or we may be
  1485. * forking, in which case it is better to unmap the
  1486. * page.
  1487. */
  1488. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1489. gpa, bytes, sp->role.word);
  1490. kvm_mmu_zap_page(vcpu->kvm, sp);
  1491. ++vcpu->kvm->stat.mmu_flooded;
  1492. continue;
  1493. }
  1494. page_offset = offset;
  1495. level = sp->role.level;
  1496. npte = 1;
  1497. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1498. page_offset <<= 1; /* 32->64 */
  1499. /*
  1500. * A 32-bit pde maps 4MB while the shadow pdes map
  1501. * only 2MB. So we need to double the offset again
  1502. * and zap two pdes instead of one.
  1503. */
  1504. if (level == PT32_ROOT_LEVEL) {
  1505. page_offset &= ~7; /* kill rounding error */
  1506. page_offset <<= 1;
  1507. npte = 2;
  1508. }
  1509. quadrant = page_offset >> PAGE_SHIFT;
  1510. page_offset &= ~PAGE_MASK;
  1511. if (quadrant != sp->role.quadrant)
  1512. continue;
  1513. }
  1514. spte = &sp->spt[page_offset / sizeof(*spte)];
  1515. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1516. gentry = 0;
  1517. r = kvm_read_guest_atomic(vcpu->kvm,
  1518. gpa & ~(u64)(pte_size - 1),
  1519. &gentry, pte_size);
  1520. new = (const void *)&gentry;
  1521. if (r < 0)
  1522. new = NULL;
  1523. }
  1524. while (npte--) {
  1525. entry = *spte;
  1526. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1527. if (new)
  1528. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1529. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1530. ++spte;
  1531. }
  1532. }
  1533. kvm_mmu_audit(vcpu, "post pte write");
  1534. spin_unlock(&vcpu->kvm->mmu_lock);
  1535. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  1536. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  1537. vcpu->arch.update_pte.pfn = bad_pfn;
  1538. }
  1539. }
  1540. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1541. {
  1542. gpa_t gpa;
  1543. int r;
  1544. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1545. spin_lock(&vcpu->kvm->mmu_lock);
  1546. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1547. spin_unlock(&vcpu->kvm->mmu_lock);
  1548. return r;
  1549. }
  1550. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1551. {
  1552. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1553. struct kvm_mmu_page *sp;
  1554. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1555. struct kvm_mmu_page, link);
  1556. kvm_mmu_zap_page(vcpu->kvm, sp);
  1557. ++vcpu->kvm->stat.mmu_recycled;
  1558. }
  1559. }
  1560. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1561. {
  1562. int r;
  1563. enum emulation_result er;
  1564. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1565. if (r < 0)
  1566. goto out;
  1567. if (!r) {
  1568. r = 1;
  1569. goto out;
  1570. }
  1571. r = mmu_topup_memory_caches(vcpu);
  1572. if (r)
  1573. goto out;
  1574. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1575. switch (er) {
  1576. case EMULATE_DONE:
  1577. return 1;
  1578. case EMULATE_DO_MMIO:
  1579. ++vcpu->stat.mmio_exits;
  1580. return 0;
  1581. case EMULATE_FAIL:
  1582. kvm_report_emulation_failure(vcpu, "pagetable");
  1583. return 1;
  1584. default:
  1585. BUG();
  1586. }
  1587. out:
  1588. return r;
  1589. }
  1590. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1591. void kvm_enable_tdp(void)
  1592. {
  1593. tdp_enabled = true;
  1594. }
  1595. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  1596. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1597. {
  1598. struct kvm_mmu_page *sp;
  1599. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  1600. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  1601. struct kvm_mmu_page, link);
  1602. kvm_mmu_zap_page(vcpu->kvm, sp);
  1603. }
  1604. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  1605. }
  1606. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1607. {
  1608. struct page *page;
  1609. int i;
  1610. ASSERT(vcpu);
  1611. if (vcpu->kvm->arch.n_requested_mmu_pages)
  1612. vcpu->kvm->arch.n_free_mmu_pages =
  1613. vcpu->kvm->arch.n_requested_mmu_pages;
  1614. else
  1615. vcpu->kvm->arch.n_free_mmu_pages =
  1616. vcpu->kvm->arch.n_alloc_mmu_pages;
  1617. /*
  1618. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1619. * Therefore we need to allocate shadow page tables in the first
  1620. * 4GB of memory, which happens to fit the DMA32 zone.
  1621. */
  1622. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1623. if (!page)
  1624. goto error_1;
  1625. vcpu->arch.mmu.pae_root = page_address(page);
  1626. for (i = 0; i < 4; ++i)
  1627. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1628. return 0;
  1629. error_1:
  1630. free_mmu_pages(vcpu);
  1631. return -ENOMEM;
  1632. }
  1633. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1634. {
  1635. ASSERT(vcpu);
  1636. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1637. return alloc_mmu_pages(vcpu);
  1638. }
  1639. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1640. {
  1641. ASSERT(vcpu);
  1642. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1643. return init_kvm_mmu(vcpu);
  1644. }
  1645. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1646. {
  1647. ASSERT(vcpu);
  1648. destroy_kvm_mmu(vcpu);
  1649. free_mmu_pages(vcpu);
  1650. mmu_free_memory_caches(vcpu);
  1651. }
  1652. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1653. {
  1654. struct kvm_mmu_page *sp;
  1655. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  1656. int i;
  1657. u64 *pt;
  1658. if (!test_bit(slot, &sp->slot_bitmap))
  1659. continue;
  1660. pt = sp->spt;
  1661. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1662. /* avoid RMW */
  1663. if (pt[i] & PT_WRITABLE_MASK)
  1664. pt[i] &= ~PT_WRITABLE_MASK;
  1665. }
  1666. }
  1667. void kvm_mmu_zap_all(struct kvm *kvm)
  1668. {
  1669. struct kvm_mmu_page *sp, *node;
  1670. spin_lock(&kvm->mmu_lock);
  1671. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  1672. kvm_mmu_zap_page(kvm, sp);
  1673. spin_unlock(&kvm->mmu_lock);
  1674. kvm_flush_remote_tlbs(kvm);
  1675. }
  1676. void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  1677. {
  1678. struct kvm_mmu_page *page;
  1679. page = container_of(kvm->arch.active_mmu_pages.prev,
  1680. struct kvm_mmu_page, link);
  1681. kvm_mmu_zap_page(kvm, page);
  1682. }
  1683. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  1684. {
  1685. struct kvm *kvm;
  1686. struct kvm *kvm_freed = NULL;
  1687. int cache_count = 0;
  1688. spin_lock(&kvm_lock);
  1689. list_for_each_entry(kvm, &vm_list, vm_list) {
  1690. int npages;
  1691. spin_lock(&kvm->mmu_lock);
  1692. npages = kvm->arch.n_alloc_mmu_pages -
  1693. kvm->arch.n_free_mmu_pages;
  1694. cache_count += npages;
  1695. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  1696. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  1697. cache_count--;
  1698. kvm_freed = kvm;
  1699. }
  1700. nr_to_scan--;
  1701. spin_unlock(&kvm->mmu_lock);
  1702. }
  1703. if (kvm_freed)
  1704. list_move_tail(&kvm_freed->vm_list, &vm_list);
  1705. spin_unlock(&kvm_lock);
  1706. return cache_count;
  1707. }
  1708. static struct shrinker mmu_shrinker = {
  1709. .shrink = mmu_shrink,
  1710. .seeks = DEFAULT_SEEKS * 10,
  1711. };
  1712. void mmu_destroy_caches(void)
  1713. {
  1714. if (pte_chain_cache)
  1715. kmem_cache_destroy(pte_chain_cache);
  1716. if (rmap_desc_cache)
  1717. kmem_cache_destroy(rmap_desc_cache);
  1718. if (mmu_page_header_cache)
  1719. kmem_cache_destroy(mmu_page_header_cache);
  1720. }
  1721. void kvm_mmu_module_exit(void)
  1722. {
  1723. mmu_destroy_caches();
  1724. unregister_shrinker(&mmu_shrinker);
  1725. }
  1726. int kvm_mmu_module_init(void)
  1727. {
  1728. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1729. sizeof(struct kvm_pte_chain),
  1730. 0, 0, NULL);
  1731. if (!pte_chain_cache)
  1732. goto nomem;
  1733. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1734. sizeof(struct kvm_rmap_desc),
  1735. 0, 0, NULL);
  1736. if (!rmap_desc_cache)
  1737. goto nomem;
  1738. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1739. sizeof(struct kvm_mmu_page),
  1740. 0, 0, NULL);
  1741. if (!mmu_page_header_cache)
  1742. goto nomem;
  1743. register_shrinker(&mmu_shrinker);
  1744. return 0;
  1745. nomem:
  1746. mmu_destroy_caches();
  1747. return -ENOMEM;
  1748. }
  1749. /*
  1750. * Caculate mmu pages needed for kvm.
  1751. */
  1752. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1753. {
  1754. int i;
  1755. unsigned int nr_mmu_pages;
  1756. unsigned int nr_pages = 0;
  1757. for (i = 0; i < kvm->nmemslots; i++)
  1758. nr_pages += kvm->memslots[i].npages;
  1759. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1760. nr_mmu_pages = max(nr_mmu_pages,
  1761. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1762. return nr_mmu_pages;
  1763. }
  1764. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1765. unsigned len)
  1766. {
  1767. if (len > buffer->len)
  1768. return NULL;
  1769. return buffer->ptr;
  1770. }
  1771. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1772. unsigned len)
  1773. {
  1774. void *ret;
  1775. ret = pv_mmu_peek_buffer(buffer, len);
  1776. if (!ret)
  1777. return ret;
  1778. buffer->ptr += len;
  1779. buffer->len -= len;
  1780. buffer->processed += len;
  1781. return ret;
  1782. }
  1783. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  1784. gpa_t addr, gpa_t value)
  1785. {
  1786. int bytes = 8;
  1787. int r;
  1788. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  1789. bytes = 4;
  1790. r = mmu_topup_memory_caches(vcpu);
  1791. if (r)
  1792. return r;
  1793. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  1794. return -EFAULT;
  1795. return 1;
  1796. }
  1797. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1798. {
  1799. kvm_x86_ops->tlb_flush(vcpu);
  1800. return 1;
  1801. }
  1802. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  1803. {
  1804. spin_lock(&vcpu->kvm->mmu_lock);
  1805. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  1806. spin_unlock(&vcpu->kvm->mmu_lock);
  1807. return 1;
  1808. }
  1809. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  1810. struct kvm_pv_mmu_op_buffer *buffer)
  1811. {
  1812. struct kvm_mmu_op_header *header;
  1813. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  1814. if (!header)
  1815. return 0;
  1816. switch (header->op) {
  1817. case KVM_MMU_OP_WRITE_PTE: {
  1818. struct kvm_mmu_op_write_pte *wpte;
  1819. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  1820. if (!wpte)
  1821. return 0;
  1822. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  1823. wpte->pte_val);
  1824. }
  1825. case KVM_MMU_OP_FLUSH_TLB: {
  1826. struct kvm_mmu_op_flush_tlb *ftlb;
  1827. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  1828. if (!ftlb)
  1829. return 0;
  1830. return kvm_pv_mmu_flush_tlb(vcpu);
  1831. }
  1832. case KVM_MMU_OP_RELEASE_PT: {
  1833. struct kvm_mmu_op_release_pt *rpt;
  1834. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  1835. if (!rpt)
  1836. return 0;
  1837. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  1838. }
  1839. default: return 0;
  1840. }
  1841. }
  1842. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  1843. gpa_t addr, unsigned long *ret)
  1844. {
  1845. int r;
  1846. struct kvm_pv_mmu_op_buffer buffer;
  1847. buffer.ptr = buffer.buf;
  1848. buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
  1849. buffer.processed = 0;
  1850. r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
  1851. if (r)
  1852. goto out;
  1853. while (buffer.len) {
  1854. r = kvm_pv_mmu_op_one(vcpu, &buffer);
  1855. if (r < 0)
  1856. goto out;
  1857. if (r == 0)
  1858. break;
  1859. }
  1860. r = 1;
  1861. out:
  1862. *ret = buffer.processed;
  1863. return r;
  1864. }
  1865. #ifdef AUDIT
  1866. static const char *audit_msg;
  1867. static gva_t canonicalize(gva_t gva)
  1868. {
  1869. #ifdef CONFIG_X86_64
  1870. gva = (long long)(gva << 16) >> 16;
  1871. #endif
  1872. return gva;
  1873. }
  1874. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1875. gva_t va, int level)
  1876. {
  1877. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1878. int i;
  1879. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1880. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1881. u64 ent = pt[i];
  1882. if (ent == shadow_trap_nonpresent_pte)
  1883. continue;
  1884. va = canonicalize(va);
  1885. if (level > 1) {
  1886. if (ent == shadow_notrap_nonpresent_pte)
  1887. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1888. " in nonleaf level: levels %d gva %lx"
  1889. " level %d pte %llx\n", audit_msg,
  1890. vcpu->arch.mmu.root_level, va, level, ent);
  1891. audit_mappings_page(vcpu, ent, va, level - 1);
  1892. } else {
  1893. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  1894. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  1895. if (is_shadow_present_pte(ent)
  1896. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1897. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1898. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1899. audit_msg, vcpu->arch.mmu.root_level,
  1900. va, gpa, hpa, ent,
  1901. is_shadow_present_pte(ent));
  1902. else if (ent == shadow_notrap_nonpresent_pte
  1903. && !is_error_hpa(hpa))
  1904. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1905. " valid guest gva %lx\n", audit_msg, va);
  1906. kvm_release_pfn_clean(pfn);
  1907. }
  1908. }
  1909. }
  1910. static void audit_mappings(struct kvm_vcpu *vcpu)
  1911. {
  1912. unsigned i;
  1913. if (vcpu->arch.mmu.root_level == 4)
  1914. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  1915. else
  1916. for (i = 0; i < 4; ++i)
  1917. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  1918. audit_mappings_page(vcpu,
  1919. vcpu->arch.mmu.pae_root[i],
  1920. i << 30,
  1921. 2);
  1922. }
  1923. static int count_rmaps(struct kvm_vcpu *vcpu)
  1924. {
  1925. int nmaps = 0;
  1926. int i, j, k;
  1927. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1928. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1929. struct kvm_rmap_desc *d;
  1930. for (j = 0; j < m->npages; ++j) {
  1931. unsigned long *rmapp = &m->rmap[j];
  1932. if (!*rmapp)
  1933. continue;
  1934. if (!(*rmapp & 1)) {
  1935. ++nmaps;
  1936. continue;
  1937. }
  1938. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1939. while (d) {
  1940. for (k = 0; k < RMAP_EXT; ++k)
  1941. if (d->shadow_ptes[k])
  1942. ++nmaps;
  1943. else
  1944. break;
  1945. d = d->more;
  1946. }
  1947. }
  1948. }
  1949. return nmaps;
  1950. }
  1951. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1952. {
  1953. int nmaps = 0;
  1954. struct kvm_mmu_page *sp;
  1955. int i;
  1956. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1957. u64 *pt = sp->spt;
  1958. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1959. continue;
  1960. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1961. u64 ent = pt[i];
  1962. if (!(ent & PT_PRESENT_MASK))
  1963. continue;
  1964. if (!(ent & PT_WRITABLE_MASK))
  1965. continue;
  1966. ++nmaps;
  1967. }
  1968. }
  1969. return nmaps;
  1970. }
  1971. static void audit_rmap(struct kvm_vcpu *vcpu)
  1972. {
  1973. int n_rmap = count_rmaps(vcpu);
  1974. int n_actual = count_writable_mappings(vcpu);
  1975. if (n_rmap != n_actual)
  1976. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1977. __func__, audit_msg, n_rmap, n_actual);
  1978. }
  1979. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1980. {
  1981. struct kvm_mmu_page *sp;
  1982. struct kvm_memory_slot *slot;
  1983. unsigned long *rmapp;
  1984. gfn_t gfn;
  1985. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1986. if (sp->role.metaphysical)
  1987. continue;
  1988. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  1989. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  1990. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1991. if (*rmapp)
  1992. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1993. " mappings: gfn %lx role %x\n",
  1994. __func__, audit_msg, sp->gfn,
  1995. sp->role.word);
  1996. }
  1997. }
  1998. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1999. {
  2000. int olddbg = dbg;
  2001. dbg = 0;
  2002. audit_msg = msg;
  2003. audit_rmap(vcpu);
  2004. audit_write_protection(vcpu);
  2005. audit_mappings(vcpu);
  2006. dbg = olddbg;
  2007. }
  2008. #endif