hpsa.c 107 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  84. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  85. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  86. {0,}
  87. };
  88. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  89. /* board_id = Subsystem Device ID & Vendor ID
  90. * product = Marketing Name for the board
  91. * access = Address of the struct of function pointers
  92. */
  93. static struct board_type products[] = {
  94. {0x3241103C, "Smart Array P212", &SA5_access},
  95. {0x3243103C, "Smart Array P410", &SA5_access},
  96. {0x3245103C, "Smart Array P410i", &SA5_access},
  97. {0x3247103C, "Smart Array P411", &SA5_access},
  98. {0x3249103C, "Smart Array P812", &SA5_access},
  99. {0x324a103C, "Smart Array P712m", &SA5_access},
  100. {0x324b103C, "Smart Array P711m", &SA5_access},
  101. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  102. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  103. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  104. };
  105. static int number_of_controllers;
  106. static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
  107. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  108. static void start_io(struct ctlr_info *h);
  109. #ifdef CONFIG_COMPAT
  110. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  111. #endif
  112. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  113. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  114. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  115. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  116. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  117. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  118. int cmd_type);
  119. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  120. void (*done)(struct scsi_cmnd *));
  121. static void hpsa_scan_start(struct Scsi_Host *);
  122. static int hpsa_scan_finished(struct Scsi_Host *sh,
  123. unsigned long elapsed_time);
  124. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  125. int qdepth, int reason);
  126. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  127. static int hpsa_slave_alloc(struct scsi_device *sdev);
  128. static void hpsa_slave_destroy(struct scsi_device *sdev);
  129. static ssize_t raid_level_show(struct device *dev,
  130. struct device_attribute *attr, char *buf);
  131. static ssize_t lunid_show(struct device *dev,
  132. struct device_attribute *attr, char *buf);
  133. static ssize_t unique_id_show(struct device *dev,
  134. struct device_attribute *attr, char *buf);
  135. static ssize_t host_show_firmware_revision(struct device *dev,
  136. struct device_attribute *attr, char *buf);
  137. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  138. static ssize_t host_store_rescan(struct device *dev,
  139. struct device_attribute *attr, const char *buf, size_t count);
  140. static int check_for_unit_attention(struct ctlr_info *h,
  141. struct CommandList *c);
  142. static void check_ioctl_unit_attention(struct ctlr_info *h,
  143. struct CommandList *c);
  144. /* performant mode helper functions */
  145. static void calc_bucket_map(int *bucket, int num_buckets,
  146. int nsgs, int *bucket_map);
  147. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  148. static inline u32 next_command(struct ctlr_info *h);
  149. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  150. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  151. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  152. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  153. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  154. host_show_firmware_revision, NULL);
  155. static struct device_attribute *hpsa_sdev_attrs[] = {
  156. &dev_attr_raid_level,
  157. &dev_attr_lunid,
  158. &dev_attr_unique_id,
  159. NULL,
  160. };
  161. static struct device_attribute *hpsa_shost_attrs[] = {
  162. &dev_attr_rescan,
  163. &dev_attr_firmware_revision,
  164. NULL,
  165. };
  166. static struct scsi_host_template hpsa_driver_template = {
  167. .module = THIS_MODULE,
  168. .name = "hpsa",
  169. .proc_name = "hpsa",
  170. .queuecommand = hpsa_scsi_queue_command,
  171. .scan_start = hpsa_scan_start,
  172. .scan_finished = hpsa_scan_finished,
  173. .change_queue_depth = hpsa_change_queue_depth,
  174. .this_id = -1,
  175. .use_clustering = ENABLE_CLUSTERING,
  176. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  177. .ioctl = hpsa_ioctl,
  178. .slave_alloc = hpsa_slave_alloc,
  179. .slave_destroy = hpsa_slave_destroy,
  180. #ifdef CONFIG_COMPAT
  181. .compat_ioctl = hpsa_compat_ioctl,
  182. #endif
  183. .sdev_attrs = hpsa_sdev_attrs,
  184. .shost_attrs = hpsa_shost_attrs,
  185. };
  186. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  187. {
  188. unsigned long *priv = shost_priv(sdev->host);
  189. return (struct ctlr_info *) *priv;
  190. }
  191. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  192. {
  193. unsigned long *priv = shost_priv(sh);
  194. return (struct ctlr_info *) *priv;
  195. }
  196. static int check_for_unit_attention(struct ctlr_info *h,
  197. struct CommandList *c)
  198. {
  199. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  200. return 0;
  201. switch (c->err_info->SenseInfo[12]) {
  202. case STATE_CHANGED:
  203. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  204. "detected, command retried\n", h->ctlr);
  205. break;
  206. case LUN_FAILED:
  207. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  208. "detected, action required\n", h->ctlr);
  209. break;
  210. case REPORT_LUNS_CHANGED:
  211. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  212. "changed, action required\n", h->ctlr);
  213. /*
  214. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  215. */
  216. break;
  217. case POWER_OR_RESET:
  218. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  219. "or device reset detected\n", h->ctlr);
  220. break;
  221. case UNIT_ATTENTION_CLEARED:
  222. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  223. "cleared by another initiator\n", h->ctlr);
  224. break;
  225. default:
  226. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  227. "unit attention detected\n", h->ctlr);
  228. break;
  229. }
  230. return 1;
  231. }
  232. static ssize_t host_store_rescan(struct device *dev,
  233. struct device_attribute *attr,
  234. const char *buf, size_t count)
  235. {
  236. struct ctlr_info *h;
  237. struct Scsi_Host *shost = class_to_shost(dev);
  238. h = shost_to_hba(shost);
  239. hpsa_scan_start(h->scsi_host);
  240. return count;
  241. }
  242. static ssize_t host_show_firmware_revision(struct device *dev,
  243. struct device_attribute *attr, char *buf)
  244. {
  245. struct ctlr_info *h;
  246. struct Scsi_Host *shost = class_to_shost(dev);
  247. unsigned char *fwrev;
  248. h = shost_to_hba(shost);
  249. if (!h->hba_inquiry_data)
  250. return 0;
  251. fwrev = &h->hba_inquiry_data[32];
  252. return snprintf(buf, 20, "%c%c%c%c\n",
  253. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  254. }
  255. /* Enqueuing and dequeuing functions for cmdlists. */
  256. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  257. {
  258. hlist_add_head(&c->list, list);
  259. }
  260. static inline u32 next_command(struct ctlr_info *h)
  261. {
  262. u32 a;
  263. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  264. return h->access.command_completed(h);
  265. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  266. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  267. (h->reply_pool_head)++;
  268. h->commands_outstanding--;
  269. } else {
  270. a = FIFO_EMPTY;
  271. }
  272. /* Check for wraparound */
  273. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  274. h->reply_pool_head = h->reply_pool;
  275. h->reply_pool_wraparound ^= 1;
  276. }
  277. return a;
  278. }
  279. /* set_performant_mode: Modify the tag for cciss performant
  280. * set bit 0 for pull model, bits 3-1 for block fetch
  281. * register number
  282. */
  283. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  284. {
  285. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  286. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  287. }
  288. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  289. struct CommandList *c)
  290. {
  291. unsigned long flags;
  292. set_performant_mode(h, c);
  293. spin_lock_irqsave(&h->lock, flags);
  294. addQ(&h->reqQ, c);
  295. h->Qdepth++;
  296. start_io(h);
  297. spin_unlock_irqrestore(&h->lock, flags);
  298. }
  299. static inline void removeQ(struct CommandList *c)
  300. {
  301. if (WARN_ON(hlist_unhashed(&c->list)))
  302. return;
  303. hlist_del_init(&c->list);
  304. }
  305. static inline int is_hba_lunid(unsigned char scsi3addr[])
  306. {
  307. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  308. }
  309. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  310. {
  311. return (scsi3addr[3] & 0xC0) == 0x40;
  312. }
  313. static inline int is_scsi_rev_5(struct ctlr_info *h)
  314. {
  315. if (!h->hba_inquiry_data)
  316. return 0;
  317. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  318. return 1;
  319. return 0;
  320. }
  321. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  322. "UNKNOWN"
  323. };
  324. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  325. static ssize_t raid_level_show(struct device *dev,
  326. struct device_attribute *attr, char *buf)
  327. {
  328. ssize_t l = 0;
  329. unsigned char rlevel;
  330. struct ctlr_info *h;
  331. struct scsi_device *sdev;
  332. struct hpsa_scsi_dev_t *hdev;
  333. unsigned long flags;
  334. sdev = to_scsi_device(dev);
  335. h = sdev_to_hba(sdev);
  336. spin_lock_irqsave(&h->lock, flags);
  337. hdev = sdev->hostdata;
  338. if (!hdev) {
  339. spin_unlock_irqrestore(&h->lock, flags);
  340. return -ENODEV;
  341. }
  342. /* Is this even a logical drive? */
  343. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  344. spin_unlock_irqrestore(&h->lock, flags);
  345. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  346. return l;
  347. }
  348. rlevel = hdev->raid_level;
  349. spin_unlock_irqrestore(&h->lock, flags);
  350. if (rlevel > RAID_UNKNOWN)
  351. rlevel = RAID_UNKNOWN;
  352. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  353. return l;
  354. }
  355. static ssize_t lunid_show(struct device *dev,
  356. struct device_attribute *attr, char *buf)
  357. {
  358. struct ctlr_info *h;
  359. struct scsi_device *sdev;
  360. struct hpsa_scsi_dev_t *hdev;
  361. unsigned long flags;
  362. unsigned char lunid[8];
  363. sdev = to_scsi_device(dev);
  364. h = sdev_to_hba(sdev);
  365. spin_lock_irqsave(&h->lock, flags);
  366. hdev = sdev->hostdata;
  367. if (!hdev) {
  368. spin_unlock_irqrestore(&h->lock, flags);
  369. return -ENODEV;
  370. }
  371. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  372. spin_unlock_irqrestore(&h->lock, flags);
  373. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  374. lunid[0], lunid[1], lunid[2], lunid[3],
  375. lunid[4], lunid[5], lunid[6], lunid[7]);
  376. }
  377. static ssize_t unique_id_show(struct device *dev,
  378. struct device_attribute *attr, char *buf)
  379. {
  380. struct ctlr_info *h;
  381. struct scsi_device *sdev;
  382. struct hpsa_scsi_dev_t *hdev;
  383. unsigned long flags;
  384. unsigned char sn[16];
  385. sdev = to_scsi_device(dev);
  386. h = sdev_to_hba(sdev);
  387. spin_lock_irqsave(&h->lock, flags);
  388. hdev = sdev->hostdata;
  389. if (!hdev) {
  390. spin_unlock_irqrestore(&h->lock, flags);
  391. return -ENODEV;
  392. }
  393. memcpy(sn, hdev->device_id, sizeof(sn));
  394. spin_unlock_irqrestore(&h->lock, flags);
  395. return snprintf(buf, 16 * 2 + 2,
  396. "%02X%02X%02X%02X%02X%02X%02X%02X"
  397. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  398. sn[0], sn[1], sn[2], sn[3],
  399. sn[4], sn[5], sn[6], sn[7],
  400. sn[8], sn[9], sn[10], sn[11],
  401. sn[12], sn[13], sn[14], sn[15]);
  402. }
  403. static int hpsa_find_target_lun(struct ctlr_info *h,
  404. unsigned char scsi3addr[], int bus, int *target, int *lun)
  405. {
  406. /* finds an unused bus, target, lun for a new physical device
  407. * assumes h->devlock is held
  408. */
  409. int i, found = 0;
  410. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  411. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  412. for (i = 0; i < h->ndevices; i++) {
  413. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  414. set_bit(h->dev[i]->target, lun_taken);
  415. }
  416. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  417. if (!test_bit(i, lun_taken)) {
  418. /* *bus = 1; */
  419. *target = i;
  420. *lun = 0;
  421. found = 1;
  422. break;
  423. }
  424. }
  425. return !found;
  426. }
  427. /* Add an entry into h->dev[] array. */
  428. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  429. struct hpsa_scsi_dev_t *device,
  430. struct hpsa_scsi_dev_t *added[], int *nadded)
  431. {
  432. /* assumes h->devlock is held */
  433. int n = h->ndevices;
  434. int i;
  435. unsigned char addr1[8], addr2[8];
  436. struct hpsa_scsi_dev_t *sd;
  437. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  438. dev_err(&h->pdev->dev, "too many devices, some will be "
  439. "inaccessible.\n");
  440. return -1;
  441. }
  442. /* physical devices do not have lun or target assigned until now. */
  443. if (device->lun != -1)
  444. /* Logical device, lun is already assigned. */
  445. goto lun_assigned;
  446. /* If this device a non-zero lun of a multi-lun device
  447. * byte 4 of the 8-byte LUN addr will contain the logical
  448. * unit no, zero otherise.
  449. */
  450. if (device->scsi3addr[4] == 0) {
  451. /* This is not a non-zero lun of a multi-lun device */
  452. if (hpsa_find_target_lun(h, device->scsi3addr,
  453. device->bus, &device->target, &device->lun) != 0)
  454. return -1;
  455. goto lun_assigned;
  456. }
  457. /* This is a non-zero lun of a multi-lun device.
  458. * Search through our list and find the device which
  459. * has the same 8 byte LUN address, excepting byte 4.
  460. * Assign the same bus and target for this new LUN.
  461. * Use the logical unit number from the firmware.
  462. */
  463. memcpy(addr1, device->scsi3addr, 8);
  464. addr1[4] = 0;
  465. for (i = 0; i < n; i++) {
  466. sd = h->dev[i];
  467. memcpy(addr2, sd->scsi3addr, 8);
  468. addr2[4] = 0;
  469. /* differ only in byte 4? */
  470. if (memcmp(addr1, addr2, 8) == 0) {
  471. device->bus = sd->bus;
  472. device->target = sd->target;
  473. device->lun = device->scsi3addr[4];
  474. break;
  475. }
  476. }
  477. if (device->lun == -1) {
  478. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  479. " suspect firmware bug or unsupported hardware "
  480. "configuration.\n");
  481. return -1;
  482. }
  483. lun_assigned:
  484. h->dev[n] = device;
  485. h->ndevices++;
  486. added[*nadded] = device;
  487. (*nadded)++;
  488. /* initially, (before registering with scsi layer) we don't
  489. * know our hostno and we don't want to print anything first
  490. * time anyway (the scsi layer's inquiries will show that info)
  491. */
  492. /* if (hostno != -1) */
  493. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  494. scsi_device_type(device->devtype), hostno,
  495. device->bus, device->target, device->lun);
  496. return 0;
  497. }
  498. /* Replace an entry from h->dev[] array. */
  499. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  500. int entry, struct hpsa_scsi_dev_t *new_entry,
  501. struct hpsa_scsi_dev_t *added[], int *nadded,
  502. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  503. {
  504. /* assumes h->devlock is held */
  505. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  506. removed[*nremoved] = h->dev[entry];
  507. (*nremoved)++;
  508. h->dev[entry] = new_entry;
  509. added[*nadded] = new_entry;
  510. (*nadded)++;
  511. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  512. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  513. new_entry->target, new_entry->lun);
  514. }
  515. /* Remove an entry from h->dev[] array. */
  516. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  517. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  518. {
  519. /* assumes h->devlock is held */
  520. int i;
  521. struct hpsa_scsi_dev_t *sd;
  522. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  523. sd = h->dev[entry];
  524. removed[*nremoved] = h->dev[entry];
  525. (*nremoved)++;
  526. for (i = entry; i < h->ndevices-1; i++)
  527. h->dev[i] = h->dev[i+1];
  528. h->ndevices--;
  529. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  530. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  531. sd->lun);
  532. }
  533. #define SCSI3ADDR_EQ(a, b) ( \
  534. (a)[7] == (b)[7] && \
  535. (a)[6] == (b)[6] && \
  536. (a)[5] == (b)[5] && \
  537. (a)[4] == (b)[4] && \
  538. (a)[3] == (b)[3] && \
  539. (a)[2] == (b)[2] && \
  540. (a)[1] == (b)[1] && \
  541. (a)[0] == (b)[0])
  542. static void fixup_botched_add(struct ctlr_info *h,
  543. struct hpsa_scsi_dev_t *added)
  544. {
  545. /* called when scsi_add_device fails in order to re-adjust
  546. * h->dev[] to match the mid layer's view.
  547. */
  548. unsigned long flags;
  549. int i, j;
  550. spin_lock_irqsave(&h->lock, flags);
  551. for (i = 0; i < h->ndevices; i++) {
  552. if (h->dev[i] == added) {
  553. for (j = i; j < h->ndevices-1; j++)
  554. h->dev[j] = h->dev[j+1];
  555. h->ndevices--;
  556. break;
  557. }
  558. }
  559. spin_unlock_irqrestore(&h->lock, flags);
  560. kfree(added);
  561. }
  562. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  563. struct hpsa_scsi_dev_t *dev2)
  564. {
  565. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  566. (dev1->lun != -1 && dev2->lun != -1)) &&
  567. dev1->devtype != 0x0C)
  568. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  569. /* we compare everything except lun and target as these
  570. * are not yet assigned. Compare parts likely
  571. * to differ first
  572. */
  573. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  574. sizeof(dev1->scsi3addr)) != 0)
  575. return 0;
  576. if (memcmp(dev1->device_id, dev2->device_id,
  577. sizeof(dev1->device_id)) != 0)
  578. return 0;
  579. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  580. return 0;
  581. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  582. return 0;
  583. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  584. return 0;
  585. if (dev1->devtype != dev2->devtype)
  586. return 0;
  587. if (dev1->raid_level != dev2->raid_level)
  588. return 0;
  589. if (dev1->bus != dev2->bus)
  590. return 0;
  591. return 1;
  592. }
  593. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  594. * and return needle location in *index. If scsi3addr matches, but not
  595. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  596. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  597. */
  598. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  599. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  600. int *index)
  601. {
  602. int i;
  603. #define DEVICE_NOT_FOUND 0
  604. #define DEVICE_CHANGED 1
  605. #define DEVICE_SAME 2
  606. for (i = 0; i < haystack_size; i++) {
  607. if (haystack[i] == NULL) /* previously removed. */
  608. continue;
  609. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  610. *index = i;
  611. if (device_is_the_same(needle, haystack[i]))
  612. return DEVICE_SAME;
  613. else
  614. return DEVICE_CHANGED;
  615. }
  616. }
  617. *index = -1;
  618. return DEVICE_NOT_FOUND;
  619. }
  620. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  621. struct hpsa_scsi_dev_t *sd[], int nsds)
  622. {
  623. /* sd contains scsi3 addresses and devtypes, and inquiry
  624. * data. This function takes what's in sd to be the current
  625. * reality and updates h->dev[] to reflect that reality.
  626. */
  627. int i, entry, device_change, changes = 0;
  628. struct hpsa_scsi_dev_t *csd;
  629. unsigned long flags;
  630. struct hpsa_scsi_dev_t **added, **removed;
  631. int nadded, nremoved;
  632. struct Scsi_Host *sh = NULL;
  633. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  634. GFP_KERNEL);
  635. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  636. GFP_KERNEL);
  637. if (!added || !removed) {
  638. dev_warn(&h->pdev->dev, "out of memory in "
  639. "adjust_hpsa_scsi_table\n");
  640. goto free_and_out;
  641. }
  642. spin_lock_irqsave(&h->devlock, flags);
  643. /* find any devices in h->dev[] that are not in
  644. * sd[] and remove them from h->dev[], and for any
  645. * devices which have changed, remove the old device
  646. * info and add the new device info.
  647. */
  648. i = 0;
  649. nremoved = 0;
  650. nadded = 0;
  651. while (i < h->ndevices) {
  652. csd = h->dev[i];
  653. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  654. if (device_change == DEVICE_NOT_FOUND) {
  655. changes++;
  656. hpsa_scsi_remove_entry(h, hostno, i,
  657. removed, &nremoved);
  658. continue; /* remove ^^^, hence i not incremented */
  659. } else if (device_change == DEVICE_CHANGED) {
  660. changes++;
  661. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  662. added, &nadded, removed, &nremoved);
  663. /* Set it to NULL to prevent it from being freed
  664. * at the bottom of hpsa_update_scsi_devices()
  665. */
  666. sd[entry] = NULL;
  667. }
  668. i++;
  669. }
  670. /* Now, make sure every device listed in sd[] is also
  671. * listed in h->dev[], adding them if they aren't found
  672. */
  673. for (i = 0; i < nsds; i++) {
  674. if (!sd[i]) /* if already added above. */
  675. continue;
  676. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  677. h->ndevices, &entry);
  678. if (device_change == DEVICE_NOT_FOUND) {
  679. changes++;
  680. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  681. added, &nadded) != 0)
  682. break;
  683. sd[i] = NULL; /* prevent from being freed later. */
  684. } else if (device_change == DEVICE_CHANGED) {
  685. /* should never happen... */
  686. changes++;
  687. dev_warn(&h->pdev->dev,
  688. "device unexpectedly changed.\n");
  689. /* but if it does happen, we just ignore that device */
  690. }
  691. }
  692. spin_unlock_irqrestore(&h->devlock, flags);
  693. /* Don't notify scsi mid layer of any changes the first time through
  694. * (or if there are no changes) scsi_scan_host will do it later the
  695. * first time through.
  696. */
  697. if (hostno == -1 || !changes)
  698. goto free_and_out;
  699. sh = h->scsi_host;
  700. /* Notify scsi mid layer of any removed devices */
  701. for (i = 0; i < nremoved; i++) {
  702. struct scsi_device *sdev =
  703. scsi_device_lookup(sh, removed[i]->bus,
  704. removed[i]->target, removed[i]->lun);
  705. if (sdev != NULL) {
  706. scsi_remove_device(sdev);
  707. scsi_device_put(sdev);
  708. } else {
  709. /* We don't expect to get here.
  710. * future cmds to this device will get selection
  711. * timeout as if the device was gone.
  712. */
  713. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  714. " for removal.", hostno, removed[i]->bus,
  715. removed[i]->target, removed[i]->lun);
  716. }
  717. kfree(removed[i]);
  718. removed[i] = NULL;
  719. }
  720. /* Notify scsi mid layer of any added devices */
  721. for (i = 0; i < nadded; i++) {
  722. if (scsi_add_device(sh, added[i]->bus,
  723. added[i]->target, added[i]->lun) == 0)
  724. continue;
  725. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  726. "device not added.\n", hostno, added[i]->bus,
  727. added[i]->target, added[i]->lun);
  728. /* now we have to remove it from h->dev,
  729. * since it didn't get added to scsi mid layer
  730. */
  731. fixup_botched_add(h, added[i]);
  732. }
  733. free_and_out:
  734. kfree(added);
  735. kfree(removed);
  736. }
  737. /*
  738. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  739. * Assume's h->devlock is held.
  740. */
  741. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  742. int bus, int target, int lun)
  743. {
  744. int i;
  745. struct hpsa_scsi_dev_t *sd;
  746. for (i = 0; i < h->ndevices; i++) {
  747. sd = h->dev[i];
  748. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  749. return sd;
  750. }
  751. return NULL;
  752. }
  753. /* link sdev->hostdata to our per-device structure. */
  754. static int hpsa_slave_alloc(struct scsi_device *sdev)
  755. {
  756. struct hpsa_scsi_dev_t *sd;
  757. unsigned long flags;
  758. struct ctlr_info *h;
  759. h = sdev_to_hba(sdev);
  760. spin_lock_irqsave(&h->devlock, flags);
  761. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  762. sdev_id(sdev), sdev->lun);
  763. if (sd != NULL)
  764. sdev->hostdata = sd;
  765. spin_unlock_irqrestore(&h->devlock, flags);
  766. return 0;
  767. }
  768. static void hpsa_slave_destroy(struct scsi_device *sdev)
  769. {
  770. /* nothing to do. */
  771. }
  772. static void hpsa_scsi_setup(struct ctlr_info *h)
  773. {
  774. h->ndevices = 0;
  775. h->scsi_host = NULL;
  776. spin_lock_init(&h->devlock);
  777. }
  778. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  779. {
  780. int i;
  781. if (!h->cmd_sg_list)
  782. return;
  783. for (i = 0; i < h->nr_cmds; i++) {
  784. kfree(h->cmd_sg_list[i]);
  785. h->cmd_sg_list[i] = NULL;
  786. }
  787. kfree(h->cmd_sg_list);
  788. h->cmd_sg_list = NULL;
  789. }
  790. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  791. {
  792. int i;
  793. if (h->chainsize <= 0)
  794. return 0;
  795. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  796. GFP_KERNEL);
  797. if (!h->cmd_sg_list)
  798. return -ENOMEM;
  799. for (i = 0; i < h->nr_cmds; i++) {
  800. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  801. h->chainsize, GFP_KERNEL);
  802. if (!h->cmd_sg_list[i])
  803. goto clean;
  804. }
  805. return 0;
  806. clean:
  807. hpsa_free_sg_chain_blocks(h);
  808. return -ENOMEM;
  809. }
  810. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  811. struct CommandList *c)
  812. {
  813. struct SGDescriptor *chain_sg, *chain_block;
  814. u64 temp64;
  815. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  816. chain_block = h->cmd_sg_list[c->cmdindex];
  817. chain_sg->Ext = HPSA_SG_CHAIN;
  818. chain_sg->Len = sizeof(*chain_sg) *
  819. (c->Header.SGTotal - h->max_cmd_sg_entries);
  820. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  821. PCI_DMA_TODEVICE);
  822. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  823. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  824. }
  825. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  826. struct CommandList *c)
  827. {
  828. struct SGDescriptor *chain_sg;
  829. union u64bit temp64;
  830. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  831. return;
  832. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  833. temp64.val32.lower = chain_sg->Addr.lower;
  834. temp64.val32.upper = chain_sg->Addr.upper;
  835. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  836. }
  837. static void complete_scsi_command(struct CommandList *cp,
  838. int timeout, u32 tag)
  839. {
  840. struct scsi_cmnd *cmd;
  841. struct ctlr_info *h;
  842. struct ErrorInfo *ei;
  843. unsigned char sense_key;
  844. unsigned char asc; /* additional sense code */
  845. unsigned char ascq; /* additional sense code qualifier */
  846. ei = cp->err_info;
  847. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  848. h = cp->h;
  849. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  850. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  851. hpsa_unmap_sg_chain_block(h, cp);
  852. cmd->result = (DID_OK << 16); /* host byte */
  853. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  854. cmd->result |= ei->ScsiStatus;
  855. /* copy the sense data whether we need to or not. */
  856. memcpy(cmd->sense_buffer, ei->SenseInfo,
  857. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  858. SCSI_SENSE_BUFFERSIZE :
  859. ei->SenseLen);
  860. scsi_set_resid(cmd, ei->ResidualCnt);
  861. if (ei->CommandStatus == 0) {
  862. cmd->scsi_done(cmd);
  863. cmd_free(h, cp);
  864. return;
  865. }
  866. /* an error has occurred */
  867. switch (ei->CommandStatus) {
  868. case CMD_TARGET_STATUS:
  869. if (ei->ScsiStatus) {
  870. /* Get sense key */
  871. sense_key = 0xf & ei->SenseInfo[2];
  872. /* Get additional sense code */
  873. asc = ei->SenseInfo[12];
  874. /* Get addition sense code qualifier */
  875. ascq = ei->SenseInfo[13];
  876. }
  877. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  878. if (check_for_unit_attention(h, cp)) {
  879. cmd->result = DID_SOFT_ERROR << 16;
  880. break;
  881. }
  882. if (sense_key == ILLEGAL_REQUEST) {
  883. /*
  884. * SCSI REPORT_LUNS is commonly unsupported on
  885. * Smart Array. Suppress noisy complaint.
  886. */
  887. if (cp->Request.CDB[0] == REPORT_LUNS)
  888. break;
  889. /* If ASC/ASCQ indicate Logical Unit
  890. * Not Supported condition,
  891. */
  892. if ((asc == 0x25) && (ascq == 0x0)) {
  893. dev_warn(&h->pdev->dev, "cp %p "
  894. "has check condition\n", cp);
  895. break;
  896. }
  897. }
  898. if (sense_key == NOT_READY) {
  899. /* If Sense is Not Ready, Logical Unit
  900. * Not ready, Manual Intervention
  901. * required
  902. */
  903. if ((asc == 0x04) && (ascq == 0x03)) {
  904. dev_warn(&h->pdev->dev, "cp %p "
  905. "has check condition: unit "
  906. "not ready, manual "
  907. "intervention required\n", cp);
  908. break;
  909. }
  910. }
  911. if (sense_key == ABORTED_COMMAND) {
  912. /* Aborted command is retryable */
  913. dev_warn(&h->pdev->dev, "cp %p "
  914. "has check condition: aborted command: "
  915. "ASC: 0x%x, ASCQ: 0x%x\n",
  916. cp, asc, ascq);
  917. cmd->result = DID_SOFT_ERROR << 16;
  918. break;
  919. }
  920. /* Must be some other type of check condition */
  921. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  922. "unknown type: "
  923. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  924. "Returning result: 0x%x, "
  925. "cmd=[%02x %02x %02x %02x %02x "
  926. "%02x %02x %02x %02x %02x %02x "
  927. "%02x %02x %02x %02x %02x]\n",
  928. cp, sense_key, asc, ascq,
  929. cmd->result,
  930. cmd->cmnd[0], cmd->cmnd[1],
  931. cmd->cmnd[2], cmd->cmnd[3],
  932. cmd->cmnd[4], cmd->cmnd[5],
  933. cmd->cmnd[6], cmd->cmnd[7],
  934. cmd->cmnd[8], cmd->cmnd[9],
  935. cmd->cmnd[10], cmd->cmnd[11],
  936. cmd->cmnd[12], cmd->cmnd[13],
  937. cmd->cmnd[14], cmd->cmnd[15]);
  938. break;
  939. }
  940. /* Problem was not a check condition
  941. * Pass it up to the upper layers...
  942. */
  943. if (ei->ScsiStatus) {
  944. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  945. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  946. "Returning result: 0x%x\n",
  947. cp, ei->ScsiStatus,
  948. sense_key, asc, ascq,
  949. cmd->result);
  950. } else { /* scsi status is zero??? How??? */
  951. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  952. "Returning no connection.\n", cp),
  953. /* Ordinarily, this case should never happen,
  954. * but there is a bug in some released firmware
  955. * revisions that allows it to happen if, for
  956. * example, a 4100 backplane loses power and
  957. * the tape drive is in it. We assume that
  958. * it's a fatal error of some kind because we
  959. * can't show that it wasn't. We will make it
  960. * look like selection timeout since that is
  961. * the most common reason for this to occur,
  962. * and it's severe enough.
  963. */
  964. cmd->result = DID_NO_CONNECT << 16;
  965. }
  966. break;
  967. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  968. break;
  969. case CMD_DATA_OVERRUN:
  970. dev_warn(&h->pdev->dev, "cp %p has"
  971. " completed with data overrun "
  972. "reported\n", cp);
  973. break;
  974. case CMD_INVALID: {
  975. /* print_bytes(cp, sizeof(*cp), 1, 0);
  976. print_cmd(cp); */
  977. /* We get CMD_INVALID if you address a non-existent device
  978. * instead of a selection timeout (no response). You will
  979. * see this if you yank out a drive, then try to access it.
  980. * This is kind of a shame because it means that any other
  981. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  982. * missing target. */
  983. cmd->result = DID_NO_CONNECT << 16;
  984. }
  985. break;
  986. case CMD_PROTOCOL_ERR:
  987. dev_warn(&h->pdev->dev, "cp %p has "
  988. "protocol error \n", cp);
  989. break;
  990. case CMD_HARDWARE_ERR:
  991. cmd->result = DID_ERROR << 16;
  992. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  993. break;
  994. case CMD_CONNECTION_LOST:
  995. cmd->result = DID_ERROR << 16;
  996. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  997. break;
  998. case CMD_ABORTED:
  999. cmd->result = DID_ABORT << 16;
  1000. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1001. cp, ei->ScsiStatus);
  1002. break;
  1003. case CMD_ABORT_FAILED:
  1004. cmd->result = DID_ERROR << 16;
  1005. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1006. break;
  1007. case CMD_UNSOLICITED_ABORT:
  1008. cmd->result = DID_RESET << 16;
  1009. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1010. "abort\n", cp);
  1011. break;
  1012. case CMD_TIMEOUT:
  1013. cmd->result = DID_TIME_OUT << 16;
  1014. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1015. break;
  1016. default:
  1017. cmd->result = DID_ERROR << 16;
  1018. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1019. cp, ei->CommandStatus);
  1020. }
  1021. cmd->scsi_done(cmd);
  1022. cmd_free(h, cp);
  1023. }
  1024. static int hpsa_scsi_detect(struct ctlr_info *h)
  1025. {
  1026. struct Scsi_Host *sh;
  1027. int error;
  1028. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1029. if (sh == NULL)
  1030. goto fail;
  1031. sh->io_port = 0;
  1032. sh->n_io_port = 0;
  1033. sh->this_id = -1;
  1034. sh->max_channel = 3;
  1035. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1036. sh->max_lun = HPSA_MAX_LUN;
  1037. sh->max_id = HPSA_MAX_LUN;
  1038. sh->can_queue = h->nr_cmds;
  1039. sh->cmd_per_lun = h->nr_cmds;
  1040. sh->sg_tablesize = h->maxsgentries;
  1041. h->scsi_host = sh;
  1042. sh->hostdata[0] = (unsigned long) h;
  1043. sh->irq = h->intr[PERF_MODE_INT];
  1044. sh->unique_id = sh->irq;
  1045. error = scsi_add_host(sh, &h->pdev->dev);
  1046. if (error)
  1047. goto fail_host_put;
  1048. scsi_scan_host(sh);
  1049. return 0;
  1050. fail_host_put:
  1051. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1052. " failed for controller %d\n", h->ctlr);
  1053. scsi_host_put(sh);
  1054. return error;
  1055. fail:
  1056. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1057. " failed for controller %d\n", h->ctlr);
  1058. return -ENOMEM;
  1059. }
  1060. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1061. struct CommandList *c, int sg_used, int data_direction)
  1062. {
  1063. int i;
  1064. union u64bit addr64;
  1065. for (i = 0; i < sg_used; i++) {
  1066. addr64.val32.lower = c->SG[i].Addr.lower;
  1067. addr64.val32.upper = c->SG[i].Addr.upper;
  1068. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1069. data_direction);
  1070. }
  1071. }
  1072. static void hpsa_map_one(struct pci_dev *pdev,
  1073. struct CommandList *cp,
  1074. unsigned char *buf,
  1075. size_t buflen,
  1076. int data_direction)
  1077. {
  1078. u64 addr64;
  1079. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1080. cp->Header.SGList = 0;
  1081. cp->Header.SGTotal = 0;
  1082. return;
  1083. }
  1084. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1085. cp->SG[0].Addr.lower =
  1086. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1087. cp->SG[0].Addr.upper =
  1088. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1089. cp->SG[0].Len = buflen;
  1090. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1091. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1092. }
  1093. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1094. struct CommandList *c)
  1095. {
  1096. DECLARE_COMPLETION_ONSTACK(wait);
  1097. c->waiting = &wait;
  1098. enqueue_cmd_and_start_io(h, c);
  1099. wait_for_completion(&wait);
  1100. }
  1101. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1102. struct CommandList *c, int data_direction)
  1103. {
  1104. int retry_count = 0;
  1105. do {
  1106. memset(c->err_info, 0, sizeof(c->err_info));
  1107. hpsa_scsi_do_simple_cmd_core(h, c);
  1108. retry_count++;
  1109. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1110. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1111. }
  1112. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1113. {
  1114. struct ErrorInfo *ei;
  1115. struct device *d = &cp->h->pdev->dev;
  1116. ei = cp->err_info;
  1117. switch (ei->CommandStatus) {
  1118. case CMD_TARGET_STATUS:
  1119. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1120. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1121. ei->ScsiStatus);
  1122. if (ei->ScsiStatus == 0)
  1123. dev_warn(d, "SCSI status is abnormally zero. "
  1124. "(probably indicates selection timeout "
  1125. "reported incorrectly due to a known "
  1126. "firmware bug, circa July, 2001.)\n");
  1127. break;
  1128. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1129. dev_info(d, "UNDERRUN\n");
  1130. break;
  1131. case CMD_DATA_OVERRUN:
  1132. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1133. break;
  1134. case CMD_INVALID: {
  1135. /* controller unfortunately reports SCSI passthru's
  1136. * to non-existent targets as invalid commands.
  1137. */
  1138. dev_warn(d, "cp %p is reported invalid (probably means "
  1139. "target device no longer present)\n", cp);
  1140. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1141. print_cmd(cp); */
  1142. }
  1143. break;
  1144. case CMD_PROTOCOL_ERR:
  1145. dev_warn(d, "cp %p has protocol error \n", cp);
  1146. break;
  1147. case CMD_HARDWARE_ERR:
  1148. /* cmd->result = DID_ERROR << 16; */
  1149. dev_warn(d, "cp %p had hardware error\n", cp);
  1150. break;
  1151. case CMD_CONNECTION_LOST:
  1152. dev_warn(d, "cp %p had connection lost\n", cp);
  1153. break;
  1154. case CMD_ABORTED:
  1155. dev_warn(d, "cp %p was aborted\n", cp);
  1156. break;
  1157. case CMD_ABORT_FAILED:
  1158. dev_warn(d, "cp %p reports abort failed\n", cp);
  1159. break;
  1160. case CMD_UNSOLICITED_ABORT:
  1161. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1162. break;
  1163. case CMD_TIMEOUT:
  1164. dev_warn(d, "cp %p timed out\n", cp);
  1165. break;
  1166. default:
  1167. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1168. ei->CommandStatus);
  1169. }
  1170. }
  1171. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1172. unsigned char page, unsigned char *buf,
  1173. unsigned char bufsize)
  1174. {
  1175. int rc = IO_OK;
  1176. struct CommandList *c;
  1177. struct ErrorInfo *ei;
  1178. c = cmd_special_alloc(h);
  1179. if (c == NULL) { /* trouble... */
  1180. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1181. return -ENOMEM;
  1182. }
  1183. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1184. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1185. ei = c->err_info;
  1186. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1187. hpsa_scsi_interpret_error(c);
  1188. rc = -1;
  1189. }
  1190. cmd_special_free(h, c);
  1191. return rc;
  1192. }
  1193. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1194. {
  1195. int rc = IO_OK;
  1196. struct CommandList *c;
  1197. struct ErrorInfo *ei;
  1198. c = cmd_special_alloc(h);
  1199. if (c == NULL) { /* trouble... */
  1200. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1201. return -ENOMEM;
  1202. }
  1203. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1204. hpsa_scsi_do_simple_cmd_core(h, c);
  1205. /* no unmap needed here because no data xfer. */
  1206. ei = c->err_info;
  1207. if (ei->CommandStatus != 0) {
  1208. hpsa_scsi_interpret_error(c);
  1209. rc = -1;
  1210. }
  1211. cmd_special_free(h, c);
  1212. return rc;
  1213. }
  1214. static void hpsa_get_raid_level(struct ctlr_info *h,
  1215. unsigned char *scsi3addr, unsigned char *raid_level)
  1216. {
  1217. int rc;
  1218. unsigned char *buf;
  1219. *raid_level = RAID_UNKNOWN;
  1220. buf = kzalloc(64, GFP_KERNEL);
  1221. if (!buf)
  1222. return;
  1223. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1224. if (rc == 0)
  1225. *raid_level = buf[8];
  1226. if (*raid_level > RAID_UNKNOWN)
  1227. *raid_level = RAID_UNKNOWN;
  1228. kfree(buf);
  1229. return;
  1230. }
  1231. /* Get the device id from inquiry page 0x83 */
  1232. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1233. unsigned char *device_id, int buflen)
  1234. {
  1235. int rc;
  1236. unsigned char *buf;
  1237. if (buflen > 16)
  1238. buflen = 16;
  1239. buf = kzalloc(64, GFP_KERNEL);
  1240. if (!buf)
  1241. return -1;
  1242. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1243. if (rc == 0)
  1244. memcpy(device_id, &buf[8], buflen);
  1245. kfree(buf);
  1246. return rc != 0;
  1247. }
  1248. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1249. struct ReportLUNdata *buf, int bufsize,
  1250. int extended_response)
  1251. {
  1252. int rc = IO_OK;
  1253. struct CommandList *c;
  1254. unsigned char scsi3addr[8];
  1255. struct ErrorInfo *ei;
  1256. c = cmd_special_alloc(h);
  1257. if (c == NULL) { /* trouble... */
  1258. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1259. return -1;
  1260. }
  1261. /* address the controller */
  1262. memset(scsi3addr, 0, sizeof(scsi3addr));
  1263. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1264. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1265. if (extended_response)
  1266. c->Request.CDB[1] = extended_response;
  1267. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1268. ei = c->err_info;
  1269. if (ei->CommandStatus != 0 &&
  1270. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1271. hpsa_scsi_interpret_error(c);
  1272. rc = -1;
  1273. }
  1274. cmd_special_free(h, c);
  1275. return rc;
  1276. }
  1277. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1278. struct ReportLUNdata *buf,
  1279. int bufsize, int extended_response)
  1280. {
  1281. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1282. }
  1283. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1284. struct ReportLUNdata *buf, int bufsize)
  1285. {
  1286. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1287. }
  1288. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1289. int bus, int target, int lun)
  1290. {
  1291. device->bus = bus;
  1292. device->target = target;
  1293. device->lun = lun;
  1294. }
  1295. static int hpsa_update_device_info(struct ctlr_info *h,
  1296. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1297. {
  1298. #define OBDR_TAPE_INQ_SIZE 49
  1299. unsigned char *inq_buff;
  1300. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1301. if (!inq_buff)
  1302. goto bail_out;
  1303. /* Do an inquiry to the device to see what it is. */
  1304. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1305. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1306. /* Inquiry failed (msg printed already) */
  1307. dev_err(&h->pdev->dev,
  1308. "hpsa_update_device_info: inquiry failed\n");
  1309. goto bail_out;
  1310. }
  1311. this_device->devtype = (inq_buff[0] & 0x1f);
  1312. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1313. memcpy(this_device->vendor, &inq_buff[8],
  1314. sizeof(this_device->vendor));
  1315. memcpy(this_device->model, &inq_buff[16],
  1316. sizeof(this_device->model));
  1317. memcpy(this_device->revision, &inq_buff[32],
  1318. sizeof(this_device->revision));
  1319. memset(this_device->device_id, 0,
  1320. sizeof(this_device->device_id));
  1321. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1322. sizeof(this_device->device_id));
  1323. if (this_device->devtype == TYPE_DISK &&
  1324. is_logical_dev_addr_mode(scsi3addr))
  1325. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1326. else
  1327. this_device->raid_level = RAID_UNKNOWN;
  1328. kfree(inq_buff);
  1329. return 0;
  1330. bail_out:
  1331. kfree(inq_buff);
  1332. return 1;
  1333. }
  1334. static unsigned char *msa2xxx_model[] = {
  1335. "MSA2012",
  1336. "MSA2024",
  1337. "MSA2312",
  1338. "MSA2324",
  1339. NULL,
  1340. };
  1341. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1342. {
  1343. int i;
  1344. for (i = 0; msa2xxx_model[i]; i++)
  1345. if (strncmp(device->model, msa2xxx_model[i],
  1346. strlen(msa2xxx_model[i])) == 0)
  1347. return 1;
  1348. return 0;
  1349. }
  1350. /* Helper function to assign bus, target, lun mapping of devices.
  1351. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1352. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1353. * Logical drive target and lun are assigned at this time, but
  1354. * physical device lun and target assignment are deferred (assigned
  1355. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1356. */
  1357. static void figure_bus_target_lun(struct ctlr_info *h,
  1358. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1359. struct hpsa_scsi_dev_t *device)
  1360. {
  1361. u32 lunid;
  1362. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1363. /* logical device */
  1364. if (unlikely(is_scsi_rev_5(h))) {
  1365. /* p1210m, logical drives lun assignments
  1366. * match SCSI REPORT LUNS data.
  1367. */
  1368. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1369. *bus = 0;
  1370. *target = 0;
  1371. *lun = (lunid & 0x3fff) + 1;
  1372. } else {
  1373. /* not p1210m... */
  1374. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1375. if (is_msa2xxx(h, device)) {
  1376. /* msa2xxx way, put logicals on bus 1
  1377. * and match target/lun numbers box
  1378. * reports.
  1379. */
  1380. *bus = 1;
  1381. *target = (lunid >> 16) & 0x3fff;
  1382. *lun = lunid & 0x00ff;
  1383. } else {
  1384. /* Traditional smart array way. */
  1385. *bus = 0;
  1386. *lun = 0;
  1387. *target = lunid & 0x3fff;
  1388. }
  1389. }
  1390. } else {
  1391. /* physical device */
  1392. if (is_hba_lunid(lunaddrbytes))
  1393. if (unlikely(is_scsi_rev_5(h))) {
  1394. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1395. *target = 0;
  1396. *lun = 0;
  1397. return;
  1398. } else
  1399. *bus = 3; /* traditional smartarray */
  1400. else
  1401. *bus = 2; /* physical disk */
  1402. *target = -1;
  1403. *lun = -1; /* we will fill these in later. */
  1404. }
  1405. }
  1406. /*
  1407. * If there is no lun 0 on a target, linux won't find any devices.
  1408. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1409. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1410. * it for some reason. *tmpdevice is the target we're adding,
  1411. * this_device is a pointer into the current element of currentsd[]
  1412. * that we're building up in update_scsi_devices(), below.
  1413. * lunzerobits is a bitmap that tracks which targets already have a
  1414. * lun 0 assigned.
  1415. * Returns 1 if an enclosure was added, 0 if not.
  1416. */
  1417. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1418. struct hpsa_scsi_dev_t *tmpdevice,
  1419. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1420. int bus, int target, int lun, unsigned long lunzerobits[],
  1421. int *nmsa2xxx_enclosures)
  1422. {
  1423. unsigned char scsi3addr[8];
  1424. if (test_bit(target, lunzerobits))
  1425. return 0; /* There is already a lun 0 on this target. */
  1426. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1427. return 0; /* It's the logical targets that may lack lun 0. */
  1428. if (!is_msa2xxx(h, tmpdevice))
  1429. return 0; /* It's only the MSA2xxx that have this problem. */
  1430. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1431. return 0;
  1432. if (is_hba_lunid(scsi3addr))
  1433. return 0; /* Don't add the RAID controller here. */
  1434. if (is_scsi_rev_5(h))
  1435. return 0; /* p1210m doesn't need to do this. */
  1436. #define MAX_MSA2XXX_ENCLOSURES 32
  1437. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1438. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1439. "enclosures exceeded. Check your hardware "
  1440. "configuration.");
  1441. return 0;
  1442. }
  1443. memset(scsi3addr, 0, 8);
  1444. scsi3addr[3] = target;
  1445. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1446. return 0;
  1447. (*nmsa2xxx_enclosures)++;
  1448. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1449. set_bit(target, lunzerobits);
  1450. return 1;
  1451. }
  1452. /*
  1453. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1454. * logdev. The number of luns in physdev and logdev are returned in
  1455. * *nphysicals and *nlogicals, respectively.
  1456. * Returns 0 on success, -1 otherwise.
  1457. */
  1458. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1459. int reportlunsize,
  1460. struct ReportLUNdata *physdev, u32 *nphysicals,
  1461. struct ReportLUNdata *logdev, u32 *nlogicals)
  1462. {
  1463. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1464. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1465. return -1;
  1466. }
  1467. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1468. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1469. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1470. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1471. *nphysicals - HPSA_MAX_PHYS_LUN);
  1472. *nphysicals = HPSA_MAX_PHYS_LUN;
  1473. }
  1474. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1475. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1476. return -1;
  1477. }
  1478. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1479. /* Reject Logicals in excess of our max capability. */
  1480. if (*nlogicals > HPSA_MAX_LUN) {
  1481. dev_warn(&h->pdev->dev,
  1482. "maximum logical LUNs (%d) exceeded. "
  1483. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1484. *nlogicals - HPSA_MAX_LUN);
  1485. *nlogicals = HPSA_MAX_LUN;
  1486. }
  1487. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1488. dev_warn(&h->pdev->dev,
  1489. "maximum logical + physical LUNs (%d) exceeded. "
  1490. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1491. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1492. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1493. }
  1494. return 0;
  1495. }
  1496. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1497. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1498. struct ReportLUNdata *logdev_list)
  1499. {
  1500. /* Helper function, figure out where the LUN ID info is coming from
  1501. * given index i, lists of physical and logical devices, where in
  1502. * the list the raid controller is supposed to appear (first or last)
  1503. */
  1504. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1505. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1506. if (i == raid_ctlr_position)
  1507. return RAID_CTLR_LUNID;
  1508. if (i < logicals_start)
  1509. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1510. if (i < last_device)
  1511. return &logdev_list->LUN[i - nphysicals -
  1512. (raid_ctlr_position == 0)][0];
  1513. BUG();
  1514. return NULL;
  1515. }
  1516. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1517. {
  1518. /* the idea here is we could get notified
  1519. * that some devices have changed, so we do a report
  1520. * physical luns and report logical luns cmd, and adjust
  1521. * our list of devices accordingly.
  1522. *
  1523. * The scsi3addr's of devices won't change so long as the
  1524. * adapter is not reset. That means we can rescan and
  1525. * tell which devices we already know about, vs. new
  1526. * devices, vs. disappearing devices.
  1527. */
  1528. struct ReportLUNdata *physdev_list = NULL;
  1529. struct ReportLUNdata *logdev_list = NULL;
  1530. unsigned char *inq_buff = NULL;
  1531. u32 nphysicals = 0;
  1532. u32 nlogicals = 0;
  1533. u32 ndev_allocated = 0;
  1534. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1535. int ncurrent = 0;
  1536. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1537. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1538. int bus, target, lun;
  1539. int raid_ctlr_position;
  1540. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1541. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1542. GFP_KERNEL);
  1543. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1544. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1545. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1546. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1547. if (!currentsd || !physdev_list || !logdev_list ||
  1548. !inq_buff || !tmpdevice) {
  1549. dev_err(&h->pdev->dev, "out of memory\n");
  1550. goto out;
  1551. }
  1552. memset(lunzerobits, 0, sizeof(lunzerobits));
  1553. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1554. logdev_list, &nlogicals))
  1555. goto out;
  1556. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1557. * but each of them 4 times through different paths. The plus 1
  1558. * is for the RAID controller.
  1559. */
  1560. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1561. /* Allocate the per device structures */
  1562. for (i = 0; i < ndevs_to_allocate; i++) {
  1563. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1564. if (!currentsd[i]) {
  1565. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1566. __FILE__, __LINE__);
  1567. goto out;
  1568. }
  1569. ndev_allocated++;
  1570. }
  1571. if (unlikely(is_scsi_rev_5(h)))
  1572. raid_ctlr_position = 0;
  1573. else
  1574. raid_ctlr_position = nphysicals + nlogicals;
  1575. /* adjust our table of devices */
  1576. nmsa2xxx_enclosures = 0;
  1577. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1578. u8 *lunaddrbytes;
  1579. /* Figure out where the LUN ID info is coming from */
  1580. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1581. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1582. /* skip masked physical devices. */
  1583. if (lunaddrbytes[3] & 0xC0 &&
  1584. i < nphysicals + (raid_ctlr_position == 0))
  1585. continue;
  1586. /* Get device type, vendor, model, device id */
  1587. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1588. continue; /* skip it if we can't talk to it. */
  1589. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1590. tmpdevice);
  1591. this_device = currentsd[ncurrent];
  1592. /*
  1593. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1594. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1595. * is nonetheless an enclosure device there. We have to
  1596. * present that otherwise linux won't find anything if
  1597. * there is no lun 0.
  1598. */
  1599. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1600. lunaddrbytes, bus, target, lun, lunzerobits,
  1601. &nmsa2xxx_enclosures)) {
  1602. ncurrent++;
  1603. this_device = currentsd[ncurrent];
  1604. }
  1605. *this_device = *tmpdevice;
  1606. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1607. switch (this_device->devtype) {
  1608. case TYPE_ROM: {
  1609. /* We don't *really* support actual CD-ROM devices,
  1610. * just "One Button Disaster Recovery" tape drive
  1611. * which temporarily pretends to be a CD-ROM drive.
  1612. * So we check that the device is really an OBDR tape
  1613. * device by checking for "$DR-10" in bytes 43-48 of
  1614. * the inquiry data.
  1615. */
  1616. char obdr_sig[7];
  1617. #define OBDR_TAPE_SIG "$DR-10"
  1618. strncpy(obdr_sig, &inq_buff[43], 6);
  1619. obdr_sig[6] = '\0';
  1620. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1621. /* Not OBDR device, ignore it. */
  1622. break;
  1623. }
  1624. ncurrent++;
  1625. break;
  1626. case TYPE_DISK:
  1627. if (i < nphysicals)
  1628. break;
  1629. ncurrent++;
  1630. break;
  1631. case TYPE_TAPE:
  1632. case TYPE_MEDIUM_CHANGER:
  1633. ncurrent++;
  1634. break;
  1635. case TYPE_RAID:
  1636. /* Only present the Smartarray HBA as a RAID controller.
  1637. * If it's a RAID controller other than the HBA itself
  1638. * (an external RAID controller, MSA500 or similar)
  1639. * don't present it.
  1640. */
  1641. if (!is_hba_lunid(lunaddrbytes))
  1642. break;
  1643. ncurrent++;
  1644. break;
  1645. default:
  1646. break;
  1647. }
  1648. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1649. break;
  1650. }
  1651. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1652. out:
  1653. kfree(tmpdevice);
  1654. for (i = 0; i < ndev_allocated; i++)
  1655. kfree(currentsd[i]);
  1656. kfree(currentsd);
  1657. kfree(inq_buff);
  1658. kfree(physdev_list);
  1659. kfree(logdev_list);
  1660. }
  1661. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1662. * dma mapping and fills in the scatter gather entries of the
  1663. * hpsa command, cp.
  1664. */
  1665. static int hpsa_scatter_gather(struct ctlr_info *h,
  1666. struct CommandList *cp,
  1667. struct scsi_cmnd *cmd)
  1668. {
  1669. unsigned int len;
  1670. struct scatterlist *sg;
  1671. u64 addr64;
  1672. int use_sg, i, sg_index, chained;
  1673. struct SGDescriptor *curr_sg;
  1674. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1675. use_sg = scsi_dma_map(cmd);
  1676. if (use_sg < 0)
  1677. return use_sg;
  1678. if (!use_sg)
  1679. goto sglist_finished;
  1680. curr_sg = cp->SG;
  1681. chained = 0;
  1682. sg_index = 0;
  1683. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1684. if (i == h->max_cmd_sg_entries - 1 &&
  1685. use_sg > h->max_cmd_sg_entries) {
  1686. chained = 1;
  1687. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1688. sg_index = 0;
  1689. }
  1690. addr64 = (u64) sg_dma_address(sg);
  1691. len = sg_dma_len(sg);
  1692. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1693. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1694. curr_sg->Len = len;
  1695. curr_sg->Ext = 0; /* we are not chaining */
  1696. curr_sg++;
  1697. }
  1698. if (use_sg + chained > h->maxSG)
  1699. h->maxSG = use_sg + chained;
  1700. if (chained) {
  1701. cp->Header.SGList = h->max_cmd_sg_entries;
  1702. cp->Header.SGTotal = (u16) (use_sg + 1);
  1703. hpsa_map_sg_chain_block(h, cp);
  1704. return 0;
  1705. }
  1706. sglist_finished:
  1707. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1708. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1709. return 0;
  1710. }
  1711. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  1712. void (*done)(struct scsi_cmnd *))
  1713. {
  1714. struct ctlr_info *h;
  1715. struct hpsa_scsi_dev_t *dev;
  1716. unsigned char scsi3addr[8];
  1717. struct CommandList *c;
  1718. unsigned long flags;
  1719. /* Get the ptr to our adapter structure out of cmd->host. */
  1720. h = sdev_to_hba(cmd->device);
  1721. dev = cmd->device->hostdata;
  1722. if (!dev) {
  1723. cmd->result = DID_NO_CONNECT << 16;
  1724. done(cmd);
  1725. return 0;
  1726. }
  1727. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1728. /* Need a lock as this is being allocated from the pool */
  1729. spin_lock_irqsave(&h->lock, flags);
  1730. c = cmd_alloc(h);
  1731. spin_unlock_irqrestore(&h->lock, flags);
  1732. if (c == NULL) { /* trouble... */
  1733. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1734. return SCSI_MLQUEUE_HOST_BUSY;
  1735. }
  1736. /* Fill in the command list header */
  1737. cmd->scsi_done = done; /* save this for use by completion code */
  1738. /* save c in case we have to abort it */
  1739. cmd->host_scribble = (unsigned char *) c;
  1740. c->cmd_type = CMD_SCSI;
  1741. c->scsi_cmd = cmd;
  1742. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1743. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1744. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1745. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1746. /* Fill in the request block... */
  1747. c->Request.Timeout = 0;
  1748. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1749. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1750. c->Request.CDBLen = cmd->cmd_len;
  1751. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1752. c->Request.Type.Type = TYPE_CMD;
  1753. c->Request.Type.Attribute = ATTR_SIMPLE;
  1754. switch (cmd->sc_data_direction) {
  1755. case DMA_TO_DEVICE:
  1756. c->Request.Type.Direction = XFER_WRITE;
  1757. break;
  1758. case DMA_FROM_DEVICE:
  1759. c->Request.Type.Direction = XFER_READ;
  1760. break;
  1761. case DMA_NONE:
  1762. c->Request.Type.Direction = XFER_NONE;
  1763. break;
  1764. case DMA_BIDIRECTIONAL:
  1765. /* This can happen if a buggy application does a scsi passthru
  1766. * and sets both inlen and outlen to non-zero. ( see
  1767. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1768. */
  1769. c->Request.Type.Direction = XFER_RSVD;
  1770. /* This is technically wrong, and hpsa controllers should
  1771. * reject it with CMD_INVALID, which is the most correct
  1772. * response, but non-fibre backends appear to let it
  1773. * slide by, and give the same results as if this field
  1774. * were set correctly. Either way is acceptable for
  1775. * our purposes here.
  1776. */
  1777. break;
  1778. default:
  1779. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1780. cmd->sc_data_direction);
  1781. BUG();
  1782. break;
  1783. }
  1784. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1785. cmd_free(h, c);
  1786. return SCSI_MLQUEUE_HOST_BUSY;
  1787. }
  1788. enqueue_cmd_and_start_io(h, c);
  1789. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1790. return 0;
  1791. }
  1792. static void hpsa_scan_start(struct Scsi_Host *sh)
  1793. {
  1794. struct ctlr_info *h = shost_to_hba(sh);
  1795. unsigned long flags;
  1796. /* wait until any scan already in progress is finished. */
  1797. while (1) {
  1798. spin_lock_irqsave(&h->scan_lock, flags);
  1799. if (h->scan_finished)
  1800. break;
  1801. spin_unlock_irqrestore(&h->scan_lock, flags);
  1802. wait_event(h->scan_wait_queue, h->scan_finished);
  1803. /* Note: We don't need to worry about a race between this
  1804. * thread and driver unload because the midlayer will
  1805. * have incremented the reference count, so unload won't
  1806. * happen if we're in here.
  1807. */
  1808. }
  1809. h->scan_finished = 0; /* mark scan as in progress */
  1810. spin_unlock_irqrestore(&h->scan_lock, flags);
  1811. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1812. spin_lock_irqsave(&h->scan_lock, flags);
  1813. h->scan_finished = 1; /* mark scan as finished. */
  1814. wake_up_all(&h->scan_wait_queue);
  1815. spin_unlock_irqrestore(&h->scan_lock, flags);
  1816. }
  1817. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1818. unsigned long elapsed_time)
  1819. {
  1820. struct ctlr_info *h = shost_to_hba(sh);
  1821. unsigned long flags;
  1822. int finished;
  1823. spin_lock_irqsave(&h->scan_lock, flags);
  1824. finished = h->scan_finished;
  1825. spin_unlock_irqrestore(&h->scan_lock, flags);
  1826. return finished;
  1827. }
  1828. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1829. int qdepth, int reason)
  1830. {
  1831. struct ctlr_info *h = sdev_to_hba(sdev);
  1832. if (reason != SCSI_QDEPTH_DEFAULT)
  1833. return -ENOTSUPP;
  1834. if (qdepth < 1)
  1835. qdepth = 1;
  1836. else
  1837. if (qdepth > h->nr_cmds)
  1838. qdepth = h->nr_cmds;
  1839. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1840. return sdev->queue_depth;
  1841. }
  1842. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1843. {
  1844. /* we are being forcibly unloaded, and may not refuse. */
  1845. scsi_remove_host(h->scsi_host);
  1846. scsi_host_put(h->scsi_host);
  1847. h->scsi_host = NULL;
  1848. }
  1849. static int hpsa_register_scsi(struct ctlr_info *h)
  1850. {
  1851. int rc;
  1852. rc = hpsa_scsi_detect(h);
  1853. if (rc != 0)
  1854. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1855. " hpsa_scsi_detect(), rc is %d\n", rc);
  1856. return rc;
  1857. }
  1858. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1859. unsigned char lunaddr[])
  1860. {
  1861. int rc = 0;
  1862. int count = 0;
  1863. int waittime = 1; /* seconds */
  1864. struct CommandList *c;
  1865. c = cmd_special_alloc(h);
  1866. if (!c) {
  1867. dev_warn(&h->pdev->dev, "out of memory in "
  1868. "wait_for_device_to_become_ready.\n");
  1869. return IO_ERROR;
  1870. }
  1871. /* Send test unit ready until device ready, or give up. */
  1872. while (count < HPSA_TUR_RETRY_LIMIT) {
  1873. /* Wait for a bit. do this first, because if we send
  1874. * the TUR right away, the reset will just abort it.
  1875. */
  1876. msleep(1000 * waittime);
  1877. count++;
  1878. /* Increase wait time with each try, up to a point. */
  1879. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1880. waittime = waittime * 2;
  1881. /* Send the Test Unit Ready */
  1882. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1883. hpsa_scsi_do_simple_cmd_core(h, c);
  1884. /* no unmap needed here because no data xfer. */
  1885. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1886. break;
  1887. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1888. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1889. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1890. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1891. break;
  1892. dev_warn(&h->pdev->dev, "waiting %d secs "
  1893. "for device to become ready.\n", waittime);
  1894. rc = 1; /* device not ready. */
  1895. }
  1896. if (rc)
  1897. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1898. else
  1899. dev_warn(&h->pdev->dev, "device is ready.\n");
  1900. cmd_special_free(h, c);
  1901. return rc;
  1902. }
  1903. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1904. * complaining. Doing a host- or bus-reset can't do anything good here.
  1905. */
  1906. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1907. {
  1908. int rc;
  1909. struct ctlr_info *h;
  1910. struct hpsa_scsi_dev_t *dev;
  1911. /* find the controller to which the command to be aborted was sent */
  1912. h = sdev_to_hba(scsicmd->device);
  1913. if (h == NULL) /* paranoia */
  1914. return FAILED;
  1915. dev = scsicmd->device->hostdata;
  1916. if (!dev) {
  1917. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1918. "device lookup failed.\n");
  1919. return FAILED;
  1920. }
  1921. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1922. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1923. /* send a reset to the SCSI LUN which the command was sent to */
  1924. rc = hpsa_send_reset(h, dev->scsi3addr);
  1925. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1926. return SUCCESS;
  1927. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1928. return FAILED;
  1929. }
  1930. /*
  1931. * For operations that cannot sleep, a command block is allocated at init,
  1932. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1933. * which ones are free or in use. Lock must be held when calling this.
  1934. * cmd_free() is the complement.
  1935. */
  1936. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1937. {
  1938. struct CommandList *c;
  1939. int i;
  1940. union u64bit temp64;
  1941. dma_addr_t cmd_dma_handle, err_dma_handle;
  1942. do {
  1943. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1944. if (i == h->nr_cmds)
  1945. return NULL;
  1946. } while (test_and_set_bit
  1947. (i & (BITS_PER_LONG - 1),
  1948. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1949. c = h->cmd_pool + i;
  1950. memset(c, 0, sizeof(*c));
  1951. cmd_dma_handle = h->cmd_pool_dhandle
  1952. + i * sizeof(*c);
  1953. c->err_info = h->errinfo_pool + i;
  1954. memset(c->err_info, 0, sizeof(*c->err_info));
  1955. err_dma_handle = h->errinfo_pool_dhandle
  1956. + i * sizeof(*c->err_info);
  1957. h->nr_allocs++;
  1958. c->cmdindex = i;
  1959. INIT_HLIST_NODE(&c->list);
  1960. c->busaddr = (u32) cmd_dma_handle;
  1961. temp64.val = (u64) err_dma_handle;
  1962. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1963. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1964. c->ErrDesc.Len = sizeof(*c->err_info);
  1965. c->h = h;
  1966. return c;
  1967. }
  1968. /* For operations that can wait for kmalloc to possibly sleep,
  1969. * this routine can be called. Lock need not be held to call
  1970. * cmd_special_alloc. cmd_special_free() is the complement.
  1971. */
  1972. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1973. {
  1974. struct CommandList *c;
  1975. union u64bit temp64;
  1976. dma_addr_t cmd_dma_handle, err_dma_handle;
  1977. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1978. if (c == NULL)
  1979. return NULL;
  1980. memset(c, 0, sizeof(*c));
  1981. c->cmdindex = -1;
  1982. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1983. &err_dma_handle);
  1984. if (c->err_info == NULL) {
  1985. pci_free_consistent(h->pdev,
  1986. sizeof(*c), c, cmd_dma_handle);
  1987. return NULL;
  1988. }
  1989. memset(c->err_info, 0, sizeof(*c->err_info));
  1990. INIT_HLIST_NODE(&c->list);
  1991. c->busaddr = (u32) cmd_dma_handle;
  1992. temp64.val = (u64) err_dma_handle;
  1993. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1994. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1995. c->ErrDesc.Len = sizeof(*c->err_info);
  1996. c->h = h;
  1997. return c;
  1998. }
  1999. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2000. {
  2001. int i;
  2002. i = c - h->cmd_pool;
  2003. clear_bit(i & (BITS_PER_LONG - 1),
  2004. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2005. h->nr_frees++;
  2006. }
  2007. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2008. {
  2009. union u64bit temp64;
  2010. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2011. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2012. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2013. c->err_info, (dma_addr_t) temp64.val);
  2014. pci_free_consistent(h->pdev, sizeof(*c),
  2015. c, (dma_addr_t) c->busaddr);
  2016. }
  2017. #ifdef CONFIG_COMPAT
  2018. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2019. {
  2020. IOCTL32_Command_struct __user *arg32 =
  2021. (IOCTL32_Command_struct __user *) arg;
  2022. IOCTL_Command_struct arg64;
  2023. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2024. int err;
  2025. u32 cp;
  2026. err = 0;
  2027. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2028. sizeof(arg64.LUN_info));
  2029. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2030. sizeof(arg64.Request));
  2031. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2032. sizeof(arg64.error_info));
  2033. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2034. err |= get_user(cp, &arg32->buf);
  2035. arg64.buf = compat_ptr(cp);
  2036. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2037. if (err)
  2038. return -EFAULT;
  2039. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2040. if (err)
  2041. return err;
  2042. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2043. sizeof(arg32->error_info));
  2044. if (err)
  2045. return -EFAULT;
  2046. return err;
  2047. }
  2048. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2049. int cmd, void *arg)
  2050. {
  2051. BIG_IOCTL32_Command_struct __user *arg32 =
  2052. (BIG_IOCTL32_Command_struct __user *) arg;
  2053. BIG_IOCTL_Command_struct arg64;
  2054. BIG_IOCTL_Command_struct __user *p =
  2055. compat_alloc_user_space(sizeof(arg64));
  2056. int err;
  2057. u32 cp;
  2058. err = 0;
  2059. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2060. sizeof(arg64.LUN_info));
  2061. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2062. sizeof(arg64.Request));
  2063. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2064. sizeof(arg64.error_info));
  2065. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2066. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2067. err |= get_user(cp, &arg32->buf);
  2068. arg64.buf = compat_ptr(cp);
  2069. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2070. if (err)
  2071. return -EFAULT;
  2072. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2073. if (err)
  2074. return err;
  2075. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2076. sizeof(arg32->error_info));
  2077. if (err)
  2078. return -EFAULT;
  2079. return err;
  2080. }
  2081. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2082. {
  2083. switch (cmd) {
  2084. case CCISS_GETPCIINFO:
  2085. case CCISS_GETINTINFO:
  2086. case CCISS_SETINTINFO:
  2087. case CCISS_GETNODENAME:
  2088. case CCISS_SETNODENAME:
  2089. case CCISS_GETHEARTBEAT:
  2090. case CCISS_GETBUSTYPES:
  2091. case CCISS_GETFIRMVER:
  2092. case CCISS_GETDRIVVER:
  2093. case CCISS_REVALIDVOLS:
  2094. case CCISS_DEREGDISK:
  2095. case CCISS_REGNEWDISK:
  2096. case CCISS_REGNEWD:
  2097. case CCISS_RESCANDISK:
  2098. case CCISS_GETLUNINFO:
  2099. return hpsa_ioctl(dev, cmd, arg);
  2100. case CCISS_PASSTHRU32:
  2101. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2102. case CCISS_BIG_PASSTHRU32:
  2103. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2104. default:
  2105. return -ENOIOCTLCMD;
  2106. }
  2107. }
  2108. #endif
  2109. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2110. {
  2111. struct hpsa_pci_info pciinfo;
  2112. if (!argp)
  2113. return -EINVAL;
  2114. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2115. pciinfo.bus = h->pdev->bus->number;
  2116. pciinfo.dev_fn = h->pdev->devfn;
  2117. pciinfo.board_id = h->board_id;
  2118. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2119. return -EFAULT;
  2120. return 0;
  2121. }
  2122. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2123. {
  2124. DriverVer_type DriverVer;
  2125. unsigned char vmaj, vmin, vsubmin;
  2126. int rc;
  2127. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2128. &vmaj, &vmin, &vsubmin);
  2129. if (rc != 3) {
  2130. dev_info(&h->pdev->dev, "driver version string '%s' "
  2131. "unrecognized.", HPSA_DRIVER_VERSION);
  2132. vmaj = 0;
  2133. vmin = 0;
  2134. vsubmin = 0;
  2135. }
  2136. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2137. if (!argp)
  2138. return -EINVAL;
  2139. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2140. return -EFAULT;
  2141. return 0;
  2142. }
  2143. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2144. {
  2145. IOCTL_Command_struct iocommand;
  2146. struct CommandList *c;
  2147. char *buff = NULL;
  2148. union u64bit temp64;
  2149. if (!argp)
  2150. return -EINVAL;
  2151. if (!capable(CAP_SYS_RAWIO))
  2152. return -EPERM;
  2153. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2154. return -EFAULT;
  2155. if ((iocommand.buf_size < 1) &&
  2156. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2157. return -EINVAL;
  2158. }
  2159. if (iocommand.buf_size > 0) {
  2160. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2161. if (buff == NULL)
  2162. return -EFAULT;
  2163. }
  2164. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2165. /* Copy the data into the buffer we created */
  2166. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2167. kfree(buff);
  2168. return -EFAULT;
  2169. }
  2170. } else
  2171. memset(buff, 0, iocommand.buf_size);
  2172. c = cmd_special_alloc(h);
  2173. if (c == NULL) {
  2174. kfree(buff);
  2175. return -ENOMEM;
  2176. }
  2177. /* Fill in the command type */
  2178. c->cmd_type = CMD_IOCTL_PEND;
  2179. /* Fill in Command Header */
  2180. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2181. if (iocommand.buf_size > 0) { /* buffer to fill */
  2182. c->Header.SGList = 1;
  2183. c->Header.SGTotal = 1;
  2184. } else { /* no buffers to fill */
  2185. c->Header.SGList = 0;
  2186. c->Header.SGTotal = 0;
  2187. }
  2188. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2189. /* use the kernel address the cmd block for tag */
  2190. c->Header.Tag.lower = c->busaddr;
  2191. /* Fill in Request block */
  2192. memcpy(&c->Request, &iocommand.Request,
  2193. sizeof(c->Request));
  2194. /* Fill in the scatter gather information */
  2195. if (iocommand.buf_size > 0) {
  2196. temp64.val = pci_map_single(h->pdev, buff,
  2197. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2198. c->SG[0].Addr.lower = temp64.val32.lower;
  2199. c->SG[0].Addr.upper = temp64.val32.upper;
  2200. c->SG[0].Len = iocommand.buf_size;
  2201. c->SG[0].Ext = 0; /* we are not chaining*/
  2202. }
  2203. hpsa_scsi_do_simple_cmd_core(h, c);
  2204. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2205. check_ioctl_unit_attention(h, c);
  2206. /* Copy the error information out */
  2207. memcpy(&iocommand.error_info, c->err_info,
  2208. sizeof(iocommand.error_info));
  2209. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2210. kfree(buff);
  2211. cmd_special_free(h, c);
  2212. return -EFAULT;
  2213. }
  2214. if (iocommand.Request.Type.Direction == XFER_READ) {
  2215. /* Copy the data out of the buffer we created */
  2216. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2217. kfree(buff);
  2218. cmd_special_free(h, c);
  2219. return -EFAULT;
  2220. }
  2221. }
  2222. kfree(buff);
  2223. cmd_special_free(h, c);
  2224. return 0;
  2225. }
  2226. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2227. {
  2228. BIG_IOCTL_Command_struct *ioc;
  2229. struct CommandList *c;
  2230. unsigned char **buff = NULL;
  2231. int *buff_size = NULL;
  2232. union u64bit temp64;
  2233. BYTE sg_used = 0;
  2234. int status = 0;
  2235. int i;
  2236. u32 left;
  2237. u32 sz;
  2238. BYTE __user *data_ptr;
  2239. if (!argp)
  2240. return -EINVAL;
  2241. if (!capable(CAP_SYS_RAWIO))
  2242. return -EPERM;
  2243. ioc = (BIG_IOCTL_Command_struct *)
  2244. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2245. if (!ioc) {
  2246. status = -ENOMEM;
  2247. goto cleanup1;
  2248. }
  2249. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2250. status = -EFAULT;
  2251. goto cleanup1;
  2252. }
  2253. if ((ioc->buf_size < 1) &&
  2254. (ioc->Request.Type.Direction != XFER_NONE)) {
  2255. status = -EINVAL;
  2256. goto cleanup1;
  2257. }
  2258. /* Check kmalloc limits using all SGs */
  2259. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2260. status = -EINVAL;
  2261. goto cleanup1;
  2262. }
  2263. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2264. status = -EINVAL;
  2265. goto cleanup1;
  2266. }
  2267. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2268. if (!buff) {
  2269. status = -ENOMEM;
  2270. goto cleanup1;
  2271. }
  2272. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2273. if (!buff_size) {
  2274. status = -ENOMEM;
  2275. goto cleanup1;
  2276. }
  2277. left = ioc->buf_size;
  2278. data_ptr = ioc->buf;
  2279. while (left) {
  2280. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2281. buff_size[sg_used] = sz;
  2282. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2283. if (buff[sg_used] == NULL) {
  2284. status = -ENOMEM;
  2285. goto cleanup1;
  2286. }
  2287. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2288. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2289. status = -ENOMEM;
  2290. goto cleanup1;
  2291. }
  2292. } else
  2293. memset(buff[sg_used], 0, sz);
  2294. left -= sz;
  2295. data_ptr += sz;
  2296. sg_used++;
  2297. }
  2298. c = cmd_special_alloc(h);
  2299. if (c == NULL) {
  2300. status = -ENOMEM;
  2301. goto cleanup1;
  2302. }
  2303. c->cmd_type = CMD_IOCTL_PEND;
  2304. c->Header.ReplyQueue = 0;
  2305. if (ioc->buf_size > 0) {
  2306. c->Header.SGList = sg_used;
  2307. c->Header.SGTotal = sg_used;
  2308. } else {
  2309. c->Header.SGList = 0;
  2310. c->Header.SGTotal = 0;
  2311. }
  2312. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2313. c->Header.Tag.lower = c->busaddr;
  2314. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2315. if (ioc->buf_size > 0) {
  2316. int i;
  2317. for (i = 0; i < sg_used; i++) {
  2318. temp64.val = pci_map_single(h->pdev, buff[i],
  2319. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2320. c->SG[i].Addr.lower = temp64.val32.lower;
  2321. c->SG[i].Addr.upper = temp64.val32.upper;
  2322. c->SG[i].Len = buff_size[i];
  2323. /* we are not chaining */
  2324. c->SG[i].Ext = 0;
  2325. }
  2326. }
  2327. hpsa_scsi_do_simple_cmd_core(h, c);
  2328. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2329. check_ioctl_unit_attention(h, c);
  2330. /* Copy the error information out */
  2331. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2332. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2333. cmd_special_free(h, c);
  2334. status = -EFAULT;
  2335. goto cleanup1;
  2336. }
  2337. if (ioc->Request.Type.Direction == XFER_READ) {
  2338. /* Copy the data out of the buffer we created */
  2339. BYTE __user *ptr = ioc->buf;
  2340. for (i = 0; i < sg_used; i++) {
  2341. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2342. cmd_special_free(h, c);
  2343. status = -EFAULT;
  2344. goto cleanup1;
  2345. }
  2346. ptr += buff_size[i];
  2347. }
  2348. }
  2349. cmd_special_free(h, c);
  2350. status = 0;
  2351. cleanup1:
  2352. if (buff) {
  2353. for (i = 0; i < sg_used; i++)
  2354. kfree(buff[i]);
  2355. kfree(buff);
  2356. }
  2357. kfree(buff_size);
  2358. kfree(ioc);
  2359. return status;
  2360. }
  2361. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2362. struct CommandList *c)
  2363. {
  2364. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2365. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2366. (void) check_for_unit_attention(h, c);
  2367. }
  2368. /*
  2369. * ioctl
  2370. */
  2371. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2372. {
  2373. struct ctlr_info *h;
  2374. void __user *argp = (void __user *)arg;
  2375. h = sdev_to_hba(dev);
  2376. switch (cmd) {
  2377. case CCISS_DEREGDISK:
  2378. case CCISS_REGNEWDISK:
  2379. case CCISS_REGNEWD:
  2380. hpsa_scan_start(h->scsi_host);
  2381. return 0;
  2382. case CCISS_GETPCIINFO:
  2383. return hpsa_getpciinfo_ioctl(h, argp);
  2384. case CCISS_GETDRIVVER:
  2385. return hpsa_getdrivver_ioctl(h, argp);
  2386. case CCISS_PASSTHRU:
  2387. return hpsa_passthru_ioctl(h, argp);
  2388. case CCISS_BIG_PASSTHRU:
  2389. return hpsa_big_passthru_ioctl(h, argp);
  2390. default:
  2391. return -ENOTTY;
  2392. }
  2393. }
  2394. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2395. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2396. int cmd_type)
  2397. {
  2398. int pci_dir = XFER_NONE;
  2399. c->cmd_type = CMD_IOCTL_PEND;
  2400. c->Header.ReplyQueue = 0;
  2401. if (buff != NULL && size > 0) {
  2402. c->Header.SGList = 1;
  2403. c->Header.SGTotal = 1;
  2404. } else {
  2405. c->Header.SGList = 0;
  2406. c->Header.SGTotal = 0;
  2407. }
  2408. c->Header.Tag.lower = c->busaddr;
  2409. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2410. c->Request.Type.Type = cmd_type;
  2411. if (cmd_type == TYPE_CMD) {
  2412. switch (cmd) {
  2413. case HPSA_INQUIRY:
  2414. /* are we trying to read a vital product page */
  2415. if (page_code != 0) {
  2416. c->Request.CDB[1] = 0x01;
  2417. c->Request.CDB[2] = page_code;
  2418. }
  2419. c->Request.CDBLen = 6;
  2420. c->Request.Type.Attribute = ATTR_SIMPLE;
  2421. c->Request.Type.Direction = XFER_READ;
  2422. c->Request.Timeout = 0;
  2423. c->Request.CDB[0] = HPSA_INQUIRY;
  2424. c->Request.CDB[4] = size & 0xFF;
  2425. break;
  2426. case HPSA_REPORT_LOG:
  2427. case HPSA_REPORT_PHYS:
  2428. /* Talking to controller so It's a physical command
  2429. mode = 00 target = 0. Nothing to write.
  2430. */
  2431. c->Request.CDBLen = 12;
  2432. c->Request.Type.Attribute = ATTR_SIMPLE;
  2433. c->Request.Type.Direction = XFER_READ;
  2434. c->Request.Timeout = 0;
  2435. c->Request.CDB[0] = cmd;
  2436. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2437. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2438. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2439. c->Request.CDB[9] = size & 0xFF;
  2440. break;
  2441. case HPSA_CACHE_FLUSH:
  2442. c->Request.CDBLen = 12;
  2443. c->Request.Type.Attribute = ATTR_SIMPLE;
  2444. c->Request.Type.Direction = XFER_WRITE;
  2445. c->Request.Timeout = 0;
  2446. c->Request.CDB[0] = BMIC_WRITE;
  2447. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2448. break;
  2449. case TEST_UNIT_READY:
  2450. c->Request.CDBLen = 6;
  2451. c->Request.Type.Attribute = ATTR_SIMPLE;
  2452. c->Request.Type.Direction = XFER_NONE;
  2453. c->Request.Timeout = 0;
  2454. break;
  2455. default:
  2456. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2457. BUG();
  2458. return;
  2459. }
  2460. } else if (cmd_type == TYPE_MSG) {
  2461. switch (cmd) {
  2462. case HPSA_DEVICE_RESET_MSG:
  2463. c->Request.CDBLen = 16;
  2464. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2465. c->Request.Type.Attribute = ATTR_SIMPLE;
  2466. c->Request.Type.Direction = XFER_NONE;
  2467. c->Request.Timeout = 0; /* Don't time out */
  2468. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2469. c->Request.CDB[1] = 0x03; /* Reset target above */
  2470. /* If bytes 4-7 are zero, it means reset the */
  2471. /* LunID device */
  2472. c->Request.CDB[4] = 0x00;
  2473. c->Request.CDB[5] = 0x00;
  2474. c->Request.CDB[6] = 0x00;
  2475. c->Request.CDB[7] = 0x00;
  2476. break;
  2477. default:
  2478. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2479. cmd);
  2480. BUG();
  2481. }
  2482. } else {
  2483. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2484. BUG();
  2485. }
  2486. switch (c->Request.Type.Direction) {
  2487. case XFER_READ:
  2488. pci_dir = PCI_DMA_FROMDEVICE;
  2489. break;
  2490. case XFER_WRITE:
  2491. pci_dir = PCI_DMA_TODEVICE;
  2492. break;
  2493. case XFER_NONE:
  2494. pci_dir = PCI_DMA_NONE;
  2495. break;
  2496. default:
  2497. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2498. }
  2499. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2500. return;
  2501. }
  2502. /*
  2503. * Map (physical) PCI mem into (virtual) kernel space
  2504. */
  2505. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2506. {
  2507. ulong page_base = ((ulong) base) & PAGE_MASK;
  2508. ulong page_offs = ((ulong) base) - page_base;
  2509. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2510. return page_remapped ? (page_remapped + page_offs) : NULL;
  2511. }
  2512. /* Takes cmds off the submission queue and sends them to the hardware,
  2513. * then puts them on the queue of cmds waiting for completion.
  2514. */
  2515. static void start_io(struct ctlr_info *h)
  2516. {
  2517. struct CommandList *c;
  2518. while (!hlist_empty(&h->reqQ)) {
  2519. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2520. /* can't do anything if fifo is full */
  2521. if ((h->access.fifo_full(h))) {
  2522. dev_warn(&h->pdev->dev, "fifo full\n");
  2523. break;
  2524. }
  2525. /* Get the first entry from the Request Q */
  2526. removeQ(c);
  2527. h->Qdepth--;
  2528. /* Tell the controller execute command */
  2529. h->access.submit_command(h, c);
  2530. /* Put job onto the completed Q */
  2531. addQ(&h->cmpQ, c);
  2532. }
  2533. }
  2534. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2535. {
  2536. return h->access.command_completed(h);
  2537. }
  2538. static inline bool interrupt_pending(struct ctlr_info *h)
  2539. {
  2540. return h->access.intr_pending(h);
  2541. }
  2542. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2543. {
  2544. return !(h->msi_vector || h->msix_vector) &&
  2545. ((h->access.intr_pending(h) == 0) ||
  2546. (h->interrupts_enabled == 0));
  2547. }
  2548. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2549. u32 raw_tag)
  2550. {
  2551. if (unlikely(tag_index >= h->nr_cmds)) {
  2552. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2553. return 1;
  2554. }
  2555. return 0;
  2556. }
  2557. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2558. {
  2559. removeQ(c);
  2560. if (likely(c->cmd_type == CMD_SCSI))
  2561. complete_scsi_command(c, 0, raw_tag);
  2562. else if (c->cmd_type == CMD_IOCTL_PEND)
  2563. complete(c->waiting);
  2564. }
  2565. static inline u32 hpsa_tag_contains_index(u32 tag)
  2566. {
  2567. #define DIRECT_LOOKUP_BIT 0x10
  2568. return tag & DIRECT_LOOKUP_BIT;
  2569. }
  2570. static inline u32 hpsa_tag_to_index(u32 tag)
  2571. {
  2572. #define DIRECT_LOOKUP_SHIFT 5
  2573. return tag >> DIRECT_LOOKUP_SHIFT;
  2574. }
  2575. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2576. {
  2577. #define HPSA_ERROR_BITS 0x03
  2578. return tag & ~HPSA_ERROR_BITS;
  2579. }
  2580. /* process completion of an indexed ("direct lookup") command */
  2581. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2582. u32 raw_tag)
  2583. {
  2584. u32 tag_index;
  2585. struct CommandList *c;
  2586. tag_index = hpsa_tag_to_index(raw_tag);
  2587. if (bad_tag(h, tag_index, raw_tag))
  2588. return next_command(h);
  2589. c = h->cmd_pool + tag_index;
  2590. finish_cmd(c, raw_tag);
  2591. return next_command(h);
  2592. }
  2593. /* process completion of a non-indexed command */
  2594. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2595. u32 raw_tag)
  2596. {
  2597. u32 tag;
  2598. struct CommandList *c = NULL;
  2599. struct hlist_node *tmp;
  2600. tag = hpsa_tag_discard_error_bits(raw_tag);
  2601. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2602. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2603. finish_cmd(c, raw_tag);
  2604. return next_command(h);
  2605. }
  2606. }
  2607. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2608. return next_command(h);
  2609. }
  2610. static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
  2611. {
  2612. struct ctlr_info *h = dev_id;
  2613. unsigned long flags;
  2614. u32 raw_tag;
  2615. if (interrupt_not_for_us(h))
  2616. return IRQ_NONE;
  2617. spin_lock_irqsave(&h->lock, flags);
  2618. raw_tag = get_next_completion(h);
  2619. while (raw_tag != FIFO_EMPTY) {
  2620. if (hpsa_tag_contains_index(raw_tag))
  2621. raw_tag = process_indexed_cmd(h, raw_tag);
  2622. else
  2623. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2624. }
  2625. spin_unlock_irqrestore(&h->lock, flags);
  2626. return IRQ_HANDLED;
  2627. }
  2628. /* Send a message CDB to the firmware. */
  2629. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2630. unsigned char type)
  2631. {
  2632. struct Command {
  2633. struct CommandListHeader CommandHeader;
  2634. struct RequestBlock Request;
  2635. struct ErrDescriptor ErrorDescriptor;
  2636. };
  2637. struct Command *cmd;
  2638. static const size_t cmd_sz = sizeof(*cmd) +
  2639. sizeof(cmd->ErrorDescriptor);
  2640. dma_addr_t paddr64;
  2641. uint32_t paddr32, tag;
  2642. void __iomem *vaddr;
  2643. int i, err;
  2644. vaddr = pci_ioremap_bar(pdev, 0);
  2645. if (vaddr == NULL)
  2646. return -ENOMEM;
  2647. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2648. * CCISS commands, so they must be allocated from the lower 4GiB of
  2649. * memory.
  2650. */
  2651. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2652. if (err) {
  2653. iounmap(vaddr);
  2654. return -ENOMEM;
  2655. }
  2656. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2657. if (cmd == NULL) {
  2658. iounmap(vaddr);
  2659. return -ENOMEM;
  2660. }
  2661. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2662. * although there's no guarantee, we assume that the address is at
  2663. * least 4-byte aligned (most likely, it's page-aligned).
  2664. */
  2665. paddr32 = paddr64;
  2666. cmd->CommandHeader.ReplyQueue = 0;
  2667. cmd->CommandHeader.SGList = 0;
  2668. cmd->CommandHeader.SGTotal = 0;
  2669. cmd->CommandHeader.Tag.lower = paddr32;
  2670. cmd->CommandHeader.Tag.upper = 0;
  2671. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2672. cmd->Request.CDBLen = 16;
  2673. cmd->Request.Type.Type = TYPE_MSG;
  2674. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2675. cmd->Request.Type.Direction = XFER_NONE;
  2676. cmd->Request.Timeout = 0; /* Don't time out */
  2677. cmd->Request.CDB[0] = opcode;
  2678. cmd->Request.CDB[1] = type;
  2679. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2680. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2681. cmd->ErrorDescriptor.Addr.upper = 0;
  2682. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2683. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2684. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2685. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2686. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2687. break;
  2688. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2689. }
  2690. iounmap(vaddr);
  2691. /* we leak the DMA buffer here ... no choice since the controller could
  2692. * still complete the command.
  2693. */
  2694. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2695. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2696. opcode, type);
  2697. return -ETIMEDOUT;
  2698. }
  2699. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2700. if (tag & HPSA_ERROR_BIT) {
  2701. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2702. opcode, type);
  2703. return -EIO;
  2704. }
  2705. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2706. opcode, type);
  2707. return 0;
  2708. }
  2709. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2710. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2711. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2712. {
  2713. /* the #defines are stolen from drivers/pci/msi.h. */
  2714. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2715. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2716. int pos;
  2717. u16 control = 0;
  2718. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2719. if (pos) {
  2720. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2721. if (control & PCI_MSI_FLAGS_ENABLE) {
  2722. dev_info(&pdev->dev, "resetting MSI\n");
  2723. pci_write_config_word(pdev, msi_control_reg(pos),
  2724. control & ~PCI_MSI_FLAGS_ENABLE);
  2725. }
  2726. }
  2727. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2728. if (pos) {
  2729. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2730. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2731. dev_info(&pdev->dev, "resetting MSI-X\n");
  2732. pci_write_config_word(pdev, msi_control_reg(pos),
  2733. control & ~PCI_MSIX_FLAGS_ENABLE);
  2734. }
  2735. }
  2736. return 0;
  2737. }
  2738. /* This does a hard reset of the controller using PCI power management
  2739. * states.
  2740. */
  2741. static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
  2742. {
  2743. u16 pmcsr, saved_config_space[32];
  2744. int i, pos;
  2745. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2746. /* This is very nearly the same thing as
  2747. *
  2748. * pci_save_state(pci_dev);
  2749. * pci_set_power_state(pci_dev, PCI_D3hot);
  2750. * pci_set_power_state(pci_dev, PCI_D0);
  2751. * pci_restore_state(pci_dev);
  2752. *
  2753. * but we can't use these nice canned kernel routines on
  2754. * kexec, because they also check the MSI/MSI-X state in PCI
  2755. * configuration space and do the wrong thing when it is
  2756. * set/cleared. Also, the pci_save/restore_state functions
  2757. * violate the ordering requirements for restoring the
  2758. * configuration space from the CCISS document (see the
  2759. * comment below). So we roll our own ....
  2760. */
  2761. for (i = 0; i < 32; i++)
  2762. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2763. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2764. if (pos == 0) {
  2765. dev_err(&pdev->dev,
  2766. "hpsa_reset_controller: PCI PM not supported\n");
  2767. return -ENODEV;
  2768. }
  2769. /* Quoting from the Open CISS Specification: "The Power
  2770. * Management Control/Status Register (CSR) controls the power
  2771. * state of the device. The normal operating state is D0,
  2772. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2773. * the controller, place the interface device in D3 then to
  2774. * D0, this causes a secondary PCI reset which will reset the
  2775. * controller."
  2776. */
  2777. /* enter the D3hot power management state */
  2778. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2779. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2780. pmcsr |= PCI_D3hot;
  2781. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2782. msleep(500);
  2783. /* enter the D0 power management state */
  2784. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2785. pmcsr |= PCI_D0;
  2786. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2787. msleep(500);
  2788. /* Restore the PCI configuration space. The Open CISS
  2789. * Specification says, "Restore the PCI Configuration
  2790. * Registers, offsets 00h through 60h. It is important to
  2791. * restore the command register, 16-bits at offset 04h,
  2792. * last. Do not restore the configuration status register,
  2793. * 16-bits at offset 06h." Note that the offset is 2*i.
  2794. */
  2795. for (i = 0; i < 32; i++) {
  2796. if (i == 2 || i == 3)
  2797. continue;
  2798. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2799. }
  2800. wmb();
  2801. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2802. return 0;
  2803. }
  2804. /*
  2805. * We cannot read the structure directly, for portability we must use
  2806. * the io functions.
  2807. * This is for debug only.
  2808. */
  2809. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2810. {
  2811. #ifdef HPSA_DEBUG
  2812. int i;
  2813. char temp_name[17];
  2814. dev_info(dev, "Controller Configuration information\n");
  2815. dev_info(dev, "------------------------------------\n");
  2816. for (i = 0; i < 4; i++)
  2817. temp_name[i] = readb(&(tb->Signature[i]));
  2818. temp_name[4] = '\0';
  2819. dev_info(dev, " Signature = %s\n", temp_name);
  2820. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2821. dev_info(dev, " Transport methods supported = 0x%x\n",
  2822. readl(&(tb->TransportSupport)));
  2823. dev_info(dev, " Transport methods active = 0x%x\n",
  2824. readl(&(tb->TransportActive)));
  2825. dev_info(dev, " Requested transport Method = 0x%x\n",
  2826. readl(&(tb->HostWrite.TransportRequest)));
  2827. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2828. readl(&(tb->HostWrite.CoalIntDelay)));
  2829. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2830. readl(&(tb->HostWrite.CoalIntCount)));
  2831. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2832. readl(&(tb->CmdsOutMax)));
  2833. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2834. for (i = 0; i < 16; i++)
  2835. temp_name[i] = readb(&(tb->ServerName[i]));
  2836. temp_name[16] = '\0';
  2837. dev_info(dev, " Server Name = %s\n", temp_name);
  2838. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2839. readl(&(tb->HeartBeat)));
  2840. #endif /* HPSA_DEBUG */
  2841. }
  2842. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2843. {
  2844. int i, offset, mem_type, bar_type;
  2845. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2846. return 0;
  2847. offset = 0;
  2848. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2849. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2850. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2851. offset += 4;
  2852. else {
  2853. mem_type = pci_resource_flags(pdev, i) &
  2854. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2855. switch (mem_type) {
  2856. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2857. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2858. offset += 4; /* 32 bit */
  2859. break;
  2860. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2861. offset += 8;
  2862. break;
  2863. default: /* reserved in PCI 2.2 */
  2864. dev_warn(&pdev->dev,
  2865. "base address is invalid\n");
  2866. return -1;
  2867. break;
  2868. }
  2869. }
  2870. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2871. return i + 1;
  2872. }
  2873. return -1;
  2874. }
  2875. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2876. * controllers that are capable. If not, we use IO-APIC mode.
  2877. */
  2878. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2879. {
  2880. #ifdef CONFIG_PCI_MSI
  2881. int err;
  2882. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2883. {0, 2}, {0, 3}
  2884. };
  2885. /* Some boards advertise MSI but don't really support it */
  2886. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2887. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2888. goto default_int_mode;
  2889. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2890. dev_info(&h->pdev->dev, "MSIX\n");
  2891. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  2892. if (!err) {
  2893. h->intr[0] = hpsa_msix_entries[0].vector;
  2894. h->intr[1] = hpsa_msix_entries[1].vector;
  2895. h->intr[2] = hpsa_msix_entries[2].vector;
  2896. h->intr[3] = hpsa_msix_entries[3].vector;
  2897. h->msix_vector = 1;
  2898. return;
  2899. }
  2900. if (err > 0) {
  2901. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  2902. "available\n", err);
  2903. goto default_int_mode;
  2904. } else {
  2905. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  2906. err);
  2907. goto default_int_mode;
  2908. }
  2909. }
  2910. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  2911. dev_info(&h->pdev->dev, "MSI\n");
  2912. if (!pci_enable_msi(h->pdev))
  2913. h->msi_vector = 1;
  2914. else
  2915. dev_warn(&h->pdev->dev, "MSI init failed\n");
  2916. }
  2917. default_int_mode:
  2918. #endif /* CONFIG_PCI_MSI */
  2919. /* if we get here we're going to use the default interrupt mode */
  2920. h->intr[PERF_MODE_INT] = h->pdev->irq;
  2921. }
  2922. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  2923. {
  2924. int i;
  2925. u32 subsystem_vendor_id, subsystem_device_id;
  2926. subsystem_vendor_id = pdev->subsystem_vendor;
  2927. subsystem_device_id = pdev->subsystem_device;
  2928. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  2929. subsystem_vendor_id;
  2930. for (i = 0; i < ARRAY_SIZE(products); i++)
  2931. if (*board_id == products[i].board_id)
  2932. return i;
  2933. if (subsystem_vendor_id != PCI_VENDOR_ID_HP || !hpsa_allow_any) {
  2934. dev_warn(&pdev->dev, "unrecognized board ID: "
  2935. "0x%08x, ignoring.\n", *board_id);
  2936. return -ENODEV;
  2937. }
  2938. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  2939. }
  2940. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  2941. {
  2942. u16 command;
  2943. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  2944. return ((command & PCI_COMMAND_MEMORY) == 0);
  2945. }
  2946. static int __devinit hpsa_pci_find_memory_BAR(struct ctlr_info *h,
  2947. unsigned long *memory_bar)
  2948. {
  2949. int i;
  2950. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  2951. if (pci_resource_flags(h->pdev, i) & IORESOURCE_MEM) {
  2952. /* addressing mode bits already removed */
  2953. *memory_bar = pci_resource_start(h->pdev, i);
  2954. dev_dbg(&h->pdev->dev, "memory BAR = %lx\n",
  2955. *memory_bar);
  2956. return 0;
  2957. }
  2958. dev_warn(&h->pdev->dev, "no memory BAR found\n");
  2959. return -ENODEV;
  2960. }
  2961. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  2962. {
  2963. int i;
  2964. u32 scratchpad;
  2965. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  2966. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  2967. if (scratchpad == HPSA_FIRMWARE_READY)
  2968. return 0;
  2969. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  2970. }
  2971. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  2972. return -ENODEV;
  2973. }
  2974. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  2975. {
  2976. u64 cfg_offset;
  2977. u32 cfg_base_addr;
  2978. u64 cfg_base_addr_index;
  2979. u32 trans_offset;
  2980. /* get the address index number */
  2981. cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
  2982. cfg_base_addr &= (u32) 0x0000ffff;
  2983. cfg_base_addr_index = find_PCI_BAR_index(h->pdev, cfg_base_addr);
  2984. if (cfg_base_addr_index == -1) {
  2985. dev_warn(&h->pdev->dev, "cannot find cfg_base_addr_index\n");
  2986. return -ENODEV;
  2987. }
  2988. cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
  2989. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  2990. cfg_base_addr_index) + cfg_offset,
  2991. sizeof(h->cfgtable));
  2992. if (!h->cfgtable)
  2993. return -ENOMEM;
  2994. /* Find performant mode table. */
  2995. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  2996. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  2997. cfg_base_addr_index)+cfg_offset+trans_offset,
  2998. sizeof(*h->transtable));
  2999. if (!h->transtable)
  3000. return -ENOMEM;
  3001. return 0;
  3002. }
  3003. /* Interrogate the hardware for some limits:
  3004. * max commands, max SG elements without chaining, and with chaining,
  3005. * SG chain block size, etc.
  3006. */
  3007. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3008. {
  3009. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3010. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3011. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3012. /*
  3013. * Limit in-command s/g elements to 32 save dma'able memory.
  3014. * Howvever spec says if 0, use 31
  3015. */
  3016. h->max_cmd_sg_entries = 31;
  3017. if (h->maxsgentries > 512) {
  3018. h->max_cmd_sg_entries = 32;
  3019. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3020. h->maxsgentries--; /* save one for chain pointer */
  3021. } else {
  3022. h->maxsgentries = 31; /* default to traditional values */
  3023. h->chainsize = 0;
  3024. }
  3025. }
  3026. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3027. {
  3028. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3029. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3030. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3031. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3032. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3033. return false;
  3034. }
  3035. return true;
  3036. }
  3037. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3038. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3039. {
  3040. #ifdef CONFIG_X86
  3041. u32 prefetch;
  3042. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3043. prefetch |= 0x100;
  3044. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3045. #endif
  3046. }
  3047. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3048. * in a prefetch beyond physical memory.
  3049. */
  3050. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3051. {
  3052. u32 dma_prefetch;
  3053. if (h->board_id != 0x3225103C)
  3054. return;
  3055. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3056. dma_prefetch |= 0x8000;
  3057. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3058. }
  3059. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3060. {
  3061. int i;
  3062. /* under certain very rare conditions, this can take awhile.
  3063. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3064. * as we enter this code.)
  3065. */
  3066. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3067. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3068. break;
  3069. /* delay and try again */
  3070. msleep(10);
  3071. }
  3072. }
  3073. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3074. {
  3075. u32 trans_support;
  3076. trans_support = readl(&(h->cfgtable->TransportSupport));
  3077. if (!(trans_support & SIMPLE_MODE))
  3078. return -ENOTSUPP;
  3079. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3080. /* Update the field, and then ring the doorbell */
  3081. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3082. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3083. hpsa_wait_for_mode_change_ack(h);
  3084. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3085. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3086. dev_warn(&h->pdev->dev,
  3087. "unable to get board into simple mode\n");
  3088. return -ENODEV;
  3089. }
  3090. return 0;
  3091. }
  3092. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3093. {
  3094. int prod_index, err;
  3095. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3096. if (prod_index < 0)
  3097. return -ENODEV;
  3098. h->product_name = products[prod_index].product_name;
  3099. h->access = *(products[prod_index].access);
  3100. if (hpsa_board_disabled(h->pdev)) {
  3101. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3102. return -ENODEV;
  3103. }
  3104. err = pci_enable_device(h->pdev);
  3105. if (err) {
  3106. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3107. return err;
  3108. }
  3109. err = pci_request_regions(h->pdev, "hpsa");
  3110. if (err) {
  3111. dev_err(&h->pdev->dev,
  3112. "cannot obtain PCI resources, aborting\n");
  3113. return err;
  3114. }
  3115. hpsa_interrupt_mode(h);
  3116. err = hpsa_pci_find_memory_BAR(h, &h->paddr);
  3117. if (err)
  3118. goto err_out_free_res;
  3119. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3120. if (!h->vaddr) {
  3121. err = -ENOMEM;
  3122. goto err_out_free_res;
  3123. }
  3124. err = hpsa_wait_for_board_ready(h);
  3125. if (err)
  3126. goto err_out_free_res;
  3127. err = hpsa_find_cfgtables(h);
  3128. if (err)
  3129. goto err_out_free_res;
  3130. hpsa_find_board_params(h);
  3131. if (!hpsa_CISS_signature_present(h)) {
  3132. err = -ENODEV;
  3133. goto err_out_free_res;
  3134. }
  3135. hpsa_enable_scsi_prefetch(h);
  3136. hpsa_p600_dma_prefetch_quirk(h);
  3137. err = hpsa_enter_simple_mode(h);
  3138. if (err)
  3139. goto err_out_free_res;
  3140. return 0;
  3141. err_out_free_res:
  3142. if (h->transtable)
  3143. iounmap(h->transtable);
  3144. if (h->cfgtable)
  3145. iounmap(h->cfgtable);
  3146. if (h->vaddr)
  3147. iounmap(h->vaddr);
  3148. /*
  3149. * Deliberately omit pci_disable_device(): it does something nasty to
  3150. * Smart Array controllers that pci_enable_device does not undo
  3151. */
  3152. pci_release_regions(h->pdev);
  3153. return err;
  3154. }
  3155. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3156. {
  3157. int rc;
  3158. #define HBA_INQUIRY_BYTE_COUNT 64
  3159. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3160. if (!h->hba_inquiry_data)
  3161. return;
  3162. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3163. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3164. if (rc != 0) {
  3165. kfree(h->hba_inquiry_data);
  3166. h->hba_inquiry_data = NULL;
  3167. }
  3168. }
  3169. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3170. const struct pci_device_id *ent)
  3171. {
  3172. int i, rc;
  3173. int dac;
  3174. struct ctlr_info *h;
  3175. if (number_of_controllers == 0)
  3176. printk(KERN_INFO DRIVER_NAME "\n");
  3177. if (reset_devices) {
  3178. /* Reset the controller with a PCI power-cycle */
  3179. if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
  3180. return -ENODEV;
  3181. /* Some devices (notably the HP Smart Array 5i Controller)
  3182. need a little pause here */
  3183. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3184. /* Now try to get the controller to respond to a no-op */
  3185. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3186. if (hpsa_noop(pdev) == 0)
  3187. break;
  3188. else
  3189. dev_warn(&pdev->dev, "no-op failed%s\n",
  3190. (i < 11 ? "; re-trying" : ""));
  3191. }
  3192. }
  3193. /* Command structures must be aligned on a 32-byte boundary because
  3194. * the 5 lower bits of the address are used by the hardware. and by
  3195. * the driver. See comments in hpsa.h for more info.
  3196. */
  3197. #define COMMANDLIST_ALIGNMENT 32
  3198. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3199. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3200. if (!h)
  3201. return -ENOMEM;
  3202. h->pdev = pdev;
  3203. h->busy_initializing = 1;
  3204. INIT_HLIST_HEAD(&h->cmpQ);
  3205. INIT_HLIST_HEAD(&h->reqQ);
  3206. rc = hpsa_pci_init(h);
  3207. if (rc != 0)
  3208. goto clean1;
  3209. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3210. h->ctlr = number_of_controllers;
  3211. number_of_controllers++;
  3212. /* configure PCI DMA stuff */
  3213. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3214. if (rc == 0) {
  3215. dac = 1;
  3216. } else {
  3217. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3218. if (rc == 0) {
  3219. dac = 0;
  3220. } else {
  3221. dev_err(&pdev->dev, "no suitable DMA available\n");
  3222. goto clean1;
  3223. }
  3224. }
  3225. /* make sure the board interrupts are off */
  3226. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3227. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr,
  3228. IRQF_DISABLED, h->devname, h);
  3229. if (rc) {
  3230. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3231. h->intr[PERF_MODE_INT], h->devname);
  3232. goto clean2;
  3233. }
  3234. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3235. h->devname, pdev->device,
  3236. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3237. h->cmd_pool_bits =
  3238. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3239. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3240. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3241. h->nr_cmds * sizeof(*h->cmd_pool),
  3242. &(h->cmd_pool_dhandle));
  3243. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3244. h->nr_cmds * sizeof(*h->errinfo_pool),
  3245. &(h->errinfo_pool_dhandle));
  3246. if ((h->cmd_pool_bits == NULL)
  3247. || (h->cmd_pool == NULL)
  3248. || (h->errinfo_pool == NULL)) {
  3249. dev_err(&pdev->dev, "out of memory");
  3250. rc = -ENOMEM;
  3251. goto clean4;
  3252. }
  3253. if (hpsa_allocate_sg_chain_blocks(h))
  3254. goto clean4;
  3255. spin_lock_init(&h->lock);
  3256. spin_lock_init(&h->scan_lock);
  3257. init_waitqueue_head(&h->scan_wait_queue);
  3258. h->scan_finished = 1; /* no scan currently in progress */
  3259. pci_set_drvdata(pdev, h);
  3260. memset(h->cmd_pool_bits, 0,
  3261. ((h->nr_cmds + BITS_PER_LONG -
  3262. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3263. hpsa_scsi_setup(h);
  3264. /* Turn the interrupts on so we can service requests */
  3265. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3266. hpsa_put_ctlr_into_performant_mode(h);
  3267. hpsa_hba_inquiry(h);
  3268. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3269. h->busy_initializing = 0;
  3270. return 1;
  3271. clean4:
  3272. hpsa_free_sg_chain_blocks(h);
  3273. kfree(h->cmd_pool_bits);
  3274. if (h->cmd_pool)
  3275. pci_free_consistent(h->pdev,
  3276. h->nr_cmds * sizeof(struct CommandList),
  3277. h->cmd_pool, h->cmd_pool_dhandle);
  3278. if (h->errinfo_pool)
  3279. pci_free_consistent(h->pdev,
  3280. h->nr_cmds * sizeof(struct ErrorInfo),
  3281. h->errinfo_pool,
  3282. h->errinfo_pool_dhandle);
  3283. free_irq(h->intr[PERF_MODE_INT], h);
  3284. clean2:
  3285. clean1:
  3286. h->busy_initializing = 0;
  3287. kfree(h);
  3288. return rc;
  3289. }
  3290. static void hpsa_flush_cache(struct ctlr_info *h)
  3291. {
  3292. char *flush_buf;
  3293. struct CommandList *c;
  3294. flush_buf = kzalloc(4, GFP_KERNEL);
  3295. if (!flush_buf)
  3296. return;
  3297. c = cmd_special_alloc(h);
  3298. if (!c) {
  3299. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3300. goto out_of_memory;
  3301. }
  3302. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3303. RAID_CTLR_LUNID, TYPE_CMD);
  3304. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3305. if (c->err_info->CommandStatus != 0)
  3306. dev_warn(&h->pdev->dev,
  3307. "error flushing cache on controller\n");
  3308. cmd_special_free(h, c);
  3309. out_of_memory:
  3310. kfree(flush_buf);
  3311. }
  3312. static void hpsa_shutdown(struct pci_dev *pdev)
  3313. {
  3314. struct ctlr_info *h;
  3315. h = pci_get_drvdata(pdev);
  3316. /* Turn board interrupts off and send the flush cache command
  3317. * sendcmd will turn off interrupt, and send the flush...
  3318. * To write all data in the battery backed cache to disks
  3319. */
  3320. hpsa_flush_cache(h);
  3321. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3322. free_irq(h->intr[PERF_MODE_INT], h);
  3323. #ifdef CONFIG_PCI_MSI
  3324. if (h->msix_vector)
  3325. pci_disable_msix(h->pdev);
  3326. else if (h->msi_vector)
  3327. pci_disable_msi(h->pdev);
  3328. #endif /* CONFIG_PCI_MSI */
  3329. }
  3330. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3331. {
  3332. struct ctlr_info *h;
  3333. if (pci_get_drvdata(pdev) == NULL) {
  3334. dev_err(&pdev->dev, "unable to remove device \n");
  3335. return;
  3336. }
  3337. h = pci_get_drvdata(pdev);
  3338. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3339. hpsa_shutdown(pdev);
  3340. iounmap(h->vaddr);
  3341. iounmap(h->transtable);
  3342. iounmap(h->cfgtable);
  3343. hpsa_free_sg_chain_blocks(h);
  3344. pci_free_consistent(h->pdev,
  3345. h->nr_cmds * sizeof(struct CommandList),
  3346. h->cmd_pool, h->cmd_pool_dhandle);
  3347. pci_free_consistent(h->pdev,
  3348. h->nr_cmds * sizeof(struct ErrorInfo),
  3349. h->errinfo_pool, h->errinfo_pool_dhandle);
  3350. pci_free_consistent(h->pdev, h->reply_pool_size,
  3351. h->reply_pool, h->reply_pool_dhandle);
  3352. kfree(h->cmd_pool_bits);
  3353. kfree(h->blockFetchTable);
  3354. kfree(h->hba_inquiry_data);
  3355. /*
  3356. * Deliberately omit pci_disable_device(): it does something nasty to
  3357. * Smart Array controllers that pci_enable_device does not undo
  3358. */
  3359. pci_release_regions(pdev);
  3360. pci_set_drvdata(pdev, NULL);
  3361. kfree(h);
  3362. }
  3363. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3364. __attribute__((unused)) pm_message_t state)
  3365. {
  3366. return -ENOSYS;
  3367. }
  3368. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3369. {
  3370. return -ENOSYS;
  3371. }
  3372. static struct pci_driver hpsa_pci_driver = {
  3373. .name = "hpsa",
  3374. .probe = hpsa_init_one,
  3375. .remove = __devexit_p(hpsa_remove_one),
  3376. .id_table = hpsa_pci_device_id, /* id_table */
  3377. .shutdown = hpsa_shutdown,
  3378. .suspend = hpsa_suspend,
  3379. .resume = hpsa_resume,
  3380. };
  3381. /* Fill in bucket_map[], given nsgs (the max number of
  3382. * scatter gather elements supported) and bucket[],
  3383. * which is an array of 8 integers. The bucket[] array
  3384. * contains 8 different DMA transfer sizes (in 16
  3385. * byte increments) which the controller uses to fetch
  3386. * commands. This function fills in bucket_map[], which
  3387. * maps a given number of scatter gather elements to one of
  3388. * the 8 DMA transfer sizes. The point of it is to allow the
  3389. * controller to only do as much DMA as needed to fetch the
  3390. * command, with the DMA transfer size encoded in the lower
  3391. * bits of the command address.
  3392. */
  3393. static void calc_bucket_map(int bucket[], int num_buckets,
  3394. int nsgs, int *bucket_map)
  3395. {
  3396. int i, j, b, size;
  3397. /* even a command with 0 SGs requires 4 blocks */
  3398. #define MINIMUM_TRANSFER_BLOCKS 4
  3399. #define NUM_BUCKETS 8
  3400. /* Note, bucket_map must have nsgs+1 entries. */
  3401. for (i = 0; i <= nsgs; i++) {
  3402. /* Compute size of a command with i SG entries */
  3403. size = i + MINIMUM_TRANSFER_BLOCKS;
  3404. b = num_buckets; /* Assume the biggest bucket */
  3405. /* Find the bucket that is just big enough */
  3406. for (j = 0; j < 8; j++) {
  3407. if (bucket[j] >= size) {
  3408. b = j;
  3409. break;
  3410. }
  3411. }
  3412. /* for a command with i SG entries, use bucket b. */
  3413. bucket_map[i] = b;
  3414. }
  3415. }
  3416. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3417. {
  3418. int i;
  3419. unsigned long register_value;
  3420. int bft[8] = {5, 6, 8, 10, 12, 20, 28, 35}; /* for scatter/gathers */
  3421. /* 5 = 1 s/g entry or 4k
  3422. * 6 = 2 s/g entry or 8k
  3423. * 8 = 4 s/g entry or 16k
  3424. * 10 = 6 s/g entry or 24k
  3425. */
  3426. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3427. /* Controller spec: zero out this buffer. */
  3428. memset(h->reply_pool, 0, h->reply_pool_size);
  3429. h->reply_pool_head = h->reply_pool;
  3430. bft[7] = h->max_sg_entries + 4;
  3431. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3432. for (i = 0; i < 8; i++)
  3433. writel(bft[i], &h->transtable->BlockFetch[i]);
  3434. /* size of controller ring buffer */
  3435. writel(h->max_commands, &h->transtable->RepQSize);
  3436. writel(1, &h->transtable->RepQCount);
  3437. writel(0, &h->transtable->RepQCtrAddrLow32);
  3438. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3439. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3440. writel(0, &h->transtable->RepQAddr0High32);
  3441. writel(CFGTBL_Trans_Performant,
  3442. &(h->cfgtable->HostWrite.TransportRequest));
  3443. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3444. hpsa_wait_for_mode_change_ack(h);
  3445. register_value = readl(&(h->cfgtable->TransportActive));
  3446. if (!(register_value & CFGTBL_Trans_Performant)) {
  3447. dev_warn(&h->pdev->dev, "unable to get board into"
  3448. " performant mode\n");
  3449. return;
  3450. }
  3451. }
  3452. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3453. {
  3454. u32 trans_support;
  3455. trans_support = readl(&(h->cfgtable->TransportSupport));
  3456. if (!(trans_support & PERFORMANT_MODE))
  3457. return;
  3458. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3459. h->max_sg_entries = 32;
  3460. /* Performant mode ring buffer and supporting data structures */
  3461. h->reply_pool_size = h->max_commands * sizeof(u64);
  3462. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3463. &(h->reply_pool_dhandle));
  3464. /* Need a block fetch table for performant mode */
  3465. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3466. sizeof(u32)), GFP_KERNEL);
  3467. if ((h->reply_pool == NULL)
  3468. || (h->blockFetchTable == NULL))
  3469. goto clean_up;
  3470. hpsa_enter_performant_mode(h);
  3471. /* Change the access methods to the performant access methods */
  3472. h->access = SA5_performant_access;
  3473. h->transMethod = CFGTBL_Trans_Performant;
  3474. return;
  3475. clean_up:
  3476. if (h->reply_pool)
  3477. pci_free_consistent(h->pdev, h->reply_pool_size,
  3478. h->reply_pool, h->reply_pool_dhandle);
  3479. kfree(h->blockFetchTable);
  3480. }
  3481. /*
  3482. * This is it. Register the PCI driver information for the cards we control
  3483. * the OS will call our registered routines when it finds one of our cards.
  3484. */
  3485. static int __init hpsa_init(void)
  3486. {
  3487. return pci_register_driver(&hpsa_pci_driver);
  3488. }
  3489. static void __exit hpsa_cleanup(void)
  3490. {
  3491. pci_unregister_driver(&hpsa_pci_driver);
  3492. }
  3493. module_init(hpsa_init);
  3494. module_exit(hpsa_cleanup);