tifm_ms.c 16 KB

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  1. /*
  2. * TI FlashMedia driver
  3. *
  4. * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  11. * that made this driver possible.
  12. *
  13. */
  14. #include <linux/tifm.h>
  15. #include <linux/memstick.h>
  16. #include <linux/highmem.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/log2.h>
  19. #include <asm/io.h>
  20. #define DRIVER_NAME "tifm_ms"
  21. static int no_dma;
  22. module_param(no_dma, bool, 0644);
  23. /*
  24. * Some control bits of TIFM appear to conform to Sony's reference design,
  25. * so I'm just assuming they all are.
  26. */
  27. #define TIFM_MS_STAT_DRQ 0x04000
  28. #define TIFM_MS_STAT_MSINT 0x02000
  29. #define TIFM_MS_STAT_RDY 0x01000
  30. #define TIFM_MS_STAT_CRC 0x00200
  31. #define TIFM_MS_STAT_TOE 0x00100
  32. #define TIFM_MS_STAT_EMP 0x00020
  33. #define TIFM_MS_STAT_FUL 0x00010
  34. #define TIFM_MS_STAT_CED 0x00008
  35. #define TIFM_MS_STAT_ERR 0x00004
  36. #define TIFM_MS_STAT_BRQ 0x00002
  37. #define TIFM_MS_STAT_CNK 0x00001
  38. #define TIFM_MS_SYS_DMA 0x10000
  39. #define TIFM_MS_SYS_RESET 0x08000
  40. #define TIFM_MS_SYS_SRAC 0x04000
  41. #define TIFM_MS_SYS_INTEN 0x02000
  42. #define TIFM_MS_SYS_NOCRC 0x01000
  43. #define TIFM_MS_SYS_INTCLR 0x00800
  44. #define TIFM_MS_SYS_MSIEN 0x00400
  45. #define TIFM_MS_SYS_FCLR 0x00200
  46. #define TIFM_MS_SYS_FDIR 0x00100
  47. #define TIFM_MS_SYS_DAM 0x00080
  48. #define TIFM_MS_SYS_DRM 0x00040
  49. #define TIFM_MS_SYS_DRQSL 0x00020
  50. #define TIFM_MS_SYS_REI 0x00010
  51. #define TIFM_MS_SYS_REO 0x00008
  52. #define TIFM_MS_SYS_BSY_MASK 0x00007
  53. #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
  54. | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
  55. /* Hardware flags */
  56. enum {
  57. CMD_READY = 0x01,
  58. FIFO_READY = 0x02,
  59. CARD_INT = 0x04
  60. };
  61. struct tifm_ms {
  62. struct tifm_dev *dev;
  63. struct timer_list timer;
  64. struct memstick_request *req;
  65. unsigned int mode_mask;
  66. unsigned int block_pos;
  67. unsigned long timeout_jiffies;
  68. unsigned char eject:1,
  69. use_dma:1;
  70. unsigned char cmd_flags;
  71. unsigned char io_pos;
  72. unsigned int io_word;
  73. };
  74. static unsigned int tifm_ms_read_data(struct tifm_ms *host,
  75. unsigned char *buf, unsigned int length)
  76. {
  77. struct tifm_dev *sock = host->dev;
  78. unsigned int off = 0;
  79. while (host->io_pos && length) {
  80. buf[off++] = host->io_word & 0xff;
  81. host->io_word >>= 8;
  82. length--;
  83. host->io_pos--;
  84. }
  85. if (!length)
  86. return off;
  87. while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  88. if (length < 4)
  89. break;
  90. *(unsigned int *)(buf + off) = __raw_readl(sock->addr
  91. + SOCK_MS_DATA);
  92. length -= 4;
  93. off += 4;
  94. }
  95. if (length
  96. && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  97. host->io_word = readl(sock->addr + SOCK_MS_DATA);
  98. for (host->io_pos = 4; host->io_pos; --host->io_pos) {
  99. buf[off++] = host->io_word & 0xff;
  100. host->io_word >>= 8;
  101. length--;
  102. if (!length)
  103. break;
  104. }
  105. }
  106. return off;
  107. }
  108. static unsigned int tifm_ms_write_data(struct tifm_ms *host,
  109. unsigned char *buf, unsigned int length)
  110. {
  111. struct tifm_dev *sock = host->dev;
  112. unsigned int off = 0;
  113. if (host->io_pos) {
  114. while (host->io_pos < 4 && length) {
  115. host->io_word |= buf[off++] << (host->io_pos * 8);
  116. host->io_pos++;
  117. length--;
  118. }
  119. }
  120. if (host->io_pos == 4
  121. && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  122. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  123. sock->addr + SOCK_MS_SYSTEM);
  124. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  125. host->io_pos = 0;
  126. host->io_word = 0;
  127. } else if (host->io_pos) {
  128. return off;
  129. }
  130. if (!length)
  131. return off;
  132. while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  133. if (length < 4)
  134. break;
  135. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  136. sock->addr + SOCK_MS_SYSTEM);
  137. __raw_writel(*(unsigned int *)(buf + off),
  138. sock->addr + SOCK_MS_DATA);
  139. length -= 4;
  140. off += 4;
  141. }
  142. switch (length) {
  143. case 3:
  144. host->io_word |= buf[off + 2] << 16;
  145. host->io_pos++;
  146. case 2:
  147. host->io_word |= buf[off + 1] << 8;
  148. host->io_pos++;
  149. case 1:
  150. host->io_word |= buf[off];
  151. host->io_pos++;
  152. }
  153. off += host->io_pos;
  154. return off;
  155. }
  156. static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
  157. {
  158. struct tifm_dev *sock = host->dev;
  159. unsigned int length;
  160. unsigned int off;
  161. unsigned int t_size, p_cnt;
  162. unsigned char *buf;
  163. struct page *pg;
  164. unsigned long flags = 0;
  165. if (host->req->long_data) {
  166. length = host->req->sg.length - host->block_pos;
  167. off = host->req->sg.offset + host->block_pos;
  168. } else {
  169. length = host->req->data_len - host->block_pos;
  170. off = 0;
  171. }
  172. dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
  173. host->block_pos);
  174. while (length) {
  175. unsigned int uninitialized_var(p_off);
  176. if (host->req->long_data) {
  177. pg = nth_page(sg_page(&host->req->sg),
  178. off >> PAGE_SHIFT);
  179. p_off = offset_in_page(off);
  180. p_cnt = PAGE_SIZE - p_off;
  181. p_cnt = min(p_cnt, length);
  182. local_irq_save(flags);
  183. buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
  184. } else {
  185. buf = host->req->data + host->block_pos;
  186. p_cnt = host->req->data_len - host->block_pos;
  187. }
  188. t_size = host->req->data_dir == WRITE
  189. ? tifm_ms_write_data(host, buf, p_cnt)
  190. : tifm_ms_read_data(host, buf, p_cnt);
  191. if (host->req->long_data) {
  192. kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
  193. local_irq_restore(flags);
  194. }
  195. if (!t_size)
  196. break;
  197. host->block_pos += t_size;
  198. length -= t_size;
  199. off += t_size;
  200. }
  201. dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
  202. if (!length && (host->req->data_dir == WRITE)) {
  203. if (host->io_pos) {
  204. writel(TIFM_MS_SYS_FDIR
  205. | readl(sock->addr + SOCK_MS_SYSTEM),
  206. sock->addr + SOCK_MS_SYSTEM);
  207. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  208. }
  209. writel(TIFM_MS_SYS_FDIR
  210. | readl(sock->addr + SOCK_MS_SYSTEM),
  211. sock->addr + SOCK_MS_SYSTEM);
  212. writel(0, sock->addr + SOCK_MS_DATA);
  213. } else {
  214. readl(sock->addr + SOCK_MS_DATA);
  215. }
  216. return length;
  217. }
  218. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  219. {
  220. struct tifm_dev *sock = host->dev;
  221. unsigned char *data;
  222. unsigned int data_len, cmd, sys_param;
  223. host->cmd_flags = 0;
  224. host->block_pos = 0;
  225. host->io_pos = 0;
  226. host->io_word = 0;
  227. host->cmd_flags = 0;
  228. data = host->req->data;
  229. host->use_dma = !no_dma;
  230. if (host->req->long_data) {
  231. data_len = host->req->sg.length;
  232. if (!is_power_of_2(data_len))
  233. host->use_dma = 0;
  234. } else {
  235. data_len = host->req->data_len;
  236. host->use_dma = 0;
  237. }
  238. writel(TIFM_FIFO_INT_SETALL,
  239. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  240. writel(TIFM_FIFO_ENABLE,
  241. sock->addr + SOCK_FIFO_CONTROL);
  242. if (host->use_dma) {
  243. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  244. host->req->data_dir == READ
  245. ? PCI_DMA_FROMDEVICE
  246. : PCI_DMA_TODEVICE)) {
  247. host->req->error = -ENOMEM;
  248. return host->req->error;
  249. }
  250. data_len = sg_dma_len(&host->req->sg);
  251. writel(ilog2(data_len) - 2,
  252. sock->addr + SOCK_FIFO_PAGE_SIZE);
  253. writel(TIFM_FIFO_INTMASK,
  254. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  255. sys_param = TIFM_DMA_EN | (1 << 8);
  256. if (host->req->data_dir == WRITE)
  257. sys_param |= TIFM_DMA_TX;
  258. writel(TIFM_FIFO_INTMASK,
  259. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  260. writel(sg_dma_address(&host->req->sg),
  261. sock->addr + SOCK_DMA_ADDRESS);
  262. writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
  263. } else {
  264. writel(host->mode_mask | TIFM_MS_SYS_FIFO,
  265. sock->addr + SOCK_MS_SYSTEM);
  266. writel(TIFM_FIFO_MORE,
  267. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  268. }
  269. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  270. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  271. sock->addr + SOCK_CONTROL);
  272. host->req->error = 0;
  273. sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
  274. sys_param |= TIFM_MS_SYS_INTCLR;
  275. if (host->use_dma)
  276. sys_param |= TIFM_MS_SYS_DMA;
  277. else
  278. sys_param &= ~TIFM_MS_SYS_DMA;
  279. writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
  280. cmd = (host->req->tpc & 0xf) << 12;
  281. cmd |= data_len;
  282. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  283. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
  284. return 0;
  285. }
  286. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  287. {
  288. struct tifm_dev *sock = host->dev;
  289. struct memstick_host *msh = tifm_get_drvdata(sock);
  290. int rc;
  291. del_timer(&host->timer);
  292. host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff;
  293. host->req->int_reg = (host->req->int_reg & 1)
  294. | ((host->req->int_reg << 4) & 0xe0);
  295. writel(TIFM_FIFO_INT_SETALL,
  296. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  297. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  298. if (host->use_dma) {
  299. tifm_unmap_sg(sock, &host->req->sg, 1,
  300. host->req->data_dir == READ
  301. ? PCI_DMA_FROMDEVICE
  302. : PCI_DMA_TODEVICE);
  303. }
  304. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  305. sock->addr + SOCK_CONTROL);
  306. dev_dbg(&sock->dev, "TPC complete\n");
  307. do {
  308. rc = memstick_next_req(msh, &host->req);
  309. } while (!rc && tifm_ms_issue_cmd(host));
  310. }
  311. static int tifm_ms_check_status(struct tifm_ms *host)
  312. {
  313. if (!host->req->error) {
  314. if (!(host->cmd_flags & CMD_READY))
  315. return 1;
  316. if (!(host->cmd_flags & FIFO_READY))
  317. return 1;
  318. if (host->req->need_card_int
  319. && !(host->cmd_flags & CARD_INT))
  320. return 1;
  321. }
  322. return 0;
  323. }
  324. /* Called from interrupt handler */
  325. static void tifm_ms_data_event(struct tifm_dev *sock)
  326. {
  327. struct tifm_ms *host;
  328. unsigned int fifo_status = 0, host_status = 0;
  329. int rc = 1;
  330. spin_lock(&sock->lock);
  331. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  332. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  333. host_status = readl(sock->addr + SOCK_MS_STATUS);
  334. dev_dbg(&sock->dev,
  335. "data event: fifo_status %x, host_status %x, flags %x\n",
  336. fifo_status, host_status, host->cmd_flags);
  337. if (host->req) {
  338. if (host->use_dma && (fifo_status & 1)) {
  339. host->cmd_flags |= FIFO_READY;
  340. rc = tifm_ms_check_status(host);
  341. }
  342. if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
  343. if (!tifm_ms_transfer_data(host)) {
  344. host->cmd_flags |= FIFO_READY;
  345. rc = tifm_ms_check_status(host);
  346. }
  347. }
  348. }
  349. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  350. if (!rc)
  351. tifm_ms_complete_cmd(host);
  352. spin_unlock(&sock->lock);
  353. }
  354. /* Called from interrupt handler */
  355. static void tifm_ms_card_event(struct tifm_dev *sock)
  356. {
  357. struct tifm_ms *host;
  358. unsigned int host_status = 0;
  359. int rc = 1;
  360. spin_lock(&sock->lock);
  361. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  362. host_status = readl(sock->addr + SOCK_MS_STATUS);
  363. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  364. host_status, host->cmd_flags);
  365. if (host->req) {
  366. if (host_status & TIFM_MS_STAT_TOE)
  367. host->req->error = -ETIME;
  368. else if (host_status & TIFM_MS_STAT_CRC)
  369. host->req->error = -EILSEQ;
  370. if (host_status & TIFM_MS_STAT_RDY)
  371. host->cmd_flags |= CMD_READY;
  372. if (host_status & TIFM_MS_STAT_MSINT)
  373. host->cmd_flags |= CARD_INT;
  374. rc = tifm_ms_check_status(host);
  375. }
  376. writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
  377. sock->addr + SOCK_MS_SYSTEM);
  378. if (!rc)
  379. tifm_ms_complete_cmd(host);
  380. spin_unlock(&sock->lock);
  381. return;
  382. }
  383. static void tifm_ms_request(struct memstick_host *msh)
  384. {
  385. struct tifm_ms *host = memstick_priv(msh);
  386. struct tifm_dev *sock = host->dev;
  387. unsigned long flags;
  388. int rc;
  389. spin_lock_irqsave(&sock->lock, flags);
  390. if (host->req) {
  391. printk(KERN_ERR "%s : unfinished request detected\n",
  392. sock->dev.bus_id);
  393. spin_unlock_irqrestore(&sock->lock, flags);
  394. tifm_eject(host->dev);
  395. return;
  396. }
  397. if (host->eject) {
  398. do {
  399. rc = memstick_next_req(msh, &host->req);
  400. if (!rc)
  401. host->req->error = -ETIME;
  402. } while (!rc);
  403. spin_unlock_irqrestore(&sock->lock, flags);
  404. return;
  405. }
  406. do {
  407. rc = memstick_next_req(msh, &host->req);
  408. } while (!rc && tifm_ms_issue_cmd(host));
  409. spin_unlock_irqrestore(&sock->lock, flags);
  410. return;
  411. }
  412. static void tifm_ms_set_param(struct memstick_host *msh,
  413. enum memstick_param param,
  414. int value)
  415. {
  416. struct tifm_ms *host = memstick_priv(msh);
  417. struct tifm_dev *sock = host->dev;
  418. unsigned long flags;
  419. spin_lock_irqsave(&sock->lock, flags);
  420. switch (param) {
  421. case MEMSTICK_POWER:
  422. /* also affected by media detection mechanism */
  423. if (value == MEMSTICK_POWER_ON) {
  424. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  425. writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
  426. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  427. sock->addr + SOCK_MS_SYSTEM);
  428. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  429. } else if (value == MEMSTICK_POWER_OFF) {
  430. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  431. sock->addr + SOCK_MS_SYSTEM);
  432. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  433. }
  434. break;
  435. case MEMSTICK_INTERFACE:
  436. if (value == MEMSTICK_SERIAL) {
  437. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  438. writel((~TIFM_CTRL_FAST_CLK)
  439. & readl(sock->addr + SOCK_CONTROL),
  440. sock->addr + SOCK_CONTROL);
  441. } else if (value == MEMSTICK_PAR4) {
  442. host->mode_mask = 0;
  443. writel(TIFM_CTRL_FAST_CLK
  444. | readl(sock->addr + SOCK_CONTROL),
  445. sock->addr + SOCK_CONTROL);
  446. }
  447. break;
  448. };
  449. spin_unlock_irqrestore(&sock->lock, flags);
  450. }
  451. static void tifm_ms_abort(unsigned long data)
  452. {
  453. struct tifm_ms *host = (struct tifm_ms *)data;
  454. dev_dbg(&host->dev->dev, "status %x\n",
  455. readl(host->dev->addr + SOCK_MS_STATUS));
  456. printk(KERN_ERR
  457. "%s : card failed to respond for a long period of time "
  458. "(%x, %x)\n",
  459. host->dev->dev.bus_id, host->req ? host->req->tpc : 0,
  460. host->cmd_flags);
  461. tifm_eject(host->dev);
  462. }
  463. static int tifm_ms_probe(struct tifm_dev *sock)
  464. {
  465. struct memstick_host *msh;
  466. struct tifm_ms *host;
  467. int rc = -EIO;
  468. if (!(TIFM_SOCK_STATE_OCCUPIED
  469. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  470. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  471. sock->dev.bus_id);
  472. return rc;
  473. }
  474. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  475. if (!msh)
  476. return -ENOMEM;
  477. host = memstick_priv(msh);
  478. tifm_set_drvdata(sock, msh);
  479. host->dev = sock;
  480. host->timeout_jiffies = msecs_to_jiffies(1000);
  481. setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
  482. msh->request = tifm_ms_request;
  483. msh->set_param = tifm_ms_set_param;
  484. sock->card_event = tifm_ms_card_event;
  485. sock->data_event = tifm_ms_data_event;
  486. if (tifm_has_ms_pif(sock))
  487. msh->caps |= MEMSTICK_CAP_PAR4;
  488. rc = memstick_add_host(msh);
  489. if (!rc)
  490. return 0;
  491. memstick_free_host(msh);
  492. return rc;
  493. }
  494. static void tifm_ms_remove(struct tifm_dev *sock)
  495. {
  496. struct memstick_host *msh = tifm_get_drvdata(sock);
  497. struct tifm_ms *host = memstick_priv(msh);
  498. int rc = 0;
  499. unsigned long flags;
  500. spin_lock_irqsave(&sock->lock, flags);
  501. host->eject = 1;
  502. if (host->req) {
  503. del_timer(&host->timer);
  504. writel(TIFM_FIFO_INT_SETALL,
  505. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  506. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  507. if (host->use_dma)
  508. tifm_unmap_sg(sock, &host->req->sg, 1,
  509. host->req->data_dir == READ
  510. ? PCI_DMA_TODEVICE
  511. : PCI_DMA_FROMDEVICE);
  512. host->req->error = -ETIME;
  513. do {
  514. rc = memstick_next_req(msh, &host->req);
  515. if (!rc)
  516. host->req->error = -ETIME;
  517. } while (!rc);
  518. }
  519. spin_unlock_irqrestore(&sock->lock, flags);
  520. memstick_remove_host(msh);
  521. memstick_free_host(msh);
  522. }
  523. #ifdef CONFIG_PM
  524. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  525. {
  526. struct memstick_host *msh = tifm_get_drvdata(sock);
  527. memstick_suspend_host(msh);
  528. return 0;
  529. }
  530. static int tifm_ms_resume(struct tifm_dev *sock)
  531. {
  532. struct memstick_host *msh = tifm_get_drvdata(sock);
  533. memstick_resume_host(msh);
  534. return 0;
  535. }
  536. #else
  537. #define tifm_ms_suspend NULL
  538. #define tifm_ms_resume NULL
  539. #endif /* CONFIG_PM */
  540. static struct tifm_device_id tifm_ms_id_tbl[] = {
  541. { TIFM_TYPE_MS }, { 0 }
  542. };
  543. static struct tifm_driver tifm_ms_driver = {
  544. .driver = {
  545. .name = DRIVER_NAME,
  546. .owner = THIS_MODULE
  547. },
  548. .id_table = tifm_ms_id_tbl,
  549. .probe = tifm_ms_probe,
  550. .remove = tifm_ms_remove,
  551. .suspend = tifm_ms_suspend,
  552. .resume = tifm_ms_resume
  553. };
  554. static int __init tifm_ms_init(void)
  555. {
  556. return tifm_register_driver(&tifm_ms_driver);
  557. }
  558. static void __exit tifm_ms_exit(void)
  559. {
  560. tifm_unregister_driver(&tifm_ms_driver);
  561. }
  562. MODULE_AUTHOR("Alex Dubov");
  563. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  564. MODULE_LICENSE("GPL");
  565. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  566. module_init(tifm_ms_init);
  567. module_exit(tifm_ms_exit);