omap_hwmod.c 64 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. /* Module might have lost context, always update cache and register */
  194. oh->_sysc_cache = v;
  195. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. /**
  198. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  199. * @oh: struct omap_hwmod *
  200. * @standbymode: MIDLEMODE field bits
  201. * @v: pointer to register contents to modify
  202. *
  203. * Update the master standby mode bits in @v to be @standbymode for
  204. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  205. * upon error or 0 upon success.
  206. */
  207. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  208. u32 *v)
  209. {
  210. u32 mstandby_mask;
  211. u8 mstandby_shift;
  212. if (!oh->class->sysc ||
  213. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  214. return -EINVAL;
  215. if (!oh->class->sysc->sysc_fields) {
  216. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  217. return -EINVAL;
  218. }
  219. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  220. mstandby_mask = (0x3 << mstandby_shift);
  221. *v &= ~mstandby_mask;
  222. *v |= __ffs(standbymode) << mstandby_shift;
  223. return 0;
  224. }
  225. /**
  226. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  227. * @oh: struct omap_hwmod *
  228. * @idlemode: SIDLEMODE field bits
  229. * @v: pointer to register contents to modify
  230. *
  231. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  232. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  233. * or 0 upon success.
  234. */
  235. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  236. {
  237. u32 sidle_mask;
  238. u8 sidle_shift;
  239. if (!oh->class->sysc ||
  240. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  241. return -EINVAL;
  242. if (!oh->class->sysc->sysc_fields) {
  243. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  244. return -EINVAL;
  245. }
  246. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  247. sidle_mask = (0x3 << sidle_shift);
  248. *v &= ~sidle_mask;
  249. *v |= __ffs(idlemode) << sidle_shift;
  250. return 0;
  251. }
  252. /**
  253. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  254. * @oh: struct omap_hwmod *
  255. * @clockact: CLOCKACTIVITY field bits
  256. * @v: pointer to register contents to modify
  257. *
  258. * Update the clockactivity mode bits in @v to be @clockact for the
  259. * @oh hwmod. Used for additional powersaving on some modules. Does
  260. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  261. * success.
  262. */
  263. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  264. {
  265. u32 clkact_mask;
  266. u8 clkact_shift;
  267. if (!oh->class->sysc ||
  268. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  269. return -EINVAL;
  270. if (!oh->class->sysc->sysc_fields) {
  271. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  272. return -EINVAL;
  273. }
  274. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  275. clkact_mask = (0x3 << clkact_shift);
  276. *v &= ~clkact_mask;
  277. *v |= clockact << clkact_shift;
  278. return 0;
  279. }
  280. /**
  281. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  282. * @oh: struct omap_hwmod *
  283. * @v: pointer to register contents to modify
  284. *
  285. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  286. * error or 0 upon success.
  287. */
  288. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  289. {
  290. u32 softrst_mask;
  291. if (!oh->class->sysc ||
  292. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  293. return -EINVAL;
  294. if (!oh->class->sysc->sysc_fields) {
  295. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  296. return -EINVAL;
  297. }
  298. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  299. *v |= softrst_mask;
  300. return 0;
  301. }
  302. /**
  303. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  304. * @oh: struct omap_hwmod *
  305. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  306. * @v: pointer to register contents to modify
  307. *
  308. * Update the module autoidle bit in @v to be @autoidle for the @oh
  309. * hwmod. The autoidle bit controls whether the module can gate
  310. * internal clocks automatically when it isn't doing anything; the
  311. * exact function of this bit varies on a per-module basis. This
  312. * function does not write to the hardware. Returns -EINVAL upon
  313. * error or 0 upon success.
  314. */
  315. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  316. u32 *v)
  317. {
  318. u32 autoidle_mask;
  319. u8 autoidle_shift;
  320. if (!oh->class->sysc ||
  321. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  322. return -EINVAL;
  323. if (!oh->class->sysc->sysc_fields) {
  324. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  325. return -EINVAL;
  326. }
  327. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  328. autoidle_mask = (0x1 << autoidle_shift);
  329. *v &= ~autoidle_mask;
  330. *v |= autoidle << autoidle_shift;
  331. return 0;
  332. }
  333. /**
  334. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  335. * @oh: struct omap_hwmod *
  336. *
  337. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  338. * upon error or 0 upon success.
  339. */
  340. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  341. {
  342. if (!oh->class->sysc ||
  343. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  344. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  345. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  352. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  353. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  354. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  355. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  356. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  358. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  359. return 0;
  360. }
  361. /**
  362. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  363. * @oh: struct omap_hwmod *
  364. *
  365. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  366. * upon error or 0 upon success.
  367. */
  368. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  369. {
  370. if (!oh->class->sysc ||
  371. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  372. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  373. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  374. return -EINVAL;
  375. if (!oh->class->sysc->sysc_fields) {
  376. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  377. return -EINVAL;
  378. }
  379. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  380. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  381. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  382. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  383. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  384. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  385. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  386. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  387. return 0;
  388. }
  389. /**
  390. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  391. * @oh: struct omap_hwmod *
  392. *
  393. * Prevent the hardware module @oh from entering idle while the
  394. * hardare module initiator @init_oh is active. Useful when a module
  395. * will be accessed by a particular initiator (e.g., if a module will
  396. * be accessed by the IVA, there should be a sleepdep between the IVA
  397. * initiator and the module). Only applies to modules in smart-idle
  398. * mode. If the clockdomain is marked as not needing autodeps, return
  399. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  400. * passes along clkdm_add_sleepdep() value upon success.
  401. */
  402. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  403. {
  404. if (!oh->_clk)
  405. return -EINVAL;
  406. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  407. return 0;
  408. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  409. }
  410. /**
  411. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  412. * @oh: struct omap_hwmod *
  413. *
  414. * Allow the hardware module @oh to enter idle while the hardare
  415. * module initiator @init_oh is active. Useful when a module will not
  416. * be accessed by a particular initiator (e.g., if a module will not
  417. * be accessed by the IVA, there should be no sleepdep between the IVA
  418. * initiator and the module). Only applies to modules in smart-idle
  419. * mode. If the clockdomain is marked as not needing autodeps, return
  420. * 0 without doing anything. Returns -EINVAL upon error or passes
  421. * along clkdm_del_sleepdep() value upon success.
  422. */
  423. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  424. {
  425. if (!oh->_clk)
  426. return -EINVAL;
  427. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  428. return 0;
  429. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  430. }
  431. /**
  432. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  433. * @oh: struct omap_hwmod *
  434. *
  435. * Called from _init_clocks(). Populates the @oh _clk (main
  436. * functional clock pointer) if a main_clk is present. Returns 0 on
  437. * success or -EINVAL on error.
  438. */
  439. static int _init_main_clk(struct omap_hwmod *oh)
  440. {
  441. int ret = 0;
  442. if (!oh->main_clk)
  443. return 0;
  444. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  445. if (!oh->_clk) {
  446. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  447. oh->name, oh->main_clk);
  448. return -EINVAL;
  449. }
  450. if (!oh->_clk->clkdm)
  451. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  452. oh->main_clk, oh->_clk->name);
  453. return ret;
  454. }
  455. /**
  456. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  457. * @oh: struct omap_hwmod *
  458. *
  459. * Called from _init_clocks(). Populates the @oh OCP slave interface
  460. * clock pointers. Returns 0 on success or -EINVAL on error.
  461. */
  462. static int _init_interface_clks(struct omap_hwmod *oh)
  463. {
  464. struct clk *c;
  465. int i;
  466. int ret = 0;
  467. if (oh->slaves_cnt == 0)
  468. return 0;
  469. for (i = 0; i < oh->slaves_cnt; i++) {
  470. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  471. if (!os->clk)
  472. continue;
  473. c = omap_clk_get_by_name(os->clk);
  474. if (!c) {
  475. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  476. oh->name, os->clk);
  477. ret = -EINVAL;
  478. }
  479. os->_clk = c;
  480. }
  481. return ret;
  482. }
  483. /**
  484. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  485. * @oh: struct omap_hwmod *
  486. *
  487. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  488. * clock pointers. Returns 0 on success or -EINVAL on error.
  489. */
  490. static int _init_opt_clks(struct omap_hwmod *oh)
  491. {
  492. struct omap_hwmod_opt_clk *oc;
  493. struct clk *c;
  494. int i;
  495. int ret = 0;
  496. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  497. c = omap_clk_get_by_name(oc->clk);
  498. if (!c) {
  499. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  500. oh->name, oc->clk);
  501. ret = -EINVAL;
  502. }
  503. oc->_clk = c;
  504. }
  505. return ret;
  506. }
  507. /**
  508. * _enable_clocks - enable hwmod main clock and interface clocks
  509. * @oh: struct omap_hwmod *
  510. *
  511. * Enables all clocks necessary for register reads and writes to succeed
  512. * on the hwmod @oh. Returns 0.
  513. */
  514. static int _enable_clocks(struct omap_hwmod *oh)
  515. {
  516. int i;
  517. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  518. if (oh->_clk)
  519. clk_enable(oh->_clk);
  520. if (oh->slaves_cnt > 0) {
  521. for (i = 0; i < oh->slaves_cnt; i++) {
  522. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  523. struct clk *c = os->_clk;
  524. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  525. clk_enable(c);
  526. }
  527. }
  528. /* The opt clocks are controlled by the device driver. */
  529. return 0;
  530. }
  531. /**
  532. * _disable_clocks - disable hwmod main clock and interface clocks
  533. * @oh: struct omap_hwmod *
  534. *
  535. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  536. */
  537. static int _disable_clocks(struct omap_hwmod *oh)
  538. {
  539. int i;
  540. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  541. if (oh->_clk)
  542. clk_disable(oh->_clk);
  543. if (oh->slaves_cnt > 0) {
  544. for (i = 0; i < oh->slaves_cnt; i++) {
  545. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  546. struct clk *c = os->_clk;
  547. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  548. clk_disable(c);
  549. }
  550. }
  551. /* The opt clocks are controlled by the device driver. */
  552. return 0;
  553. }
  554. static void _enable_optional_clocks(struct omap_hwmod *oh)
  555. {
  556. struct omap_hwmod_opt_clk *oc;
  557. int i;
  558. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  559. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  560. if (oc->_clk) {
  561. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  562. oc->_clk->name);
  563. clk_enable(oc->_clk);
  564. }
  565. }
  566. static void _disable_optional_clocks(struct omap_hwmod *oh)
  567. {
  568. struct omap_hwmod_opt_clk *oc;
  569. int i;
  570. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  571. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  572. if (oc->_clk) {
  573. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  574. oc->_clk->name);
  575. clk_disable(oc->_clk);
  576. }
  577. }
  578. /**
  579. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  580. * @oh: struct omap_hwmod *
  581. *
  582. * Returns the array index of the OCP slave port that the MPU
  583. * addresses the device on, or -EINVAL upon error or not found.
  584. */
  585. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  586. {
  587. int i;
  588. int found = 0;
  589. if (!oh || oh->slaves_cnt == 0)
  590. return -EINVAL;
  591. for (i = 0; i < oh->slaves_cnt; i++) {
  592. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  593. if (os->user & OCP_USER_MPU) {
  594. found = 1;
  595. break;
  596. }
  597. }
  598. if (found)
  599. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  600. oh->name, i);
  601. else
  602. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  603. oh->name);
  604. return (found) ? i : -EINVAL;
  605. }
  606. /**
  607. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  608. * @oh: struct omap_hwmod *
  609. *
  610. * Return the virtual address of the base of the register target of
  611. * device @oh, or NULL on error.
  612. */
  613. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  614. {
  615. struct omap_hwmod_ocp_if *os;
  616. struct omap_hwmod_addr_space *mem;
  617. int i;
  618. int found = 0;
  619. void __iomem *va_start;
  620. if (!oh || oh->slaves_cnt == 0)
  621. return NULL;
  622. os = oh->slaves[index];
  623. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  624. if (mem->flags & ADDR_TYPE_RT) {
  625. found = 1;
  626. break;
  627. }
  628. }
  629. if (found) {
  630. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  631. if (!va_start) {
  632. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  633. return NULL;
  634. }
  635. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  636. oh->name, va_start);
  637. } else {
  638. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  639. oh->name);
  640. }
  641. return (found) ? va_start : NULL;
  642. }
  643. /**
  644. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  645. * @oh: struct omap_hwmod *
  646. *
  647. * If module is marked as SWSUP_SIDLE, force the module out of slave
  648. * idle; otherwise, configure it for smart-idle. If module is marked
  649. * as SWSUP_MSUSPEND, force the module out of master standby;
  650. * otherwise, configure it for smart-standby. No return value.
  651. */
  652. static void _enable_sysc(struct omap_hwmod *oh)
  653. {
  654. u8 idlemode, sf;
  655. u32 v;
  656. if (!oh->class->sysc)
  657. return;
  658. v = oh->_sysc_cache;
  659. sf = oh->class->sysc->sysc_flags;
  660. if (sf & SYSC_HAS_SIDLEMODE) {
  661. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  662. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  663. _set_slave_idlemode(oh, idlemode, &v);
  664. }
  665. if (sf & SYSC_HAS_MIDLEMODE) {
  666. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  667. idlemode = HWMOD_IDLEMODE_NO;
  668. } else {
  669. if (sf & SYSC_HAS_ENAWAKEUP)
  670. _enable_wakeup(oh, &v);
  671. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  672. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  673. else
  674. idlemode = HWMOD_IDLEMODE_SMART;
  675. }
  676. _set_master_standbymode(oh, idlemode, &v);
  677. }
  678. /*
  679. * XXX The clock framework should handle this, by
  680. * calling into this code. But this must wait until the
  681. * clock structures are tagged with omap_hwmod entries
  682. */
  683. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  684. (sf & SYSC_HAS_CLOCKACTIVITY))
  685. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  686. /* If slave is in SMARTIDLE, also enable wakeup */
  687. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  688. _enable_wakeup(oh, &v);
  689. _write_sysconfig(v, oh);
  690. /*
  691. * Set the autoidle bit only after setting the smartidle bit
  692. * Setting this will not have any impact on the other modules.
  693. */
  694. if (sf & SYSC_HAS_AUTOIDLE) {
  695. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  696. 0 : 1;
  697. _set_module_autoidle(oh, idlemode, &v);
  698. _write_sysconfig(v, oh);
  699. }
  700. }
  701. /**
  702. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  703. * @oh: struct omap_hwmod *
  704. *
  705. * If module is marked as SWSUP_SIDLE, force the module into slave
  706. * idle; otherwise, configure it for smart-idle. If module is marked
  707. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  708. * configure it for smart-standby. No return value.
  709. */
  710. static void _idle_sysc(struct omap_hwmod *oh)
  711. {
  712. u8 idlemode, sf;
  713. u32 v;
  714. if (!oh->class->sysc)
  715. return;
  716. v = oh->_sysc_cache;
  717. sf = oh->class->sysc->sysc_flags;
  718. if (sf & SYSC_HAS_SIDLEMODE) {
  719. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  720. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  721. _set_slave_idlemode(oh, idlemode, &v);
  722. }
  723. if (sf & SYSC_HAS_MIDLEMODE) {
  724. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  725. idlemode = HWMOD_IDLEMODE_FORCE;
  726. } else {
  727. if (sf & SYSC_HAS_ENAWAKEUP)
  728. _enable_wakeup(oh, &v);
  729. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  730. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  731. else
  732. idlemode = HWMOD_IDLEMODE_SMART;
  733. }
  734. _set_master_standbymode(oh, idlemode, &v);
  735. }
  736. /* If slave is in SMARTIDLE, also enable wakeup */
  737. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  738. _enable_wakeup(oh, &v);
  739. _write_sysconfig(v, oh);
  740. }
  741. /**
  742. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  743. * @oh: struct omap_hwmod *
  744. *
  745. * Force the module into slave idle and master suspend. No return
  746. * value.
  747. */
  748. static void _shutdown_sysc(struct omap_hwmod *oh)
  749. {
  750. u32 v;
  751. u8 sf;
  752. if (!oh->class->sysc)
  753. return;
  754. v = oh->_sysc_cache;
  755. sf = oh->class->sysc->sysc_flags;
  756. if (sf & SYSC_HAS_SIDLEMODE)
  757. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  758. if (sf & SYSC_HAS_MIDLEMODE)
  759. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  760. if (sf & SYSC_HAS_AUTOIDLE)
  761. _set_module_autoidle(oh, 1, &v);
  762. _write_sysconfig(v, oh);
  763. }
  764. /**
  765. * _lookup - find an omap_hwmod by name
  766. * @name: find an omap_hwmod by name
  767. *
  768. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  769. */
  770. static struct omap_hwmod *_lookup(const char *name)
  771. {
  772. struct omap_hwmod *oh, *temp_oh;
  773. oh = NULL;
  774. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  775. if (!strcmp(name, temp_oh->name)) {
  776. oh = temp_oh;
  777. break;
  778. }
  779. }
  780. return oh;
  781. }
  782. /**
  783. * _init_clocks - clk_get() all clocks associated with this hwmod
  784. * @oh: struct omap_hwmod *
  785. * @data: not used; pass NULL
  786. *
  787. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  788. * Resolves all clock names embedded in the hwmod. Returns 0 on
  789. * success, or a negative error code on failure.
  790. */
  791. static int _init_clocks(struct omap_hwmod *oh, void *data)
  792. {
  793. int ret = 0;
  794. if (oh->_state != _HWMOD_STATE_REGISTERED)
  795. return 0;
  796. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  797. ret |= _init_main_clk(oh);
  798. ret |= _init_interface_clks(oh);
  799. ret |= _init_opt_clks(oh);
  800. if (!ret)
  801. oh->_state = _HWMOD_STATE_CLKS_INITED;
  802. return ret;
  803. }
  804. /**
  805. * _wait_target_ready - wait for a module to leave slave idle
  806. * @oh: struct omap_hwmod *
  807. *
  808. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  809. * does not have an IDLEST bit or if the module successfully leaves
  810. * slave idle; otherwise, pass along the return value of the
  811. * appropriate *_cm_wait_module_ready() function.
  812. */
  813. static int _wait_target_ready(struct omap_hwmod *oh)
  814. {
  815. struct omap_hwmod_ocp_if *os;
  816. int ret;
  817. if (!oh)
  818. return -EINVAL;
  819. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  820. return 0;
  821. os = oh->slaves[oh->_mpu_port_index];
  822. if (oh->flags & HWMOD_NO_IDLEST)
  823. return 0;
  824. /* XXX check module SIDLEMODE */
  825. /* XXX check clock enable states */
  826. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  827. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  828. oh->prcm.omap2.idlest_reg_id,
  829. oh->prcm.omap2.idlest_idle_bit);
  830. } else if (cpu_is_omap44xx()) {
  831. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  832. } else {
  833. BUG();
  834. };
  835. return ret;
  836. }
  837. /**
  838. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  839. * @oh: struct omap_hwmod *
  840. * @name: name of the reset line in the context of this hwmod
  841. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  842. *
  843. * Return the bit position of the reset line that match the
  844. * input name. Return -ENOENT if not found.
  845. */
  846. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  847. struct omap_hwmod_rst_info *ohri)
  848. {
  849. int i;
  850. for (i = 0; i < oh->rst_lines_cnt; i++) {
  851. const char *rst_line = oh->rst_lines[i].name;
  852. if (!strcmp(rst_line, name)) {
  853. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  854. ohri->st_shift = oh->rst_lines[i].st_shift;
  855. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  856. oh->name, __func__, rst_line, ohri->rst_shift,
  857. ohri->st_shift);
  858. return 0;
  859. }
  860. }
  861. return -ENOENT;
  862. }
  863. /**
  864. * _assert_hardreset - assert the HW reset line of submodules
  865. * contained in the hwmod module.
  866. * @oh: struct omap_hwmod *
  867. * @name: name of the reset line to lookup and assert
  868. *
  869. * Some IP like dsp, ipu or iva contain processor that require
  870. * an HW reset line to be assert / deassert in order to enable fully
  871. * the IP.
  872. */
  873. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  874. {
  875. struct omap_hwmod_rst_info ohri;
  876. u8 ret;
  877. if (!oh)
  878. return -EINVAL;
  879. ret = _lookup_hardreset(oh, name, &ohri);
  880. if (IS_ERR_VALUE(ret))
  881. return ret;
  882. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  883. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  884. ohri.rst_shift);
  885. else if (cpu_is_omap44xx())
  886. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  887. ohri.rst_shift);
  888. else
  889. return -EINVAL;
  890. }
  891. /**
  892. * _deassert_hardreset - deassert the HW reset line of submodules contained
  893. * in the hwmod module.
  894. * @oh: struct omap_hwmod *
  895. * @name: name of the reset line to look up and deassert
  896. *
  897. * Some IP like dsp, ipu or iva contain processor that require
  898. * an HW reset line to be assert / deassert in order to enable fully
  899. * the IP.
  900. */
  901. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  902. {
  903. struct omap_hwmod_rst_info ohri;
  904. int ret;
  905. if (!oh)
  906. return -EINVAL;
  907. ret = _lookup_hardreset(oh, name, &ohri);
  908. if (IS_ERR_VALUE(ret))
  909. return ret;
  910. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  911. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  912. ohri.rst_shift,
  913. ohri.st_shift);
  914. } else if (cpu_is_omap44xx()) {
  915. if (ohri.st_shift)
  916. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  917. oh->name, name);
  918. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  919. ohri.rst_shift);
  920. } else {
  921. return -EINVAL;
  922. }
  923. if (ret == -EBUSY)
  924. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  925. return ret;
  926. }
  927. /**
  928. * _read_hardreset - read the HW reset line state of submodules
  929. * contained in the hwmod module
  930. * @oh: struct omap_hwmod *
  931. * @name: name of the reset line to look up and read
  932. *
  933. * Return the state of the reset line.
  934. */
  935. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  936. {
  937. struct omap_hwmod_rst_info ohri;
  938. u8 ret;
  939. if (!oh)
  940. return -EINVAL;
  941. ret = _lookup_hardreset(oh, name, &ohri);
  942. if (IS_ERR_VALUE(ret))
  943. return ret;
  944. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  945. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  946. ohri.st_shift);
  947. } else if (cpu_is_omap44xx()) {
  948. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  949. ohri.rst_shift);
  950. } else {
  951. return -EINVAL;
  952. }
  953. }
  954. /**
  955. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  956. * @oh: struct omap_hwmod *
  957. *
  958. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  959. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  960. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  961. * the module did not reset in time, or 0 upon success.
  962. *
  963. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  964. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  965. * use the SYSCONFIG softreset bit to provide the status.
  966. *
  967. * Note that some IP like McBSP do have reset control but don't have
  968. * reset status.
  969. */
  970. static int _ocp_softreset(struct omap_hwmod *oh)
  971. {
  972. u32 v;
  973. int c = 0;
  974. int ret = 0;
  975. if (!oh->class->sysc ||
  976. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  977. return -EINVAL;
  978. /* clocks must be on for this operation */
  979. if (oh->_state != _HWMOD_STATE_ENABLED) {
  980. pr_warning("omap_hwmod: %s: reset can only be entered from "
  981. "enabled state\n", oh->name);
  982. return -EINVAL;
  983. }
  984. /* For some modules, all optionnal clocks need to be enabled as well */
  985. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  986. _enable_optional_clocks(oh);
  987. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  988. v = oh->_sysc_cache;
  989. ret = _set_softreset(oh, &v);
  990. if (ret)
  991. goto dis_opt_clks;
  992. _write_sysconfig(v, oh);
  993. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  994. omap_test_timeout((omap_hwmod_read(oh,
  995. oh->class->sysc->syss_offs)
  996. & SYSS_RESETDONE_MASK),
  997. MAX_MODULE_SOFTRESET_WAIT, c);
  998. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  999. omap_test_timeout(!(omap_hwmod_read(oh,
  1000. oh->class->sysc->sysc_offs)
  1001. & SYSC_TYPE2_SOFTRESET_MASK),
  1002. MAX_MODULE_SOFTRESET_WAIT, c);
  1003. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1004. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1005. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1006. else
  1007. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1008. /*
  1009. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1010. * _wait_target_ready() or _reset()
  1011. */
  1012. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1013. dis_opt_clks:
  1014. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1015. _disable_optional_clocks(oh);
  1016. return ret;
  1017. }
  1018. /**
  1019. * _reset - reset an omap_hwmod
  1020. * @oh: struct omap_hwmod *
  1021. *
  1022. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1023. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1024. * bit. However, some hwmods cannot be reset via this method: some
  1025. * are not targets and therefore have no OCP header registers to
  1026. * access; others (like the IVA) have idiosyncratic reset sequences.
  1027. * So for these relatively rare cases, custom reset code can be
  1028. * supplied in the struct omap_hwmod_class .reset function pointer.
  1029. * Passes along the return value from either _reset() or the custom
  1030. * reset function - these must return -EINVAL if the hwmod cannot be
  1031. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1032. * the module did not reset in time, or 0 upon success.
  1033. */
  1034. static int _reset(struct omap_hwmod *oh)
  1035. {
  1036. int ret;
  1037. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1038. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1039. return ret;
  1040. }
  1041. /**
  1042. * _enable - enable an omap_hwmod
  1043. * @oh: struct omap_hwmod *
  1044. *
  1045. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1046. * register target. Returns -EINVAL if the hwmod is in the wrong
  1047. * state or passes along the return value of _wait_target_ready().
  1048. */
  1049. static int _enable(struct omap_hwmod *oh)
  1050. {
  1051. int r;
  1052. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1053. oh->_state != _HWMOD_STATE_IDLE &&
  1054. oh->_state != _HWMOD_STATE_DISABLED) {
  1055. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1056. "from initialized, idle, or disabled state\n", oh->name);
  1057. return -EINVAL;
  1058. }
  1059. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1060. /*
  1061. * If an IP contains only one HW reset line, then de-assert it in order
  1062. * to allow to enable the clocks. Otherwise the PRCM will return
  1063. * Intransition status, and the init will failed.
  1064. */
  1065. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1066. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1067. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1068. /* Mux pins for device runtime if populated */
  1069. if (oh->mux && (!oh->mux->enabled ||
  1070. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1071. oh->mux->pads_dynamic)))
  1072. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1073. _add_initiator_dep(oh, mpu_oh);
  1074. _enable_clocks(oh);
  1075. r = _wait_target_ready(oh);
  1076. if (!r) {
  1077. oh->_state = _HWMOD_STATE_ENABLED;
  1078. /* Access the sysconfig only if the target is ready */
  1079. if (oh->class->sysc) {
  1080. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1081. _update_sysc_cache(oh);
  1082. _enable_sysc(oh);
  1083. }
  1084. } else {
  1085. _disable_clocks(oh);
  1086. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1087. oh->name, r);
  1088. }
  1089. return r;
  1090. }
  1091. /**
  1092. * _idle - idle an omap_hwmod
  1093. * @oh: struct omap_hwmod *
  1094. *
  1095. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1096. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1097. * state or returns 0.
  1098. */
  1099. static int _idle(struct omap_hwmod *oh)
  1100. {
  1101. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1102. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1103. "enabled state\n", oh->name);
  1104. return -EINVAL;
  1105. }
  1106. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1107. if (oh->class->sysc)
  1108. _idle_sysc(oh);
  1109. _del_initiator_dep(oh, mpu_oh);
  1110. _disable_clocks(oh);
  1111. /* Mux pins for device idle if populated */
  1112. if (oh->mux && oh->mux->pads_dynamic)
  1113. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1114. oh->_state = _HWMOD_STATE_IDLE;
  1115. return 0;
  1116. }
  1117. /**
  1118. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1119. * @oh: struct omap_hwmod *
  1120. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1121. *
  1122. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1123. * local copy. Intended to be used by drivers that require
  1124. * direct manipulation of the AUTOIDLE bits.
  1125. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1126. * along the return value from _set_module_autoidle().
  1127. *
  1128. * Any users of this function should be scrutinized carefully.
  1129. */
  1130. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1131. {
  1132. u32 v;
  1133. int retval = 0;
  1134. unsigned long flags;
  1135. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1136. return -EINVAL;
  1137. spin_lock_irqsave(&oh->_lock, flags);
  1138. v = oh->_sysc_cache;
  1139. retval = _set_module_autoidle(oh, autoidle, &v);
  1140. if (!retval)
  1141. _write_sysconfig(v, oh);
  1142. spin_unlock_irqrestore(&oh->_lock, flags);
  1143. return retval;
  1144. }
  1145. /**
  1146. * _shutdown - shutdown an omap_hwmod
  1147. * @oh: struct omap_hwmod *
  1148. *
  1149. * Shut down an omap_hwmod @oh. This should be called when the driver
  1150. * used for the hwmod is removed or unloaded or if the driver is not
  1151. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1152. * state or returns 0.
  1153. */
  1154. static int _shutdown(struct omap_hwmod *oh)
  1155. {
  1156. int ret;
  1157. u8 prev_state;
  1158. if (oh->_state != _HWMOD_STATE_IDLE &&
  1159. oh->_state != _HWMOD_STATE_ENABLED) {
  1160. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1161. "from idle, or enabled state\n", oh->name);
  1162. return -EINVAL;
  1163. }
  1164. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1165. if (oh->class->pre_shutdown) {
  1166. prev_state = oh->_state;
  1167. if (oh->_state == _HWMOD_STATE_IDLE)
  1168. _enable(oh);
  1169. ret = oh->class->pre_shutdown(oh);
  1170. if (ret) {
  1171. if (prev_state == _HWMOD_STATE_IDLE)
  1172. _idle(oh);
  1173. return ret;
  1174. }
  1175. }
  1176. if (oh->class->sysc) {
  1177. if (oh->_state == _HWMOD_STATE_IDLE)
  1178. _enable(oh);
  1179. _shutdown_sysc(oh);
  1180. }
  1181. /*
  1182. * If an IP contains only one HW reset line, then assert it
  1183. * before disabling the clocks and shutting down the IP.
  1184. */
  1185. if (oh->rst_lines_cnt == 1)
  1186. _assert_hardreset(oh, oh->rst_lines[0].name);
  1187. /* clocks and deps are already disabled in idle */
  1188. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1189. _del_initiator_dep(oh, mpu_oh);
  1190. /* XXX what about the other system initiators here? dma, dsp */
  1191. _disable_clocks(oh);
  1192. }
  1193. /* XXX Should this code also force-disable the optional clocks? */
  1194. /* Mux pins to safe mode or use populated off mode values */
  1195. if (oh->mux)
  1196. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1197. oh->_state = _HWMOD_STATE_DISABLED;
  1198. return 0;
  1199. }
  1200. /**
  1201. * _setup - do initial configuration of omap_hwmod
  1202. * @oh: struct omap_hwmod *
  1203. *
  1204. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1205. * OCP_SYSCONFIG register. Returns 0.
  1206. */
  1207. static int _setup(struct omap_hwmod *oh, void *data)
  1208. {
  1209. int i, r;
  1210. u8 postsetup_state;
  1211. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1212. return 0;
  1213. /* Set iclk autoidle mode */
  1214. if (oh->slaves_cnt > 0) {
  1215. for (i = 0; i < oh->slaves_cnt; i++) {
  1216. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1217. struct clk *c = os->_clk;
  1218. if (!c)
  1219. continue;
  1220. if (os->flags & OCPIF_SWSUP_IDLE) {
  1221. /* XXX omap_iclk_deny_idle(c); */
  1222. } else {
  1223. /* XXX omap_iclk_allow_idle(c); */
  1224. clk_enable(c);
  1225. }
  1226. }
  1227. }
  1228. oh->_state = _HWMOD_STATE_INITIALIZED;
  1229. /*
  1230. * In the case of hwmod with hardreset that should not be
  1231. * de-assert at boot time, we have to keep the module
  1232. * initialized, because we cannot enable it properly with the
  1233. * reset asserted. Exit without warning because that behavior is
  1234. * expected.
  1235. */
  1236. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1237. return 0;
  1238. r = _enable(oh);
  1239. if (r) {
  1240. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1241. oh->name, oh->_state);
  1242. return 0;
  1243. }
  1244. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1245. _reset(oh);
  1246. /*
  1247. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1248. * The _enable() function should be split to
  1249. * avoid the rewrite of the OCP_SYSCONFIG register.
  1250. */
  1251. if (oh->class->sysc) {
  1252. _update_sysc_cache(oh);
  1253. _enable_sysc(oh);
  1254. }
  1255. }
  1256. postsetup_state = oh->_postsetup_state;
  1257. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1258. postsetup_state = _HWMOD_STATE_ENABLED;
  1259. /*
  1260. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1261. * it should be set by the core code as a runtime flag during startup
  1262. */
  1263. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1264. (postsetup_state == _HWMOD_STATE_IDLE))
  1265. postsetup_state = _HWMOD_STATE_ENABLED;
  1266. if (postsetup_state == _HWMOD_STATE_IDLE)
  1267. _idle(oh);
  1268. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1269. _shutdown(oh);
  1270. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1271. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1272. oh->name, postsetup_state);
  1273. return 0;
  1274. }
  1275. /**
  1276. * _register - register a struct omap_hwmod
  1277. * @oh: struct omap_hwmod *
  1278. *
  1279. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1280. * already has been registered by the same name; -EINVAL if the
  1281. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1282. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1283. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1284. * success.
  1285. *
  1286. * XXX The data should be copied into bootmem, so the original data
  1287. * should be marked __initdata and freed after init. This would allow
  1288. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1289. * that the copy process would be relatively complex due to the large number
  1290. * of substructures.
  1291. */
  1292. static int __init _register(struct omap_hwmod *oh)
  1293. {
  1294. int ms_id;
  1295. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1296. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1297. return -EINVAL;
  1298. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1299. if (_lookup(oh->name))
  1300. return -EEXIST;
  1301. ms_id = _find_mpu_port_index(oh);
  1302. if (!IS_ERR_VALUE(ms_id))
  1303. oh->_mpu_port_index = ms_id;
  1304. else
  1305. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1306. list_add_tail(&oh->node, &omap_hwmod_list);
  1307. spin_lock_init(&oh->_lock);
  1308. oh->_state = _HWMOD_STATE_REGISTERED;
  1309. /*
  1310. * XXX Rather than doing a strcmp(), this should test a flag
  1311. * set in the hwmod data, inserted by the autogenerator code.
  1312. */
  1313. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1314. mpu_oh = oh;
  1315. return 0;
  1316. }
  1317. /* Public functions */
  1318. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1319. {
  1320. if (oh->flags & HWMOD_16BIT_REG)
  1321. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1322. else
  1323. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1324. }
  1325. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1326. {
  1327. if (oh->flags & HWMOD_16BIT_REG)
  1328. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1329. else
  1330. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1331. }
  1332. /**
  1333. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1334. * @oh: struct omap_hwmod *
  1335. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1336. *
  1337. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1338. * local copy. Intended to be used by drivers that have some erratum
  1339. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1340. * -EINVAL if @oh is null, or passes along the return value from
  1341. * _set_slave_idlemode().
  1342. *
  1343. * XXX Does this function have any current users? If not, we should
  1344. * remove it; it is better to let the rest of the hwmod code handle this.
  1345. * Any users of this function should be scrutinized carefully.
  1346. */
  1347. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1348. {
  1349. u32 v;
  1350. int retval = 0;
  1351. if (!oh)
  1352. return -EINVAL;
  1353. v = oh->_sysc_cache;
  1354. retval = _set_slave_idlemode(oh, idlemode, &v);
  1355. if (!retval)
  1356. _write_sysconfig(v, oh);
  1357. return retval;
  1358. }
  1359. /**
  1360. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1361. * @name: name of the omap_hwmod to look up
  1362. *
  1363. * Given a @name of an omap_hwmod, return a pointer to the registered
  1364. * struct omap_hwmod *, or NULL upon error.
  1365. */
  1366. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1367. {
  1368. struct omap_hwmod *oh;
  1369. if (!name)
  1370. return NULL;
  1371. oh = _lookup(name);
  1372. return oh;
  1373. }
  1374. /**
  1375. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1376. * @fn: pointer to a callback function
  1377. * @data: void * data to pass to callback function
  1378. *
  1379. * Call @fn for each registered omap_hwmod, passing @data to each
  1380. * function. @fn must return 0 for success or any other value for
  1381. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1382. * will stop and the non-zero return value will be passed to the
  1383. * caller of omap_hwmod_for_each(). @fn is called with
  1384. * omap_hwmod_for_each() held.
  1385. */
  1386. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1387. void *data)
  1388. {
  1389. struct omap_hwmod *temp_oh;
  1390. int ret = 0;
  1391. if (!fn)
  1392. return -EINVAL;
  1393. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1394. ret = (*fn)(temp_oh, data);
  1395. if (ret)
  1396. break;
  1397. }
  1398. return ret;
  1399. }
  1400. /**
  1401. * omap_hwmod_register - register an array of hwmods
  1402. * @ohs: pointer to an array of omap_hwmods to register
  1403. *
  1404. * Intended to be called early in boot before the clock framework is
  1405. * initialized. If @ohs is not null, will register all omap_hwmods
  1406. * listed in @ohs that are valid for this chip. Returns 0.
  1407. */
  1408. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1409. {
  1410. int r, i;
  1411. if (!ohs)
  1412. return 0;
  1413. i = 0;
  1414. do {
  1415. if (!omap_chip_is(ohs[i]->omap_chip))
  1416. continue;
  1417. r = _register(ohs[i]);
  1418. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1419. r);
  1420. } while (ohs[++i]);
  1421. return 0;
  1422. }
  1423. /*
  1424. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1425. *
  1426. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1427. * Assumes the caller takes care of locking if needed.
  1428. */
  1429. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1430. {
  1431. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1432. return 0;
  1433. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1434. return 0;
  1435. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1436. return 0;
  1437. }
  1438. /**
  1439. * omap_hwmod_setup_one - set up a single hwmod
  1440. * @oh_name: const char * name of the already-registered hwmod to set up
  1441. *
  1442. * Must be called after omap2_clk_init(). Resolves the struct clk
  1443. * names to struct clk pointers for each registered omap_hwmod. Also
  1444. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1445. * success.
  1446. */
  1447. int __init omap_hwmod_setup_one(const char *oh_name)
  1448. {
  1449. struct omap_hwmod *oh;
  1450. int r;
  1451. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1452. if (!mpu_oh) {
  1453. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1454. oh_name, MPU_INITIATOR_NAME);
  1455. return -EINVAL;
  1456. }
  1457. oh = _lookup(oh_name);
  1458. if (!oh) {
  1459. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1460. return -EINVAL;
  1461. }
  1462. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1463. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1464. r = _populate_mpu_rt_base(oh, NULL);
  1465. if (IS_ERR_VALUE(r)) {
  1466. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1467. return -EINVAL;
  1468. }
  1469. r = _init_clocks(oh, NULL);
  1470. if (IS_ERR_VALUE(r)) {
  1471. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1472. return -EINVAL;
  1473. }
  1474. _setup(oh, NULL);
  1475. return 0;
  1476. }
  1477. /**
  1478. * omap_hwmod_setup - do some post-clock framework initialization
  1479. *
  1480. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1481. * to struct clk pointers for each registered omap_hwmod. Also calls
  1482. * _setup() on each hwmod. Returns 0 upon success.
  1483. */
  1484. static int __init omap_hwmod_setup_all(void)
  1485. {
  1486. int r;
  1487. if (!mpu_oh) {
  1488. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1489. __func__, MPU_INITIATOR_NAME);
  1490. return -EINVAL;
  1491. }
  1492. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1493. r = omap_hwmod_for_each(_init_clocks, NULL);
  1494. WARN(IS_ERR_VALUE(r),
  1495. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1496. omap_hwmod_for_each(_setup, NULL);
  1497. return 0;
  1498. }
  1499. core_initcall(omap_hwmod_setup_all);
  1500. /**
  1501. * omap_hwmod_enable - enable an omap_hwmod
  1502. * @oh: struct omap_hwmod *
  1503. *
  1504. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1505. * Returns -EINVAL on error or passes along the return value from _enable().
  1506. */
  1507. int omap_hwmod_enable(struct omap_hwmod *oh)
  1508. {
  1509. int r;
  1510. unsigned long flags;
  1511. if (!oh)
  1512. return -EINVAL;
  1513. spin_lock_irqsave(&oh->_lock, flags);
  1514. r = _enable(oh);
  1515. spin_unlock_irqrestore(&oh->_lock, flags);
  1516. return r;
  1517. }
  1518. /**
  1519. * omap_hwmod_idle - idle an omap_hwmod
  1520. * @oh: struct omap_hwmod *
  1521. *
  1522. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1523. * Returns -EINVAL on error or passes along the return value from _idle().
  1524. */
  1525. int omap_hwmod_idle(struct omap_hwmod *oh)
  1526. {
  1527. unsigned long flags;
  1528. if (!oh)
  1529. return -EINVAL;
  1530. spin_lock_irqsave(&oh->_lock, flags);
  1531. _idle(oh);
  1532. spin_unlock_irqrestore(&oh->_lock, flags);
  1533. return 0;
  1534. }
  1535. /**
  1536. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1537. * @oh: struct omap_hwmod *
  1538. *
  1539. * Shutdown an omap_hwmod @oh. Intended to be called by
  1540. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1541. * the return value from _shutdown().
  1542. */
  1543. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1544. {
  1545. unsigned long flags;
  1546. if (!oh)
  1547. return -EINVAL;
  1548. spin_lock_irqsave(&oh->_lock, flags);
  1549. _shutdown(oh);
  1550. spin_unlock_irqrestore(&oh->_lock, flags);
  1551. return 0;
  1552. }
  1553. /**
  1554. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1555. * @oh: struct omap_hwmod *oh
  1556. *
  1557. * Intended to be called by the omap_device code.
  1558. */
  1559. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1560. {
  1561. unsigned long flags;
  1562. spin_lock_irqsave(&oh->_lock, flags);
  1563. _enable_clocks(oh);
  1564. spin_unlock_irqrestore(&oh->_lock, flags);
  1565. return 0;
  1566. }
  1567. /**
  1568. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1569. * @oh: struct omap_hwmod *oh
  1570. *
  1571. * Intended to be called by the omap_device code.
  1572. */
  1573. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1574. {
  1575. unsigned long flags;
  1576. spin_lock_irqsave(&oh->_lock, flags);
  1577. _disable_clocks(oh);
  1578. spin_unlock_irqrestore(&oh->_lock, flags);
  1579. return 0;
  1580. }
  1581. /**
  1582. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1583. * @oh: struct omap_hwmod *oh
  1584. *
  1585. * Intended to be called by drivers and core code when all posted
  1586. * writes to a device must complete before continuing further
  1587. * execution (for example, after clearing some device IRQSTATUS
  1588. * register bits)
  1589. *
  1590. * XXX what about targets with multiple OCP threads?
  1591. */
  1592. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1593. {
  1594. BUG_ON(!oh);
  1595. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1596. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1597. "device configuration\n", oh->name);
  1598. return;
  1599. }
  1600. /*
  1601. * Forces posted writes to complete on the OCP thread handling
  1602. * register writes
  1603. */
  1604. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1605. }
  1606. /**
  1607. * omap_hwmod_reset - reset the hwmod
  1608. * @oh: struct omap_hwmod *
  1609. *
  1610. * Under some conditions, a driver may wish to reset the entire device.
  1611. * Called from omap_device code. Returns -EINVAL on error or passes along
  1612. * the return value from _reset().
  1613. */
  1614. int omap_hwmod_reset(struct omap_hwmod *oh)
  1615. {
  1616. int r;
  1617. unsigned long flags;
  1618. if (!oh)
  1619. return -EINVAL;
  1620. spin_lock_irqsave(&oh->_lock, flags);
  1621. r = _reset(oh);
  1622. spin_unlock_irqrestore(&oh->_lock, flags);
  1623. return r;
  1624. }
  1625. /**
  1626. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1627. * @oh: struct omap_hwmod *
  1628. * @res: pointer to the first element of an array of struct resource to fill
  1629. *
  1630. * Count the number of struct resource array elements necessary to
  1631. * contain omap_hwmod @oh resources. Intended to be called by code
  1632. * that registers omap_devices. Intended to be used to determine the
  1633. * size of a dynamically-allocated struct resource array, before
  1634. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1635. * resource array elements needed.
  1636. *
  1637. * XXX This code is not optimized. It could attempt to merge adjacent
  1638. * resource IDs.
  1639. *
  1640. */
  1641. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1642. {
  1643. int ret, i;
  1644. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1645. for (i = 0; i < oh->slaves_cnt; i++)
  1646. ret += oh->slaves[i]->addr_cnt;
  1647. return ret;
  1648. }
  1649. /**
  1650. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1651. * @oh: struct omap_hwmod *
  1652. * @res: pointer to the first element of an array of struct resource to fill
  1653. *
  1654. * Fill the struct resource array @res with resource data from the
  1655. * omap_hwmod @oh. Intended to be called by code that registers
  1656. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1657. * number of array elements filled.
  1658. */
  1659. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1660. {
  1661. int i, j;
  1662. int r = 0;
  1663. /* For each IRQ, DMA, memory area, fill in array.*/
  1664. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1665. (res + r)->name = (oh->mpu_irqs + i)->name;
  1666. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1667. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1668. (res + r)->flags = IORESOURCE_IRQ;
  1669. r++;
  1670. }
  1671. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1672. (res + r)->name = (oh->sdma_reqs + i)->name;
  1673. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1674. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1675. (res + r)->flags = IORESOURCE_DMA;
  1676. r++;
  1677. }
  1678. for (i = 0; i < oh->slaves_cnt; i++) {
  1679. struct omap_hwmod_ocp_if *os;
  1680. os = oh->slaves[i];
  1681. for (j = 0; j < os->addr_cnt; j++) {
  1682. (res + r)->name = (os->addr + j)->name;
  1683. (res + r)->start = (os->addr + j)->pa_start;
  1684. (res + r)->end = (os->addr + j)->pa_end;
  1685. (res + r)->flags = IORESOURCE_MEM;
  1686. r++;
  1687. }
  1688. }
  1689. return r;
  1690. }
  1691. /**
  1692. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1693. * @oh: struct omap_hwmod *
  1694. *
  1695. * Return the powerdomain pointer associated with the OMAP module
  1696. * @oh's main clock. If @oh does not have a main clk, return the
  1697. * powerdomain associated with the interface clock associated with the
  1698. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1699. * instead?) Returns NULL on error, or a struct powerdomain * on
  1700. * success.
  1701. */
  1702. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1703. {
  1704. struct clk *c;
  1705. if (!oh)
  1706. return NULL;
  1707. if (oh->_clk) {
  1708. c = oh->_clk;
  1709. } else {
  1710. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1711. return NULL;
  1712. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1713. }
  1714. if (!c->clkdm)
  1715. return NULL;
  1716. return c->clkdm->pwrdm.ptr;
  1717. }
  1718. /**
  1719. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1720. * @oh: struct omap_hwmod *
  1721. *
  1722. * Returns the virtual address corresponding to the beginning of the
  1723. * module's register target, in the address range that is intended to
  1724. * be used by the MPU. Returns the virtual address upon success or NULL
  1725. * upon error.
  1726. */
  1727. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1728. {
  1729. if (!oh)
  1730. return NULL;
  1731. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1732. return NULL;
  1733. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1734. return NULL;
  1735. return oh->_mpu_rt_va;
  1736. }
  1737. /**
  1738. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1739. * @oh: struct omap_hwmod *
  1740. * @init_oh: struct omap_hwmod * (initiator)
  1741. *
  1742. * Add a sleep dependency between the initiator @init_oh and @oh.
  1743. * Intended to be called by DSP/Bridge code via platform_data for the
  1744. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1745. * code needs to add/del initiator dependencies dynamically
  1746. * before/after accessing a device. Returns the return value from
  1747. * _add_initiator_dep().
  1748. *
  1749. * XXX Keep a usecount in the clockdomain code
  1750. */
  1751. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1752. struct omap_hwmod *init_oh)
  1753. {
  1754. return _add_initiator_dep(oh, init_oh);
  1755. }
  1756. /*
  1757. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1758. * for context save/restore operations?
  1759. */
  1760. /**
  1761. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1762. * @oh: struct omap_hwmod *
  1763. * @init_oh: struct omap_hwmod * (initiator)
  1764. *
  1765. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1766. * Intended to be called by DSP/Bridge code via platform_data for the
  1767. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1768. * code needs to add/del initiator dependencies dynamically
  1769. * before/after accessing a device. Returns the return value from
  1770. * _del_initiator_dep().
  1771. *
  1772. * XXX Keep a usecount in the clockdomain code
  1773. */
  1774. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1775. struct omap_hwmod *init_oh)
  1776. {
  1777. return _del_initiator_dep(oh, init_oh);
  1778. }
  1779. /**
  1780. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1781. * @oh: struct omap_hwmod *
  1782. *
  1783. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1784. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1785. * registers to cause the PRCM to receive wakeup events from the
  1786. * module. Does not set any wakeup routing registers beyond this
  1787. * point - if the module is to wake up any other module or subsystem,
  1788. * that must be set separately. Called by omap_device code. Returns
  1789. * -EINVAL on error or 0 upon success.
  1790. */
  1791. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1792. {
  1793. unsigned long flags;
  1794. u32 v;
  1795. if (!oh->class->sysc ||
  1796. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1797. return -EINVAL;
  1798. spin_lock_irqsave(&oh->_lock, flags);
  1799. v = oh->_sysc_cache;
  1800. _enable_wakeup(oh, &v);
  1801. _write_sysconfig(v, oh);
  1802. spin_unlock_irqrestore(&oh->_lock, flags);
  1803. return 0;
  1804. }
  1805. /**
  1806. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1807. * @oh: struct omap_hwmod *
  1808. *
  1809. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1810. * from sending wakeups to the PRCM. Eventually this should clear
  1811. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1812. * from the module. Does not set any wakeup routing registers beyond
  1813. * this point - if the module is to wake up any other module or
  1814. * subsystem, that must be set separately. Called by omap_device
  1815. * code. Returns -EINVAL on error or 0 upon success.
  1816. */
  1817. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1818. {
  1819. unsigned long flags;
  1820. u32 v;
  1821. if (!oh->class->sysc ||
  1822. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1823. return -EINVAL;
  1824. spin_lock_irqsave(&oh->_lock, flags);
  1825. v = oh->_sysc_cache;
  1826. _disable_wakeup(oh, &v);
  1827. _write_sysconfig(v, oh);
  1828. spin_unlock_irqrestore(&oh->_lock, flags);
  1829. return 0;
  1830. }
  1831. /**
  1832. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1833. * contained in the hwmod module.
  1834. * @oh: struct omap_hwmod *
  1835. * @name: name of the reset line to lookup and assert
  1836. *
  1837. * Some IP like dsp, ipu or iva contain processor that require
  1838. * an HW reset line to be assert / deassert in order to enable fully
  1839. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1840. * yet supported on this OMAP; otherwise, passes along the return value
  1841. * from _assert_hardreset().
  1842. */
  1843. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1844. {
  1845. int ret;
  1846. unsigned long flags;
  1847. if (!oh)
  1848. return -EINVAL;
  1849. spin_lock_irqsave(&oh->_lock, flags);
  1850. ret = _assert_hardreset(oh, name);
  1851. spin_unlock_irqrestore(&oh->_lock, flags);
  1852. return ret;
  1853. }
  1854. /**
  1855. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1856. * contained in the hwmod module.
  1857. * @oh: struct omap_hwmod *
  1858. * @name: name of the reset line to look up and deassert
  1859. *
  1860. * Some IP like dsp, ipu or iva contain processor that require
  1861. * an HW reset line to be assert / deassert in order to enable fully
  1862. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1863. * yet supported on this OMAP; otherwise, passes along the return value
  1864. * from _deassert_hardreset().
  1865. */
  1866. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1867. {
  1868. int ret;
  1869. unsigned long flags;
  1870. if (!oh)
  1871. return -EINVAL;
  1872. spin_lock_irqsave(&oh->_lock, flags);
  1873. ret = _deassert_hardreset(oh, name);
  1874. spin_unlock_irqrestore(&oh->_lock, flags);
  1875. return ret;
  1876. }
  1877. /**
  1878. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1879. * contained in the hwmod module
  1880. * @oh: struct omap_hwmod *
  1881. * @name: name of the reset line to look up and read
  1882. *
  1883. * Return the current state of the hwmod @oh's reset line named @name:
  1884. * returns -EINVAL upon parameter error or if this operation
  1885. * is unsupported on the current OMAP; otherwise, passes along the return
  1886. * value from _read_hardreset().
  1887. */
  1888. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1889. {
  1890. int ret;
  1891. unsigned long flags;
  1892. if (!oh)
  1893. return -EINVAL;
  1894. spin_lock_irqsave(&oh->_lock, flags);
  1895. ret = _read_hardreset(oh, name);
  1896. spin_unlock_irqrestore(&oh->_lock, flags);
  1897. return ret;
  1898. }
  1899. /**
  1900. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1901. * @classname: struct omap_hwmod_class name to search for
  1902. * @fn: callback function pointer to call for each hwmod in class @classname
  1903. * @user: arbitrary context data to pass to the callback function
  1904. *
  1905. * For each omap_hwmod of class @classname, call @fn.
  1906. * If the callback function returns something other than
  1907. * zero, the iterator is terminated, and the callback function's return
  1908. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1909. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1910. */
  1911. int omap_hwmod_for_each_by_class(const char *classname,
  1912. int (*fn)(struct omap_hwmod *oh,
  1913. void *user),
  1914. void *user)
  1915. {
  1916. struct omap_hwmod *temp_oh;
  1917. int ret = 0;
  1918. if (!classname || !fn)
  1919. return -EINVAL;
  1920. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1921. __func__, classname);
  1922. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1923. if (!strcmp(temp_oh->class->name, classname)) {
  1924. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1925. __func__, temp_oh->name);
  1926. ret = (*fn)(temp_oh, user);
  1927. if (ret)
  1928. break;
  1929. }
  1930. }
  1931. if (ret)
  1932. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1933. __func__, ret);
  1934. return ret;
  1935. }
  1936. /**
  1937. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1938. * @oh: struct omap_hwmod *
  1939. * @state: state that _setup() should leave the hwmod in
  1940. *
  1941. * Sets the hwmod state that @oh will enter at the end of _setup()
  1942. * (called by omap_hwmod_setup_*()). Only valid to call between
  1943. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1944. * 0 upon success or -EINVAL if there is a problem with the arguments
  1945. * or if the hwmod is in the wrong state.
  1946. */
  1947. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1948. {
  1949. int ret;
  1950. unsigned long flags;
  1951. if (!oh)
  1952. return -EINVAL;
  1953. if (state != _HWMOD_STATE_DISABLED &&
  1954. state != _HWMOD_STATE_ENABLED &&
  1955. state != _HWMOD_STATE_IDLE)
  1956. return -EINVAL;
  1957. spin_lock_irqsave(&oh->_lock, flags);
  1958. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1959. ret = -EINVAL;
  1960. goto ohsps_unlock;
  1961. }
  1962. oh->_postsetup_state = state;
  1963. ret = 0;
  1964. ohsps_unlock:
  1965. spin_unlock_irqrestore(&oh->_lock, flags);
  1966. return ret;
  1967. }
  1968. /**
  1969. * omap_hwmod_get_context_loss_count - get lost context count
  1970. * @oh: struct omap_hwmod *
  1971. *
  1972. * Query the powerdomain of of @oh to get the context loss
  1973. * count for this device.
  1974. *
  1975. * Returns the context loss count of the powerdomain assocated with @oh
  1976. * upon success, or zero if no powerdomain exists for @oh.
  1977. */
  1978. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1979. {
  1980. struct powerdomain *pwrdm;
  1981. int ret = 0;
  1982. pwrdm = omap_hwmod_get_pwrdm(oh);
  1983. if (pwrdm)
  1984. ret = pwrdm_get_context_loss_count(pwrdm);
  1985. return ret;
  1986. }
  1987. /**
  1988. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  1989. * @oh: struct omap_hwmod *
  1990. *
  1991. * Prevent the hwmod @oh from being reset during the setup process.
  1992. * Intended for use by board-*.c files on boards with devices that
  1993. * cannot tolerate being reset. Must be called before the hwmod has
  1994. * been set up. Returns 0 upon success or negative error code upon
  1995. * failure.
  1996. */
  1997. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  1998. {
  1999. if (!oh)
  2000. return -EINVAL;
  2001. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2002. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2003. oh->name);
  2004. return -EINVAL;
  2005. }
  2006. oh->flags |= HWMOD_INIT_NO_RESET;
  2007. return 0;
  2008. }