es1938.c 51 KB

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  1. /*
  2. * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
  3. * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
  4. * Jaroslav Kysela <perex@suse.cz>,
  5. * Thomas Sailer <sailer@ife.ee.ethz.ch>,
  6. * Abramo Bagnara <abramo@alsa-project.org>,
  7. * Markus Gruber <gruber@eikon.tum.de>
  8. *
  9. * Rewritten from sonicvibes.c source.
  10. *
  11. * TODO:
  12. * Rewrite better spinlocks
  13. *
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. /*
  31. NOTES:
  32. - Capture data is written unaligned starting from dma_base + 1 so I need to
  33. disable mmap and to add a copy callback.
  34. - After several cycle of the following:
  35. while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
  36. a "playback write error (DMA or IRQ trouble?)" may happen.
  37. This is due to playback interrupts not generated.
  38. I suspect a timing issue.
  39. - Sometimes the interrupt handler is invoked wrongly during playback.
  40. This generates some harmless "Unexpected hw_pointer: wrong interrupt
  41. acknowledge".
  42. I've seen that using small period sizes.
  43. Reproducible with:
  44. mpg123 test.mp3 &
  45. hdparm -t -T /dev/hda
  46. */
  47. #include <sound/driver.h>
  48. #include <linux/init.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/pci.h>
  51. #include <linux/slab.h>
  52. #include <linux/gameport.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/delay.h>
  55. #include <sound/core.h>
  56. #include <sound/control.h>
  57. #include <sound/pcm.h>
  58. #include <sound/opl3.h>
  59. #include <sound/mpu401.h>
  60. #include <sound/initval.h>
  61. #include <asm/io.h>
  62. MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
  63. MODULE_DESCRIPTION("ESS Solo-1");
  64. MODULE_LICENSE("GPL");
  65. MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
  66. "{ESS,ES1946},"
  67. "{ESS,ES1969},"
  68. "{TerraTec,128i PCI}}");
  69. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  70. #define SUPPORT_JOYSTICK 1
  71. #endif
  72. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  73. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  74. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
  81. #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
  82. #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
  83. #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
  84. #define SL_PCI_LEGACYCONTROL 0x40
  85. #define SL_PCI_CONFIG 0x50
  86. #define SL_PCI_DDMACONTROL 0x60
  87. #define ESSIO_REG_AUDIO2DMAADDR 0
  88. #define ESSIO_REG_AUDIO2DMACOUNT 4
  89. #define ESSIO_REG_AUDIO2MODE 6
  90. #define ESSIO_REG_IRQCONTROL 7
  91. #define ESSDM_REG_DMAADDR 0x00
  92. #define ESSDM_REG_DMACOUNT 0x04
  93. #define ESSDM_REG_DMACOMMAND 0x08
  94. #define ESSDM_REG_DMASTATUS 0x08
  95. #define ESSDM_REG_DMAMODE 0x0b
  96. #define ESSDM_REG_DMACLEAR 0x0d
  97. #define ESSDM_REG_DMAMASK 0x0f
  98. #define ESSSB_REG_FMLOWADDR 0x00
  99. #define ESSSB_REG_FMHIGHADDR 0x02
  100. #define ESSSB_REG_MIXERADDR 0x04
  101. #define ESSSB_REG_MIXERDATA 0x05
  102. #define ESSSB_IREG_AUDIO1 0x14
  103. #define ESSSB_IREG_MICMIX 0x1a
  104. #define ESSSB_IREG_RECSRC 0x1c
  105. #define ESSSB_IREG_MASTER 0x32
  106. #define ESSSB_IREG_FM 0x36
  107. #define ESSSB_IREG_AUXACD 0x38
  108. #define ESSSB_IREG_AUXB 0x3a
  109. #define ESSSB_IREG_PCSPEAKER 0x3c
  110. #define ESSSB_IREG_LINE 0x3e
  111. #define ESSSB_IREG_SPATCONTROL 0x50
  112. #define ESSSB_IREG_SPATLEVEL 0x52
  113. #define ESSSB_IREG_MASTER_LEFT 0x60
  114. #define ESSSB_IREG_MASTER_RIGHT 0x62
  115. #define ESSSB_IREG_MPU401CONTROL 0x64
  116. #define ESSSB_IREG_MICMIXRECORD 0x68
  117. #define ESSSB_IREG_AUDIO2RECORD 0x69
  118. #define ESSSB_IREG_AUXACDRECORD 0x6a
  119. #define ESSSB_IREG_FMRECORD 0x6b
  120. #define ESSSB_IREG_AUXBRECORD 0x6c
  121. #define ESSSB_IREG_MONO 0x6d
  122. #define ESSSB_IREG_LINERECORD 0x6e
  123. #define ESSSB_IREG_MONORECORD 0x6f
  124. #define ESSSB_IREG_AUDIO2SAMPLE 0x70
  125. #define ESSSB_IREG_AUDIO2MODE 0x71
  126. #define ESSSB_IREG_AUDIO2FILTER 0x72
  127. #define ESSSB_IREG_AUDIO2TCOUNTL 0x74
  128. #define ESSSB_IREG_AUDIO2TCOUNTH 0x76
  129. #define ESSSB_IREG_AUDIO2CONTROL1 0x78
  130. #define ESSSB_IREG_AUDIO2CONTROL2 0x7a
  131. #define ESSSB_IREG_AUDIO2 0x7c
  132. #define ESSSB_REG_RESET 0x06
  133. #define ESSSB_REG_READDATA 0x0a
  134. #define ESSSB_REG_WRITEDATA 0x0c
  135. #define ESSSB_REG_READSTATUS 0x0c
  136. #define ESSSB_REG_STATUS 0x0e
  137. #define ESS_CMD_EXTSAMPLERATE 0xa1
  138. #define ESS_CMD_FILTERDIV 0xa2
  139. #define ESS_CMD_DMACNTRELOADL 0xa4
  140. #define ESS_CMD_DMACNTRELOADH 0xa5
  141. #define ESS_CMD_ANALOGCONTROL 0xa8
  142. #define ESS_CMD_IRQCONTROL 0xb1
  143. #define ESS_CMD_DRQCONTROL 0xb2
  144. #define ESS_CMD_RECLEVEL 0xb4
  145. #define ESS_CMD_SETFORMAT 0xb6
  146. #define ESS_CMD_SETFORMAT2 0xb7
  147. #define ESS_CMD_DMACONTROL 0xb8
  148. #define ESS_CMD_DMATYPE 0xb9
  149. #define ESS_CMD_OFFSETLEFT 0xba
  150. #define ESS_CMD_OFFSETRIGHT 0xbb
  151. #define ESS_CMD_READREG 0xc0
  152. #define ESS_CMD_ENABLEEXT 0xc6
  153. #define ESS_CMD_PAUSEDMA 0xd0
  154. #define ESS_CMD_ENABLEAUDIO1 0xd1
  155. #define ESS_CMD_STOPAUDIO1 0xd3
  156. #define ESS_CMD_AUDIO1STATUS 0xd8
  157. #define ESS_CMD_CONTDMA 0xd4
  158. #define ESS_CMD_TESTIRQ 0xf2
  159. #define ESS_RECSRC_MIC 0
  160. #define ESS_RECSRC_AUXACD 2
  161. #define ESS_RECSRC_AUXB 5
  162. #define ESS_RECSRC_LINE 6
  163. #define ESS_RECSRC_NONE 7
  164. #define DAC1 0x01
  165. #define ADC1 0x02
  166. #define DAC2 0x04
  167. /*
  168. */
  169. typedef struct _snd_es1938 es1938_t;
  170. #define SAVED_REG_SIZE 32 /* max. number of registers to save */
  171. struct _snd_es1938 {
  172. int irq;
  173. unsigned long io_port;
  174. unsigned long sb_port;
  175. unsigned long vc_port;
  176. unsigned long mpu_port;
  177. unsigned long game_port;
  178. unsigned long ddma_port;
  179. unsigned char irqmask;
  180. unsigned char revision;
  181. snd_kcontrol_t *hw_volume;
  182. snd_kcontrol_t *hw_switch;
  183. snd_kcontrol_t *master_volume;
  184. snd_kcontrol_t *master_switch;
  185. struct pci_dev *pci;
  186. snd_card_t *card;
  187. snd_pcm_t *pcm;
  188. snd_pcm_substream_t *capture_substream;
  189. snd_pcm_substream_t *playback1_substream;
  190. snd_pcm_substream_t *playback2_substream;
  191. snd_kmixer_t *mixer;
  192. snd_rawmidi_t *rmidi;
  193. unsigned int dma1_size;
  194. unsigned int dma2_size;
  195. unsigned int dma1_start;
  196. unsigned int dma2_start;
  197. unsigned int dma1_shift;
  198. unsigned int dma2_shift;
  199. unsigned int active;
  200. spinlock_t reg_lock;
  201. spinlock_t mixer_lock;
  202. snd_info_entry_t *proc_entry;
  203. #ifdef SUPPORT_JOYSTICK
  204. struct gameport *gameport;
  205. #endif
  206. #ifdef CONFIG_PM
  207. unsigned char saved_regs[SAVED_REG_SIZE];
  208. #endif
  209. };
  210. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  211. static struct pci_device_id snd_es1938_ids[] = {
  212. { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
  216. #define RESET_LOOP_TIMEOUT 0x10000
  217. #define WRITE_LOOP_TIMEOUT 0x10000
  218. #define GET_LOOP_TIMEOUT 0x01000
  219. #undef REG_DEBUG
  220. /* -----------------------------------------------------------------
  221. * Write to a mixer register
  222. * -----------------------------------------------------------------*/
  223. static void snd_es1938_mixer_write(es1938_t *chip, unsigned char reg, unsigned char val)
  224. {
  225. unsigned long flags;
  226. spin_lock_irqsave(&chip->mixer_lock, flags);
  227. outb(reg, SLSB_REG(chip, MIXERADDR));
  228. outb(val, SLSB_REG(chip, MIXERDATA));
  229. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  230. #ifdef REG_DEBUG
  231. snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
  232. #endif
  233. }
  234. /* -----------------------------------------------------------------
  235. * Read from a mixer register
  236. * -----------------------------------------------------------------*/
  237. static int snd_es1938_mixer_read(es1938_t *chip, unsigned char reg)
  238. {
  239. int data;
  240. unsigned long flags;
  241. spin_lock_irqsave(&chip->mixer_lock, flags);
  242. outb(reg, SLSB_REG(chip, MIXERADDR));
  243. data = inb(SLSB_REG(chip, MIXERDATA));
  244. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  245. #ifdef REG_DEBUG
  246. snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
  247. #endif
  248. return data;
  249. }
  250. /* -----------------------------------------------------------------
  251. * Write to some bits of a mixer register (return old value)
  252. * -----------------------------------------------------------------*/
  253. static int snd_es1938_mixer_bits(es1938_t *chip, unsigned char reg, unsigned char mask, unsigned char val)
  254. {
  255. unsigned long flags;
  256. unsigned char old, new, oval;
  257. spin_lock_irqsave(&chip->mixer_lock, flags);
  258. outb(reg, SLSB_REG(chip, MIXERADDR));
  259. old = inb(SLSB_REG(chip, MIXERDATA));
  260. oval = old & mask;
  261. if (val != oval) {
  262. new = (old & ~mask) | (val & mask);
  263. outb(new, SLSB_REG(chip, MIXERDATA));
  264. #ifdef REG_DEBUG
  265. snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
  266. reg, old, new);
  267. #endif
  268. }
  269. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  270. return oval;
  271. }
  272. /* -----------------------------------------------------------------
  273. * Write command to Controller Registers
  274. * -----------------------------------------------------------------*/
  275. static void snd_es1938_write_cmd(es1938_t *chip, unsigned char cmd)
  276. {
  277. int i;
  278. unsigned char v;
  279. for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
  280. if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
  281. outb(cmd, SLSB_REG(chip, WRITEDATA));
  282. return;
  283. }
  284. }
  285. printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
  286. }
  287. /* -----------------------------------------------------------------
  288. * Read the Read Data Buffer
  289. * -----------------------------------------------------------------*/
  290. static int snd_es1938_get_byte(es1938_t *chip)
  291. {
  292. int i;
  293. unsigned char v;
  294. for (i = GET_LOOP_TIMEOUT; i; i--)
  295. if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
  296. return inb(SLSB_REG(chip, READDATA));
  297. snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
  298. return -ENODEV;
  299. }
  300. /* -----------------------------------------------------------------
  301. * Write value cmd register
  302. * -----------------------------------------------------------------*/
  303. static void snd_es1938_write(es1938_t *chip, unsigned char reg, unsigned char val)
  304. {
  305. unsigned long flags;
  306. spin_lock_irqsave(&chip->reg_lock, flags);
  307. snd_es1938_write_cmd(chip, reg);
  308. snd_es1938_write_cmd(chip, val);
  309. spin_unlock_irqrestore(&chip->reg_lock, flags);
  310. #ifdef REG_DEBUG
  311. snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
  312. #endif
  313. }
  314. /* -----------------------------------------------------------------
  315. * Read data from cmd register and return it
  316. * -----------------------------------------------------------------*/
  317. static unsigned char snd_es1938_read(es1938_t *chip, unsigned char reg)
  318. {
  319. unsigned char val;
  320. unsigned long flags;
  321. spin_lock_irqsave(&chip->reg_lock, flags);
  322. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  323. snd_es1938_write_cmd(chip, reg);
  324. val = snd_es1938_get_byte(chip);
  325. spin_unlock_irqrestore(&chip->reg_lock, flags);
  326. #ifdef REG_DEBUG
  327. snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
  328. #endif
  329. return val;
  330. }
  331. /* -----------------------------------------------------------------
  332. * Write data to cmd register and return old value
  333. * -----------------------------------------------------------------*/
  334. static int snd_es1938_bits(es1938_t *chip, unsigned char reg, unsigned char mask, unsigned char val)
  335. {
  336. unsigned long flags;
  337. unsigned char old, new, oval;
  338. spin_lock_irqsave(&chip->reg_lock, flags);
  339. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  340. snd_es1938_write_cmd(chip, reg);
  341. old = snd_es1938_get_byte(chip);
  342. oval = old & mask;
  343. if (val != oval) {
  344. snd_es1938_write_cmd(chip, reg);
  345. new = (old & ~mask) | (val & mask);
  346. snd_es1938_write_cmd(chip, new);
  347. #ifdef REG_DEBUG
  348. snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
  349. reg, old, new);
  350. #endif
  351. }
  352. spin_unlock_irqrestore(&chip->reg_lock, flags);
  353. return oval;
  354. }
  355. /* --------------------------------------------------------------------
  356. * Reset the chip
  357. * --------------------------------------------------------------------*/
  358. static void snd_es1938_reset(es1938_t *chip)
  359. {
  360. int i;
  361. outb(3, SLSB_REG(chip, RESET));
  362. inb(SLSB_REG(chip, RESET));
  363. outb(0, SLSB_REG(chip, RESET));
  364. for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
  365. if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
  366. if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
  367. goto __next;
  368. }
  369. }
  370. snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
  371. __next:
  372. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
  373. /* Demand transfer DMA: 4 bytes per DMA request */
  374. snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
  375. /* Change behaviour of register A1
  376. 4x oversampling
  377. 2nd channel DAC asynchronous */
  378. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
  379. /* enable/select DMA channel and IRQ channel */
  380. snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
  381. snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
  382. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
  383. /* Set spatializer parameters to recommended values */
  384. snd_es1938_mixer_write(chip, 0x54, 0x8f);
  385. snd_es1938_mixer_write(chip, 0x56, 0x95);
  386. snd_es1938_mixer_write(chip, 0x58, 0x94);
  387. snd_es1938_mixer_write(chip, 0x5a, 0x80);
  388. }
  389. /* --------------------------------------------------------------------
  390. * Reset the FIFOs
  391. * --------------------------------------------------------------------*/
  392. static void snd_es1938_reset_fifo(es1938_t *chip)
  393. {
  394. outb(2, SLSB_REG(chip, RESET));
  395. outb(0, SLSB_REG(chip, RESET));
  396. }
  397. static ratnum_t clocks[2] = {
  398. {
  399. .num = 793800,
  400. .den_min = 1,
  401. .den_max = 128,
  402. .den_step = 1,
  403. },
  404. {
  405. .num = 768000,
  406. .den_min = 1,
  407. .den_max = 128,
  408. .den_step = 1,
  409. }
  410. };
  411. static snd_pcm_hw_constraint_ratnums_t hw_constraints_clocks = {
  412. .nrats = 2,
  413. .rats = clocks,
  414. };
  415. static void snd_es1938_rate_set(es1938_t *chip,
  416. snd_pcm_substream_t *substream,
  417. int mode)
  418. {
  419. unsigned int bits, div0;
  420. snd_pcm_runtime_t *runtime = substream->runtime;
  421. if (runtime->rate_num == clocks[0].num)
  422. bits = 128 - runtime->rate_den;
  423. else
  424. bits = 256 - runtime->rate_den;
  425. /* set filter register */
  426. div0 = 256 - 7160000*20/(8*82*runtime->rate);
  427. if (mode == DAC2) {
  428. snd_es1938_mixer_write(chip, 0x70, bits);
  429. snd_es1938_mixer_write(chip, 0x72, div0);
  430. } else {
  431. snd_es1938_write(chip, 0xA1, bits);
  432. snd_es1938_write(chip, 0xA2, div0);
  433. }
  434. }
  435. /* --------------------------------------------------------------------
  436. * Configure Solo1 builtin DMA Controller
  437. * --------------------------------------------------------------------*/
  438. static void snd_es1938_playback1_setdma(es1938_t *chip)
  439. {
  440. outb(0x00, SLIO_REG(chip, AUDIO2MODE));
  441. outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
  442. outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
  443. outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
  444. }
  445. static void snd_es1938_playback2_setdma(es1938_t *chip)
  446. {
  447. /* Enable DMA controller */
  448. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  449. /* 1. Master reset */
  450. outb(0, SLDM_REG(chip, DMACLEAR));
  451. /* 2. Mask DMA */
  452. outb(1, SLDM_REG(chip, DMAMASK));
  453. outb(0x18, SLDM_REG(chip, DMAMODE));
  454. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  455. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  456. /* 3. Unmask DMA */
  457. outb(0, SLDM_REG(chip, DMAMASK));
  458. }
  459. static void snd_es1938_capture_setdma(es1938_t *chip)
  460. {
  461. /* Enable DMA controller */
  462. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  463. /* 1. Master reset */
  464. outb(0, SLDM_REG(chip, DMACLEAR));
  465. /* 2. Mask DMA */
  466. outb(1, SLDM_REG(chip, DMAMASK));
  467. outb(0x14, SLDM_REG(chip, DMAMODE));
  468. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  469. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  470. /* 3. Unmask DMA */
  471. outb(0, SLDM_REG(chip, DMAMASK));
  472. }
  473. /* ----------------------------------------------------------------------
  474. *
  475. * *** PCM part ***
  476. */
  477. static int snd_es1938_capture_trigger(snd_pcm_substream_t * substream,
  478. int cmd)
  479. {
  480. es1938_t *chip = snd_pcm_substream_chip(substream);
  481. int val;
  482. switch (cmd) {
  483. case SNDRV_PCM_TRIGGER_START:
  484. case SNDRV_PCM_TRIGGER_RESUME:
  485. val = 0x0f;
  486. chip->active |= ADC1;
  487. break;
  488. case SNDRV_PCM_TRIGGER_STOP:
  489. case SNDRV_PCM_TRIGGER_SUSPEND:
  490. val = 0x00;
  491. chip->active &= ~ADC1;
  492. break;
  493. default:
  494. return -EINVAL;
  495. }
  496. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  497. return 0;
  498. }
  499. static int snd_es1938_playback1_trigger(snd_pcm_substream_t * substream,
  500. int cmd)
  501. {
  502. es1938_t *chip = snd_pcm_substream_chip(substream);
  503. switch (cmd) {
  504. case SNDRV_PCM_TRIGGER_START:
  505. case SNDRV_PCM_TRIGGER_RESUME:
  506. /* According to the documentation this should be:
  507. 0x13 but that value may randomly swap stereo channels */
  508. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
  509. udelay(10);
  510. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
  511. /* This two stage init gives the FIFO -> DAC connection time to
  512. * settle before first data from DMA flows in. This should ensure
  513. * no swapping of stereo channels. Report a bug if otherwise :-) */
  514. outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
  515. chip->active |= DAC2;
  516. break;
  517. case SNDRV_PCM_TRIGGER_STOP:
  518. case SNDRV_PCM_TRIGGER_SUSPEND:
  519. outb(0, SLIO_REG(chip, AUDIO2MODE));
  520. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
  521. chip->active &= ~DAC2;
  522. break;
  523. default:
  524. return -EINVAL;
  525. }
  526. return 0;
  527. }
  528. static int snd_es1938_playback2_trigger(snd_pcm_substream_t * substream,
  529. int cmd)
  530. {
  531. es1938_t *chip = snd_pcm_substream_chip(substream);
  532. int val;
  533. switch (cmd) {
  534. case SNDRV_PCM_TRIGGER_START:
  535. case SNDRV_PCM_TRIGGER_RESUME:
  536. val = 5;
  537. chip->active |= DAC1;
  538. break;
  539. case SNDRV_PCM_TRIGGER_STOP:
  540. case SNDRV_PCM_TRIGGER_SUSPEND:
  541. val = 0;
  542. chip->active &= ~DAC1;
  543. break;
  544. default:
  545. return -EINVAL;
  546. }
  547. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  548. return 0;
  549. }
  550. static int snd_es1938_playback_trigger(snd_pcm_substream_t *substream,
  551. int cmd)
  552. {
  553. switch (substream->number) {
  554. case 0:
  555. return snd_es1938_playback1_trigger(substream, cmd);
  556. case 1:
  557. return snd_es1938_playback2_trigger(substream, cmd);
  558. }
  559. snd_BUG();
  560. return -EINVAL;
  561. }
  562. /* --------------------------------------------------------------------
  563. * First channel for Extended Mode Audio 1 ADC Operation
  564. * --------------------------------------------------------------------*/
  565. static int snd_es1938_capture_prepare(snd_pcm_substream_t * substream)
  566. {
  567. es1938_t *chip = snd_pcm_substream_chip(substream);
  568. snd_pcm_runtime_t *runtime = substream->runtime;
  569. int u, is8, mono;
  570. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  571. unsigned int count = snd_pcm_lib_period_bytes(substream);
  572. chip->dma1_size = size;
  573. chip->dma1_start = runtime->dma_addr;
  574. mono = (runtime->channels > 1) ? 0 : 1;
  575. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  576. u = snd_pcm_format_unsigned(runtime->format);
  577. chip->dma1_shift = 2 - mono - is8;
  578. snd_es1938_reset_fifo(chip);
  579. /* program type */
  580. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  581. /* set clock and counters */
  582. snd_es1938_rate_set(chip, substream, ADC1);
  583. count = 0x10000 - count;
  584. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  585. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  586. /* initialize and configure ADC */
  587. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
  588. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
  589. (u ? 0x00 : 0x20) |
  590. (is8 ? 0x00 : 0x04) |
  591. (mono ? 0x40 : 0x08));
  592. // snd_es1938_reset_fifo(chip);
  593. /* 11. configure system interrupt controller and DMA controller */
  594. snd_es1938_capture_setdma(chip);
  595. return 0;
  596. }
  597. /* ------------------------------------------------------------------------------
  598. * Second Audio channel DAC Operation
  599. * ------------------------------------------------------------------------------*/
  600. static int snd_es1938_playback1_prepare(snd_pcm_substream_t * substream)
  601. {
  602. es1938_t *chip = snd_pcm_substream_chip(substream);
  603. snd_pcm_runtime_t *runtime = substream->runtime;
  604. int u, is8, mono;
  605. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  606. unsigned int count = snd_pcm_lib_period_bytes(substream);
  607. chip->dma2_size = size;
  608. chip->dma2_start = runtime->dma_addr;
  609. mono = (runtime->channels > 1) ? 0 : 1;
  610. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  611. u = snd_pcm_format_unsigned(runtime->format);
  612. chip->dma2_shift = 2 - mono - is8;
  613. snd_es1938_reset_fifo(chip);
  614. /* set clock and counters */
  615. snd_es1938_rate_set(chip, substream, DAC2);
  616. count >>= 1;
  617. count = 0x10000 - count;
  618. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
  619. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
  620. /* initialize and configure Audio 2 DAC */
  621. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | (mono ? 0 : 2) | (is8 ? 0 : 1));
  622. /* program DMA */
  623. snd_es1938_playback1_setdma(chip);
  624. return 0;
  625. }
  626. static int snd_es1938_playback2_prepare(snd_pcm_substream_t * substream)
  627. {
  628. es1938_t *chip = snd_pcm_substream_chip(substream);
  629. snd_pcm_runtime_t *runtime = substream->runtime;
  630. int u, is8, mono;
  631. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  632. unsigned int count = snd_pcm_lib_period_bytes(substream);
  633. chip->dma1_size = size;
  634. chip->dma1_start = runtime->dma_addr;
  635. mono = (runtime->channels > 1) ? 0 : 1;
  636. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  637. u = snd_pcm_format_unsigned(runtime->format);
  638. chip->dma1_shift = 2 - mono - is8;
  639. count = 0x10000 - count;
  640. /* reset */
  641. snd_es1938_reset_fifo(chip);
  642. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  643. /* set clock and counters */
  644. snd_es1938_rate_set(chip, substream, DAC1);
  645. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  646. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  647. /* initialized and configure DAC */
  648. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
  649. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
  650. snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
  651. 0x90 | (mono ? 0x40 : 0x08) |
  652. (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
  653. /* program DMA */
  654. snd_es1938_playback2_setdma(chip);
  655. return 0;
  656. }
  657. static int snd_es1938_playback_prepare(snd_pcm_substream_t *substream)
  658. {
  659. switch (substream->number) {
  660. case 0:
  661. return snd_es1938_playback1_prepare(substream);
  662. case 1:
  663. return snd_es1938_playback2_prepare(substream);
  664. }
  665. snd_BUG();
  666. return -EINVAL;
  667. }
  668. static snd_pcm_uframes_t snd_es1938_capture_pointer(snd_pcm_substream_t * substream)
  669. {
  670. es1938_t *chip = snd_pcm_substream_chip(substream);
  671. size_t ptr;
  672. size_t old, new;
  673. #if 1
  674. /* This stuff is *needed*, don't ask why - AB */
  675. old = inw(SLDM_REG(chip, DMACOUNT));
  676. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  677. old = new;
  678. ptr = chip->dma1_size - 1 - new;
  679. #else
  680. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  681. #endif
  682. return ptr >> chip->dma1_shift;
  683. }
  684. static snd_pcm_uframes_t snd_es1938_playback1_pointer(snd_pcm_substream_t * substream)
  685. {
  686. es1938_t *chip = snd_pcm_substream_chip(substream);
  687. size_t ptr;
  688. #if 1
  689. ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
  690. #else
  691. ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
  692. #endif
  693. return ptr >> chip->dma2_shift;
  694. }
  695. static snd_pcm_uframes_t snd_es1938_playback2_pointer(snd_pcm_substream_t * substream)
  696. {
  697. es1938_t *chip = snd_pcm_substream_chip(substream);
  698. size_t ptr;
  699. size_t old, new;
  700. #if 1
  701. /* This stuff is *needed*, don't ask why - AB */
  702. old = inw(SLDM_REG(chip, DMACOUNT));
  703. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  704. old = new;
  705. ptr = chip->dma1_size - 1 - new;
  706. #else
  707. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  708. #endif
  709. return ptr >> chip->dma1_shift;
  710. }
  711. static snd_pcm_uframes_t snd_es1938_playback_pointer(snd_pcm_substream_t *substream)
  712. {
  713. switch (substream->number) {
  714. case 0:
  715. return snd_es1938_playback1_pointer(substream);
  716. case 1:
  717. return snd_es1938_playback2_pointer(substream);
  718. }
  719. snd_BUG();
  720. return -EINVAL;
  721. }
  722. static int snd_es1938_capture_copy(snd_pcm_substream_t *substream,
  723. int channel,
  724. snd_pcm_uframes_t pos,
  725. void __user *dst,
  726. snd_pcm_uframes_t count)
  727. {
  728. snd_pcm_runtime_t *runtime = substream->runtime;
  729. es1938_t *chip = snd_pcm_substream_chip(substream);
  730. pos <<= chip->dma1_shift;
  731. count <<= chip->dma1_shift;
  732. snd_assert(pos + count <= chip->dma1_size, return -EINVAL);
  733. if (pos + count < chip->dma1_size) {
  734. if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
  735. return -EFAULT;
  736. } else {
  737. if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
  738. return -EFAULT;
  739. if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
  740. return -EFAULT;
  741. }
  742. return 0;
  743. }
  744. /*
  745. * buffer management
  746. */
  747. static int snd_es1938_pcm_hw_params(snd_pcm_substream_t *substream,
  748. snd_pcm_hw_params_t * hw_params)
  749. {
  750. int err;
  751. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  752. return err;
  753. return 0;
  754. }
  755. static int snd_es1938_pcm_hw_free(snd_pcm_substream_t *substream)
  756. {
  757. return snd_pcm_lib_free_pages(substream);
  758. }
  759. /* ----------------------------------------------------------------------
  760. * Audio1 Capture (ADC)
  761. * ----------------------------------------------------------------------*/
  762. static snd_pcm_hardware_t snd_es1938_capture =
  763. {
  764. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  765. SNDRV_PCM_INFO_BLOCK_TRANSFER),
  766. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE,
  767. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  768. .rate_min = 6000,
  769. .rate_max = 48000,
  770. .channels_min = 1,
  771. .channels_max = 2,
  772. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  773. .period_bytes_min = 64,
  774. .period_bytes_max = 0x8000,
  775. .periods_min = 1,
  776. .periods_max = 1024,
  777. .fifo_size = 256,
  778. };
  779. /* -----------------------------------------------------------------------
  780. * Audio2 Playback (DAC)
  781. * -----------------------------------------------------------------------*/
  782. static snd_pcm_hardware_t snd_es1938_playback =
  783. {
  784. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  785. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  786. SNDRV_PCM_INFO_MMAP_VALID),
  787. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE,
  788. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  789. .rate_min = 6000,
  790. .rate_max = 48000,
  791. .channels_min = 1,
  792. .channels_max = 2,
  793. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  794. .period_bytes_min = 64,
  795. .period_bytes_max = 0x8000,
  796. .periods_min = 1,
  797. .periods_max = 1024,
  798. .fifo_size = 256,
  799. };
  800. static int snd_es1938_capture_open(snd_pcm_substream_t * substream)
  801. {
  802. es1938_t *chip = snd_pcm_substream_chip(substream);
  803. snd_pcm_runtime_t *runtime = substream->runtime;
  804. if (chip->playback2_substream)
  805. return -EAGAIN;
  806. chip->capture_substream = substream;
  807. runtime->hw = snd_es1938_capture;
  808. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  809. &hw_constraints_clocks);
  810. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  811. return 0;
  812. }
  813. static int snd_es1938_playback_open(snd_pcm_substream_t * substream)
  814. {
  815. es1938_t *chip = snd_pcm_substream_chip(substream);
  816. snd_pcm_runtime_t *runtime = substream->runtime;
  817. switch (substream->number) {
  818. case 0:
  819. chip->playback1_substream = substream;
  820. break;
  821. case 1:
  822. if (chip->capture_substream)
  823. return -EAGAIN;
  824. chip->playback2_substream = substream;
  825. break;
  826. default:
  827. snd_BUG();
  828. return -EINVAL;
  829. }
  830. runtime->hw = snd_es1938_playback;
  831. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  832. &hw_constraints_clocks);
  833. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  834. return 0;
  835. }
  836. static int snd_es1938_capture_close(snd_pcm_substream_t * substream)
  837. {
  838. es1938_t *chip = snd_pcm_substream_chip(substream);
  839. chip->capture_substream = NULL;
  840. return 0;
  841. }
  842. static int snd_es1938_playback_close(snd_pcm_substream_t * substream)
  843. {
  844. es1938_t *chip = snd_pcm_substream_chip(substream);
  845. switch (substream->number) {
  846. case 0:
  847. chip->playback1_substream = NULL;
  848. break;
  849. case 1:
  850. chip->playback2_substream = NULL;
  851. break;
  852. default:
  853. snd_BUG();
  854. return -EINVAL;
  855. }
  856. return 0;
  857. }
  858. static snd_pcm_ops_t snd_es1938_playback_ops = {
  859. .open = snd_es1938_playback_open,
  860. .close = snd_es1938_playback_close,
  861. .ioctl = snd_pcm_lib_ioctl,
  862. .hw_params = snd_es1938_pcm_hw_params,
  863. .hw_free = snd_es1938_pcm_hw_free,
  864. .prepare = snd_es1938_playback_prepare,
  865. .trigger = snd_es1938_playback_trigger,
  866. .pointer = snd_es1938_playback_pointer,
  867. };
  868. static snd_pcm_ops_t snd_es1938_capture_ops = {
  869. .open = snd_es1938_capture_open,
  870. .close = snd_es1938_capture_close,
  871. .ioctl = snd_pcm_lib_ioctl,
  872. .hw_params = snd_es1938_pcm_hw_params,
  873. .hw_free = snd_es1938_pcm_hw_free,
  874. .prepare = snd_es1938_capture_prepare,
  875. .trigger = snd_es1938_capture_trigger,
  876. .pointer = snd_es1938_capture_pointer,
  877. .copy = snd_es1938_capture_copy,
  878. };
  879. static void snd_es1938_free_pcm(snd_pcm_t *pcm)
  880. {
  881. snd_pcm_lib_preallocate_free_for_all(pcm);
  882. }
  883. static int __devinit snd_es1938_new_pcm(es1938_t *chip, int device)
  884. {
  885. snd_pcm_t *pcm;
  886. int err;
  887. if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
  888. return err;
  889. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
  890. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
  891. pcm->private_data = chip;
  892. pcm->private_free = snd_es1938_free_pcm;
  893. pcm->info_flags = 0;
  894. strcpy(pcm->name, "ESS Solo-1");
  895. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  896. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  897. chip->pcm = pcm;
  898. return 0;
  899. }
  900. /* -------------------------------------------------------------------
  901. *
  902. * *** Mixer part ***
  903. */
  904. static int snd_es1938_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  905. {
  906. static char *texts[8] = {
  907. "Mic", "Mic Master", "CD", "AOUT",
  908. "Mic1", "Mix", "Line", "Master"
  909. };
  910. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  911. uinfo->count = 1;
  912. uinfo->value.enumerated.items = 8;
  913. if (uinfo->value.enumerated.item > 7)
  914. uinfo->value.enumerated.item = 7;
  915. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  916. return 0;
  917. }
  918. static int snd_es1938_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  919. {
  920. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  921. ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
  922. return 0;
  923. }
  924. static int snd_es1938_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  925. {
  926. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  927. unsigned char val = ucontrol->value.enumerated.item[0];
  928. if (val > 7)
  929. return -EINVAL;
  930. return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
  931. }
  932. static int snd_es1938_info_spatializer_enable(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  933. {
  934. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  935. uinfo->count = 1;
  936. uinfo->value.integer.min = 0;
  937. uinfo->value.integer.max = 1;
  938. return 0;
  939. }
  940. static int snd_es1938_get_spatializer_enable(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  941. {
  942. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  943. unsigned char val = snd_es1938_mixer_read(chip, 0x50);
  944. ucontrol->value.integer.value[0] = !!(val & 8);
  945. return 0;
  946. }
  947. static int snd_es1938_put_spatializer_enable(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  948. {
  949. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  950. unsigned char oval, nval;
  951. int change;
  952. nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
  953. oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
  954. change = nval != oval;
  955. if (change) {
  956. snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
  957. snd_es1938_mixer_write(chip, 0x50, nval);
  958. }
  959. return change;
  960. }
  961. static int snd_es1938_info_hw_volume(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  962. {
  963. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  964. uinfo->count = 2;
  965. uinfo->value.integer.min = 0;
  966. uinfo->value.integer.max = 63;
  967. return 0;
  968. }
  969. static int snd_es1938_get_hw_volume(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  970. {
  971. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  972. ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
  973. ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
  974. return 0;
  975. }
  976. static int snd_es1938_info_hw_switch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  977. {
  978. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  979. uinfo->count = 2;
  980. uinfo->value.integer.min = 0;
  981. uinfo->value.integer.max = 1;
  982. return 0;
  983. }
  984. static int snd_es1938_get_hw_switch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  985. {
  986. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  987. ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
  988. ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
  989. return 0;
  990. }
  991. static void snd_es1938_hwv_free(snd_kcontrol_t *kcontrol)
  992. {
  993. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  994. chip->master_volume = NULL;
  995. chip->master_switch = NULL;
  996. chip->hw_volume = NULL;
  997. chip->hw_switch = NULL;
  998. }
  999. static int snd_es1938_reg_bits(es1938_t *chip, unsigned char reg,
  1000. unsigned char mask, unsigned char val)
  1001. {
  1002. if (reg < 0xa0)
  1003. return snd_es1938_mixer_bits(chip, reg, mask, val);
  1004. else
  1005. return snd_es1938_bits(chip, reg, mask, val);
  1006. }
  1007. static int snd_es1938_reg_read(es1938_t *chip, unsigned char reg)
  1008. {
  1009. if (reg < 0xa0)
  1010. return snd_es1938_mixer_read(chip, reg);
  1011. else
  1012. return snd_es1938_read(chip, reg);
  1013. }
  1014. #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1015. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1016. .info = snd_es1938_info_single, \
  1017. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1018. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  1019. static int snd_es1938_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1020. {
  1021. int mask = (kcontrol->private_value >> 16) & 0xff;
  1022. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1023. uinfo->count = 1;
  1024. uinfo->value.integer.min = 0;
  1025. uinfo->value.integer.max = mask;
  1026. return 0;
  1027. }
  1028. static int snd_es1938_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1029. {
  1030. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1031. int reg = kcontrol->private_value & 0xff;
  1032. int shift = (kcontrol->private_value >> 8) & 0xff;
  1033. int mask = (kcontrol->private_value >> 16) & 0xff;
  1034. int invert = (kcontrol->private_value >> 24) & 0xff;
  1035. int val;
  1036. val = snd_es1938_reg_read(chip, reg);
  1037. ucontrol->value.integer.value[0] = (val >> shift) & mask;
  1038. if (invert)
  1039. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1040. return 0;
  1041. }
  1042. static int snd_es1938_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1043. {
  1044. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1045. int reg = kcontrol->private_value & 0xff;
  1046. int shift = (kcontrol->private_value >> 8) & 0xff;
  1047. int mask = (kcontrol->private_value >> 16) & 0xff;
  1048. int invert = (kcontrol->private_value >> 24) & 0xff;
  1049. unsigned char val;
  1050. val = (ucontrol->value.integer.value[0] & mask);
  1051. if (invert)
  1052. val = mask - val;
  1053. mask <<= shift;
  1054. val <<= shift;
  1055. return snd_es1938_reg_bits(chip, reg, mask, val) != val;
  1056. }
  1057. #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  1058. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1059. .info = snd_es1938_info_double, \
  1060. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1061. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  1062. static int snd_es1938_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1063. {
  1064. int mask = (kcontrol->private_value >> 24) & 0xff;
  1065. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1066. uinfo->count = 2;
  1067. uinfo->value.integer.min = 0;
  1068. uinfo->value.integer.max = mask;
  1069. return 0;
  1070. }
  1071. static int snd_es1938_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1072. {
  1073. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1074. int left_reg = kcontrol->private_value & 0xff;
  1075. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1076. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1077. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1078. int mask = (kcontrol->private_value >> 24) & 0xff;
  1079. int invert = (kcontrol->private_value >> 22) & 1;
  1080. unsigned char left, right;
  1081. left = snd_es1938_reg_read(chip, left_reg);
  1082. if (left_reg != right_reg)
  1083. right = snd_es1938_reg_read(chip, right_reg);
  1084. else
  1085. right = left;
  1086. ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
  1087. ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
  1088. if (invert) {
  1089. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1090. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  1091. }
  1092. return 0;
  1093. }
  1094. static int snd_es1938_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1095. {
  1096. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1097. int left_reg = kcontrol->private_value & 0xff;
  1098. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1099. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1100. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1101. int mask = (kcontrol->private_value >> 24) & 0xff;
  1102. int invert = (kcontrol->private_value >> 22) & 1;
  1103. int change;
  1104. unsigned char val1, val2, mask1, mask2;
  1105. val1 = ucontrol->value.integer.value[0] & mask;
  1106. val2 = ucontrol->value.integer.value[1] & mask;
  1107. if (invert) {
  1108. val1 = mask - val1;
  1109. val2 = mask - val2;
  1110. }
  1111. val1 <<= shift_left;
  1112. val2 <<= shift_right;
  1113. mask1 = mask << shift_left;
  1114. mask2 = mask << shift_right;
  1115. if (left_reg != right_reg) {
  1116. change = 0;
  1117. if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
  1118. change = 1;
  1119. if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
  1120. change = 1;
  1121. } else {
  1122. change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
  1123. val1 | val2) != (val1 | val2));
  1124. }
  1125. return change;
  1126. }
  1127. static snd_kcontrol_new_t snd_es1938_controls[] = {
  1128. ES1938_DOUBLE("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0),
  1129. ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
  1130. {
  1131. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1132. .name = "Hardware Master Playback Volume",
  1133. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1134. .info = snd_es1938_info_hw_volume,
  1135. .get = snd_es1938_get_hw_volume,
  1136. },
  1137. {
  1138. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1139. .name = "Hardware Master Playback Switch",
  1140. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1141. .info = snd_es1938_info_hw_switch,
  1142. .get = snd_es1938_get_hw_switch,
  1143. },
  1144. ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
  1145. ES1938_DOUBLE("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0),
  1146. ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
  1147. ES1938_DOUBLE("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0),
  1148. ES1938_DOUBLE("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
  1149. ES1938_DOUBLE("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0),
  1150. ES1938_DOUBLE("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0),
  1151. ES1938_DOUBLE("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0),
  1152. ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0),
  1153. ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
  1154. ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
  1155. {
  1156. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1157. .name = "Capture Source",
  1158. .info = snd_es1938_info_mux,
  1159. .get = snd_es1938_get_mux,
  1160. .put = snd_es1938_put_mux,
  1161. },
  1162. ES1938_DOUBLE("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
  1163. ES1938_DOUBLE("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0),
  1164. ES1938_DOUBLE("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0),
  1165. ES1938_DOUBLE("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0),
  1166. ES1938_DOUBLE("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0),
  1167. ES1938_DOUBLE("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0),
  1168. ES1938_DOUBLE("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0),
  1169. ES1938_DOUBLE("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0),
  1170. ES1938_DOUBLE("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0),
  1171. ES1938_DOUBLE("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0),
  1172. ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
  1173. {
  1174. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1175. .name = "3D Control - Switch",
  1176. .info = snd_es1938_info_spatializer_enable,
  1177. .get = snd_es1938_get_spatializer_enable,
  1178. .put = snd_es1938_put_spatializer_enable,
  1179. },
  1180. ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
  1181. };
  1182. /* ---------------------------------------------------------------------------- */
  1183. /* ---------------------------------------------------------------------------- */
  1184. /*
  1185. * initialize the chip - used by resume callback, too
  1186. */
  1187. static void snd_es1938_chip_init(es1938_t *chip)
  1188. {
  1189. /* reset chip */
  1190. snd_es1938_reset(chip);
  1191. /* configure native mode */
  1192. /* enable bus master */
  1193. pci_set_master(chip->pci);
  1194. /* disable legacy audio */
  1195. pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
  1196. /* set DDMA base */
  1197. pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
  1198. /* set DMA/IRQ policy */
  1199. pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
  1200. /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
  1201. outb(0xf0, SLIO_REG(chip, IRQCONTROL));
  1202. /* reset DMA */
  1203. outb(0, SLDM_REG(chip, DMACLEAR));
  1204. }
  1205. #ifdef CONFIG_PM
  1206. /*
  1207. * PM support
  1208. */
  1209. static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
  1210. 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
  1211. 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
  1212. 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
  1213. 0xa8, 0xb4,
  1214. };
  1215. static int es1938_suspend(snd_card_t *card, pm_message_t state)
  1216. {
  1217. es1938_t *chip = card->pm_private_data;
  1218. unsigned char *s, *d;
  1219. snd_pcm_suspend_all(chip->pcm);
  1220. /* save mixer-related registers */
  1221. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
  1222. *d = snd_es1938_reg_read(chip, *s);
  1223. outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
  1224. if (chip->irq >= 0)
  1225. free_irq(chip->irq, (void *)chip);
  1226. pci_disable_device(chip->pci);
  1227. return 0;
  1228. }
  1229. static int es1938_resume(snd_card_t *card)
  1230. {
  1231. es1938_t *chip = card->pm_private_data;
  1232. unsigned char *s, *d;
  1233. pci_enable_device(chip->pci);
  1234. request_irq(chip->pci->irq, snd_es1938_interrupt,
  1235. SA_INTERRUPT|SA_SHIRQ, "ES1938", (void *)chip);
  1236. chip->irq = chip->pci->irq;
  1237. snd_es1938_chip_init(chip);
  1238. /* restore mixer-related registers */
  1239. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
  1240. if (*s < 0xa0)
  1241. snd_es1938_mixer_write(chip, *s, *d);
  1242. else
  1243. snd_es1938_write(chip, *s, *d);
  1244. }
  1245. return 0;
  1246. }
  1247. #endif /* CONFIG_PM */
  1248. #ifdef SUPPORT_JOYSTICK
  1249. static int __devinit snd_es1938_create_gameport(es1938_t *chip)
  1250. {
  1251. struct gameport *gp;
  1252. chip->gameport = gp = gameport_allocate_port();
  1253. if (!gp) {
  1254. printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
  1255. return -ENOMEM;
  1256. }
  1257. gameport_set_name(gp, "ES1938");
  1258. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1259. gameport_set_dev_parent(gp, &chip->pci->dev);
  1260. gp->io = chip->game_port;
  1261. gameport_register_port(gp);
  1262. return 0;
  1263. }
  1264. static void snd_es1938_free_gameport(es1938_t *chip)
  1265. {
  1266. if (chip->gameport) {
  1267. gameport_unregister_port(chip->gameport);
  1268. chip->gameport = NULL;
  1269. }
  1270. }
  1271. #else
  1272. static inline int snd_es1938_create_gameport(es1938_t *chip) { return -ENOSYS; }
  1273. static inline void snd_es1938_free_gameport(es1938_t *chip) { }
  1274. #endif /* SUPPORT_JOYSTICK */
  1275. static int snd_es1938_free(es1938_t *chip)
  1276. {
  1277. /* disable irqs */
  1278. outb(0x00, SLIO_REG(chip, IRQCONTROL));
  1279. if (chip->rmidi)
  1280. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
  1281. snd_es1938_free_gameport(chip);
  1282. if (chip->irq >= 0)
  1283. free_irq(chip->irq, (void *)chip);
  1284. pci_release_regions(chip->pci);
  1285. pci_disable_device(chip->pci);
  1286. kfree(chip);
  1287. return 0;
  1288. }
  1289. static int snd_es1938_dev_free(snd_device_t *device)
  1290. {
  1291. es1938_t *chip = device->device_data;
  1292. return snd_es1938_free(chip);
  1293. }
  1294. static int __devinit snd_es1938_create(snd_card_t * card,
  1295. struct pci_dev * pci,
  1296. es1938_t ** rchip)
  1297. {
  1298. es1938_t *chip;
  1299. int err;
  1300. static snd_device_ops_t ops = {
  1301. .dev_free = snd_es1938_dev_free,
  1302. };
  1303. *rchip = NULL;
  1304. /* enable PCI device */
  1305. if ((err = pci_enable_device(pci)) < 0)
  1306. return err;
  1307. /* check, if we can restrict PCI DMA transfers to 24 bits */
  1308. if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
  1309. pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
  1310. snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
  1311. pci_disable_device(pci);
  1312. return -ENXIO;
  1313. }
  1314. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1315. if (chip == NULL) {
  1316. pci_disable_device(pci);
  1317. return -ENOMEM;
  1318. }
  1319. spin_lock_init(&chip->reg_lock);
  1320. spin_lock_init(&chip->mixer_lock);
  1321. chip->card = card;
  1322. chip->pci = pci;
  1323. if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
  1324. kfree(chip);
  1325. pci_disable_device(pci);
  1326. return err;
  1327. }
  1328. chip->io_port = pci_resource_start(pci, 0);
  1329. chip->sb_port = pci_resource_start(pci, 1);
  1330. chip->vc_port = pci_resource_start(pci, 2);
  1331. chip->mpu_port = pci_resource_start(pci, 3);
  1332. chip->game_port = pci_resource_start(pci, 4);
  1333. if (request_irq(pci->irq, snd_es1938_interrupt, SA_INTERRUPT|SA_SHIRQ, "ES1938", (void *)chip)) {
  1334. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1335. snd_es1938_free(chip);
  1336. return -EBUSY;
  1337. }
  1338. chip->irq = pci->irq;
  1339. #ifdef ES1938_DDEBUG
  1340. snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
  1341. chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
  1342. #endif
  1343. chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
  1344. snd_es1938_chip_init(chip);
  1345. snd_card_set_pm_callback(card, es1938_suspend, es1938_resume, chip);
  1346. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1347. snd_es1938_free(chip);
  1348. return err;
  1349. }
  1350. snd_card_set_dev(card, &pci->dev);
  1351. *rchip = chip;
  1352. return 0;
  1353. }
  1354. /* --------------------------------------------------------------------
  1355. * Interrupt handler
  1356. * -------------------------------------------------------------------- */
  1357. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1358. {
  1359. es1938_t *chip = dev_id;
  1360. unsigned char status, audiostatus;
  1361. int handled = 0;
  1362. status = inb(SLIO_REG(chip, IRQCONTROL));
  1363. #if 0
  1364. printk("Es1938debug - interrupt status: =0x%x\n", status);
  1365. #endif
  1366. /* AUDIO 1 */
  1367. if (status & 0x10) {
  1368. #if 0
  1369. printk("Es1938debug - AUDIO channel 1 interrupt\n");
  1370. printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", inw(SLDM_REG(chip, DMACOUNT)));
  1371. printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", inl(SLDM_REG(chip, DMAADDR)));
  1372. printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", inl(SLDM_REG(chip, DMASTATUS)));
  1373. #endif
  1374. /* clear irq */
  1375. handled = 1;
  1376. audiostatus = inb(SLSB_REG(chip, STATUS));
  1377. if (chip->active & ADC1)
  1378. snd_pcm_period_elapsed(chip->capture_substream);
  1379. else if (chip->active & DAC1)
  1380. snd_pcm_period_elapsed(chip->playback2_substream);
  1381. }
  1382. /* AUDIO 2 */
  1383. if (status & 0x20) {
  1384. #if 0
  1385. printk("Es1938debug - AUDIO channel 2 interrupt\n");
  1386. printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
  1387. printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", inl(SLIO_REG(chip, AUDIO2DMAADDR)));
  1388. #endif
  1389. /* clear irq */
  1390. handled = 1;
  1391. snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
  1392. if (chip->active & DAC2)
  1393. snd_pcm_period_elapsed(chip->playback1_substream);
  1394. }
  1395. /* Hardware volume */
  1396. if (status & 0x40) {
  1397. int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
  1398. handled = 1;
  1399. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
  1400. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
  1401. if (!split) {
  1402. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->master_switch->id);
  1403. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->master_volume->id);
  1404. }
  1405. /* ack interrupt */
  1406. snd_es1938_mixer_write(chip, 0x66, 0x00);
  1407. }
  1408. /* MPU401 */
  1409. if (status & 0x80) {
  1410. // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
  1411. // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
  1412. // andreas@flying-snail.de
  1413. // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
  1414. if (chip->rmidi) {
  1415. handled = 1;
  1416. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  1417. }
  1418. }
  1419. return IRQ_RETVAL(handled);
  1420. }
  1421. #define ES1938_DMA_SIZE 64
  1422. static int __devinit snd_es1938_mixer(es1938_t *chip)
  1423. {
  1424. snd_card_t *card;
  1425. unsigned int idx;
  1426. int err;
  1427. card = chip->card;
  1428. strcpy(card->mixername, "ESS Solo-1");
  1429. for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
  1430. snd_kcontrol_t *kctl;
  1431. kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
  1432. switch (idx) {
  1433. case 0:
  1434. chip->master_volume = kctl;
  1435. kctl->private_free = snd_es1938_hwv_free;
  1436. break;
  1437. case 1:
  1438. chip->master_switch = kctl;
  1439. kctl->private_free = snd_es1938_hwv_free;
  1440. break;
  1441. case 2:
  1442. chip->hw_volume = kctl;
  1443. kctl->private_free = snd_es1938_hwv_free;
  1444. break;
  1445. case 3:
  1446. chip->hw_switch = kctl;
  1447. kctl->private_free = snd_es1938_hwv_free;
  1448. break;
  1449. }
  1450. if ((err = snd_ctl_add(card, kctl)) < 0)
  1451. return err;
  1452. }
  1453. return 0;
  1454. }
  1455. static int __devinit snd_es1938_probe(struct pci_dev *pci,
  1456. const struct pci_device_id *pci_id)
  1457. {
  1458. static int dev;
  1459. snd_card_t *card;
  1460. es1938_t *chip;
  1461. opl3_t *opl3;
  1462. int idx, err;
  1463. if (dev >= SNDRV_CARDS)
  1464. return -ENODEV;
  1465. if (!enable[dev]) {
  1466. dev++;
  1467. return -ENOENT;
  1468. }
  1469. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1470. if (card == NULL)
  1471. return -ENOMEM;
  1472. for (idx = 0; idx < 5; idx++) {
  1473. if (pci_resource_start(pci, idx) == 0 ||
  1474. !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
  1475. snd_card_free(card);
  1476. return -ENODEV;
  1477. }
  1478. }
  1479. if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
  1480. snd_card_free(card);
  1481. return err;
  1482. }
  1483. strcpy(card->driver, "ES1938");
  1484. strcpy(card->shortname, "ESS ES1938 (Solo-1)");
  1485. sprintf(card->longname, "%s rev %i, irq %i",
  1486. card->shortname,
  1487. chip->revision,
  1488. chip->irq);
  1489. if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
  1490. snd_card_free(card);
  1491. return err;
  1492. }
  1493. if ((err = snd_es1938_mixer(chip)) < 0) {
  1494. snd_card_free(card);
  1495. return err;
  1496. }
  1497. if (snd_opl3_create(card,
  1498. SLSB_REG(chip, FMLOWADDR),
  1499. SLSB_REG(chip, FMHIGHADDR),
  1500. OPL3_HW_OPL3, 1, &opl3) < 0) {
  1501. printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
  1502. SLSB_REG(chip, FMLOWADDR));
  1503. } else {
  1504. if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
  1505. snd_card_free(card);
  1506. return err;
  1507. }
  1508. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1509. snd_card_free(card);
  1510. return err;
  1511. }
  1512. }
  1513. if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
  1514. chip->mpu_port, 1, chip->irq, 0, &chip->rmidi) < 0) {
  1515. printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
  1516. } else {
  1517. // this line is vital for MIDI interrupt handling on ess-solo1
  1518. // andreas@flying-snail.de
  1519. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
  1520. }
  1521. snd_es1938_create_gameport(chip);
  1522. if ((err = snd_card_register(card)) < 0) {
  1523. snd_card_free(card);
  1524. return err;
  1525. }
  1526. pci_set_drvdata(pci, card);
  1527. dev++;
  1528. return 0;
  1529. }
  1530. static void __devexit snd_es1938_remove(struct pci_dev *pci)
  1531. {
  1532. snd_card_free(pci_get_drvdata(pci));
  1533. pci_set_drvdata(pci, NULL);
  1534. }
  1535. static struct pci_driver driver = {
  1536. .name = "ESS ES1938 (Solo-1)",
  1537. .id_table = snd_es1938_ids,
  1538. .probe = snd_es1938_probe,
  1539. .remove = __devexit_p(snd_es1938_remove),
  1540. SND_PCI_PM_CALLBACKS
  1541. };
  1542. static int __init alsa_card_es1938_init(void)
  1543. {
  1544. return pci_register_driver(&driver);
  1545. }
  1546. static void __exit alsa_card_es1938_exit(void)
  1547. {
  1548. pci_unregister_driver(&driver);
  1549. }
  1550. module_init(alsa_card_es1938_init)
  1551. module_exit(alsa_card_es1938_exit)