azt3328.c 56 KB

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  1. /*
  2. * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
  3. * Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de>
  4. *
  5. * Framework borrowed from Bart Hartgers's als4000.c.
  6. * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
  7. * found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
  8. * Other versions are:
  9. * PCI168 A(W), sub ID 1800
  10. * PCI168 A/AP, sub ID 8000
  11. * Please give me feedback in case you try my driver with one of these!!
  12. *
  13. * GPL LICENSE
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  26. *
  27. * NOTES
  28. * Since Aztech does not provide any chipset documentation,
  29. * even on repeated request to various addresses,
  30. * and the answer that was finally given was negative
  31. * (and I was stupid enough to manage to get hold of a PCI168 soundcard
  32. * in the first place >:-P}),
  33. * I was forced to base this driver on reverse engineering
  34. * (3 weeks' worth of evenings filled with driver work).
  35. * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  36. *
  37. * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  38. * for compatibility reasons) has the following features:
  39. *
  40. * - builtin AC97 conformant codec (SNR over 80dB)
  41. * (really AC97 compliant?? I really doubt it when looking
  42. * at the mixer register layout)
  43. * - builtin genuine OPL3
  44. * - full duplex 16bit playback/record at independent sampling rate
  45. * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  46. * - game port (legacy address support)
  47. * - built-in General DirectX timer having a 20 bits counter
  48. * with 1us resolution (see below!)
  49. * - I2S serial port for external DAC
  50. * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  51. * - supports hardware volume control
  52. * - single chip low cost solution (128 pin QFP)
  53. * - supports programmable Sub-vendor and Sub-system ID
  54. * required for Microsoft's logo compliance (FIXME: where?)
  55. * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  56. *
  57. * Note that this driver now is actually *better* than the Windows driver,
  58. * since it additionally supports the card's 1MHz DirectX timer - just try
  59. * the following snd-seq module parameters etc.:
  60. * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0
  61. * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0
  62. * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000
  63. * - "timidity -iAv -B2,8 -Os -EFreverb=0"
  64. * - "pmidi -p 128:0 jazz.mid"
  65. *
  66. * Certain PCI versions of this card are susceptible to DMA traffic underruns
  67. * in some systems (resulting in sound crackling/clicking/popping),
  68. * probably because they don't have a DMA FIFO buffer or so.
  69. * Overview (PCI ID/PCI subID/PCI rev.):
  70. * - no DMA crackling on SiS735: 0x50DC/0x1801/16
  71. * - unknown performance: 0x50DC/0x1801/10
  72. * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler)
  73. *
  74. * Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  75. * supposed to be very fast and supposed to get rid of crackling much
  76. * better than a VIA, yet ironically I still get crackling, like many other
  77. * people with the same chipset.
  78. * Possible remedies:
  79. * - plug card into a different PCI slot, preferrably one that isn't shared
  80. * too much (this helps a lot, but not completely!)
  81. * - get rid of PCI VGA card, use AGP instead
  82. * - upgrade or downgrade BIOS
  83. * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  84. * Not too helpful.
  85. * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  86. *
  87. * BUGS
  88. * - full-duplex might *still* be problematic, not fully tested recently
  89. *
  90. * TODO
  91. * - test MPU401 MIDI playback etc.
  92. * - power management. See e.g. intel8x0 or cs4281.
  93. * This would be nice since the chip runs a bit hot, and it's *required*
  94. * anyway for proper ACPI power management.
  95. * - figure out what all unknown port bits are responsible for
  96. */
  97. #include <sound/driver.h>
  98. #include <asm/io.h>
  99. #include <linux/init.h>
  100. #include <linux/pci.h>
  101. #include <linux/delay.h>
  102. #include <linux/slab.h>
  103. #include <linux/gameport.h>
  104. #include <linux/moduleparam.h>
  105. #include <sound/core.h>
  106. #include <sound/control.h>
  107. #include <sound/pcm.h>
  108. #include <sound/rawmidi.h>
  109. #include <sound/mpu401.h>
  110. #include <sound/opl3.h>
  111. #include <sound/initval.h>
  112. #include "azt3328.h"
  113. MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
  114. MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
  115. MODULE_LICENSE("GPL");
  116. MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
  117. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  118. #define SUPPORT_JOYSTICK 1
  119. #endif
  120. #define DEBUG_MISC 0
  121. #define DEBUG_CALLS 0
  122. #define DEBUG_MIXER 0
  123. #define DEBUG_PLAY_REC 0
  124. #define DEBUG_IO 0
  125. #define DEBUG_TIMER 0
  126. #define MIXER_TESTING 0
  127. #if DEBUG_MISC
  128. #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
  129. #else
  130. #define snd_azf3328_dbgmisc(format, args...)
  131. #endif
  132. #if DEBUG_CALLS
  133. #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
  134. #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__)
  135. #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__)
  136. #else
  137. #define snd_azf3328_dbgcalls(format, args...)
  138. #define snd_azf3328_dbgcallenter()
  139. #define snd_azf3328_dbgcallleave()
  140. #endif
  141. #if DEBUG_MIXER
  142. #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
  143. #else
  144. #define snd_azf3328_dbgmixer(format, args...)
  145. #endif
  146. #if DEBUG_PLAY_REC
  147. #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
  148. #else
  149. #define snd_azf3328_dbgplay(format, args...)
  150. #endif
  151. #if DEBUG_MISC
  152. #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args)
  153. #else
  154. #define snd_azf3328_dbgtimer(format, args...)
  155. #endif
  156. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  157. module_param_array(index, int, NULL, 0444);
  158. MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
  159. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  160. module_param_array(id, charp, NULL, 0444);
  161. MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
  162. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  163. module_param_array(enable, bool, NULL, 0444);
  164. MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
  165. #ifdef SUPPORT_JOYSTICK
  166. static int joystick[SNDRV_CARDS];
  167. module_param_array(joystick, bool, NULL, 0444);
  168. MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
  169. #endif
  170. static int seqtimer_scaling = 128;
  171. module_param(seqtimer_scaling, int, 0444);
  172. MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
  173. typedef struct _snd_azf3328 {
  174. /* often-used fields towards beginning, then grouped */
  175. unsigned long codec_port;
  176. unsigned long io2_port;
  177. unsigned long mpu_port;
  178. unsigned long synth_port;
  179. unsigned long mixer_port;
  180. spinlock_t reg_lock;
  181. snd_timer_t *timer;
  182. snd_pcm_t *pcm;
  183. snd_pcm_substream_t *playback_substream;
  184. snd_pcm_substream_t *capture_substream;
  185. unsigned int is_playing;
  186. unsigned int is_recording;
  187. snd_card_t *card;
  188. snd_rawmidi_t *rmidi;
  189. #ifdef SUPPORT_JOYSTICK
  190. struct gameport *gameport;
  191. #endif
  192. struct pci_dev *pci;
  193. int irq;
  194. } azf3328_t;
  195. static const struct pci_device_id snd_azf3328_ids[] = {
  196. { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */
  197. { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */
  198. { 0, }
  199. };
  200. MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
  201. static inline void
  202. snd_azf3328_codec_outb(const azf3328_t *chip, int reg, u8 value)
  203. {
  204. outb(value, chip->codec_port + reg);
  205. }
  206. static inline u8
  207. snd_azf3328_codec_inb(const azf3328_t *chip, int reg)
  208. {
  209. return inb(chip->codec_port + reg);
  210. }
  211. static inline void
  212. snd_azf3328_codec_outw(const azf3328_t *chip, int reg, u16 value)
  213. {
  214. outw(value, chip->codec_port + reg);
  215. }
  216. static inline u16
  217. snd_azf3328_codec_inw(const azf3328_t *chip, int reg)
  218. {
  219. return inw(chip->codec_port + reg);
  220. }
  221. static inline void
  222. snd_azf3328_codec_outl(const azf3328_t *chip, int reg, u32 value)
  223. {
  224. outl(value, chip->codec_port + reg);
  225. }
  226. static inline void
  227. snd_azf3328_io2_outb(const azf3328_t *chip, int reg, u8 value)
  228. {
  229. outb(value, chip->io2_port + reg);
  230. }
  231. static inline u8
  232. snd_azf3328_io2_inb(const azf3328_t *chip, int reg)
  233. {
  234. return inb(chip->io2_port + reg);
  235. }
  236. static inline void
  237. snd_azf3328_mixer_outw(const azf3328_t *chip, int reg, u16 value)
  238. {
  239. outw(value, chip->mixer_port + reg);
  240. }
  241. static inline u16
  242. snd_azf3328_mixer_inw(const azf3328_t *chip, int reg)
  243. {
  244. return inw(chip->mixer_port + reg);
  245. }
  246. static void
  247. snd_azf3328_mixer_set_mute(const azf3328_t *chip, int reg, int do_mute)
  248. {
  249. unsigned long portbase = chip->mixer_port + reg + 1;
  250. unsigned char oldval;
  251. /* the mute bit is on the *second* (i.e. right) register of a
  252. * left/right channel setting */
  253. oldval = inb(portbase);
  254. if (do_mute)
  255. oldval |= 0x80;
  256. else
  257. oldval &= ~0x80;
  258. outb(oldval, portbase);
  259. }
  260. static void
  261. snd_azf3328_mixer_write_volume_gradually(const azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
  262. {
  263. unsigned long portbase = chip->mixer_port + reg;
  264. unsigned char curr_vol_left = 0, curr_vol_right = 0;
  265. int left_done = 0, right_done = 0;
  266. snd_azf3328_dbgcallenter();
  267. if (chan_sel & SET_CHAN_LEFT)
  268. curr_vol_left = inb(portbase + 1);
  269. else
  270. left_done = 1;
  271. if (chan_sel & SET_CHAN_RIGHT)
  272. curr_vol_right = inb(portbase + 0);
  273. else
  274. right_done = 1;
  275. /* take care of muting flag (0x80) contained in left channel */
  276. if (curr_vol_left & 0x80)
  277. dst_vol_left |= 0x80;
  278. else
  279. dst_vol_left &= ~0x80;
  280. do
  281. {
  282. if (!left_done)
  283. {
  284. if (curr_vol_left > dst_vol_left)
  285. curr_vol_left--;
  286. else
  287. if (curr_vol_left < dst_vol_left)
  288. curr_vol_left++;
  289. else
  290. left_done = 1;
  291. outb(curr_vol_left, portbase + 1);
  292. }
  293. if (!right_done)
  294. {
  295. if (curr_vol_right > dst_vol_right)
  296. curr_vol_right--;
  297. else
  298. if (curr_vol_right < dst_vol_right)
  299. curr_vol_right++;
  300. else
  301. right_done = 1;
  302. /* during volume change, the right channel is crackling
  303. * somewhat more than the left channel, unfortunately.
  304. * This seems to be a hardware issue. */
  305. outb(curr_vol_right, portbase + 0);
  306. }
  307. if (delay)
  308. mdelay(delay);
  309. }
  310. while ((!left_done) || (!right_done));
  311. snd_azf3328_dbgcallleave();
  312. }
  313. /*
  314. * general mixer element
  315. */
  316. typedef struct azf3328_mixer_reg {
  317. unsigned int reg;
  318. unsigned int lchan_shift, rchan_shift;
  319. unsigned int mask;
  320. unsigned int invert: 1;
  321. unsigned int stereo: 1;
  322. unsigned int enum_c: 4;
  323. } azf3328_mixer_reg_t;
  324. #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
  325. ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
  326. (mask << 16) | \
  327. (invert << 24) | \
  328. (stereo << 25) | \
  329. (enum_c << 26))
  330. static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
  331. {
  332. r->reg = val & 0xff;
  333. r->lchan_shift = (val >> 8) & 0x0f;
  334. r->rchan_shift = (val >> 12) & 0x0f;
  335. r->mask = (val >> 16) & 0xff;
  336. r->invert = (val >> 24) & 1;
  337. r->stereo = (val >> 25) & 1;
  338. r->enum_c = (val >> 26) & 0x0f;
  339. }
  340. /*
  341. * mixer switches/volumes
  342. */
  343. #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
  344. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  345. .info = snd_azf3328_info_mixer, \
  346. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  347. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
  348. }
  349. #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
  350. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  351. .info = snd_azf3328_info_mixer, \
  352. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  353. .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
  354. }
  355. #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
  356. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  357. .info = snd_azf3328_info_mixer, \
  358. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  359. .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
  360. }
  361. #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
  362. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  363. .info = snd_azf3328_info_mixer, \
  364. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  365. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
  366. }
  367. #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
  368. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  369. .info = snd_azf3328_info_mixer_enum, \
  370. .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
  371. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
  372. }
  373. static int
  374. snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  375. {
  376. azf3328_mixer_reg_t reg;
  377. snd_azf3328_dbgcallenter();
  378. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  379. uinfo->type = reg.mask == 1 ?
  380. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  381. uinfo->count = reg.stereo + 1;
  382. uinfo->value.integer.min = 0;
  383. uinfo->value.integer.max = reg.mask;
  384. snd_azf3328_dbgcallleave();
  385. return 0;
  386. }
  387. static int
  388. snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  389. {
  390. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  391. azf3328_mixer_reg_t reg;
  392. unsigned int oreg, val;
  393. snd_azf3328_dbgcallenter();
  394. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  395. oreg = snd_azf3328_mixer_inw(chip, reg.reg);
  396. val = (oreg >> reg.lchan_shift) & reg.mask;
  397. if (reg.invert)
  398. val = reg.mask - val;
  399. ucontrol->value.integer.value[0] = val;
  400. if (reg.stereo) {
  401. val = (oreg >> reg.rchan_shift) & reg.mask;
  402. if (reg.invert)
  403. val = reg.mask - val;
  404. ucontrol->value.integer.value[1] = val;
  405. }
  406. snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx "
  407. "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n",
  408. reg.reg, oreg,
  409. ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
  410. reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
  411. snd_azf3328_dbgcallleave();
  412. return 0;
  413. }
  414. static int
  415. snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  416. {
  417. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  418. azf3328_mixer_reg_t reg;
  419. unsigned int oreg, nreg, val;
  420. snd_azf3328_dbgcallenter();
  421. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  422. oreg = snd_azf3328_mixer_inw(chip, reg.reg);
  423. val = ucontrol->value.integer.value[0] & reg.mask;
  424. if (reg.invert)
  425. val = reg.mask - val;
  426. nreg = oreg & ~(reg.mask << reg.lchan_shift);
  427. nreg |= (val << reg.lchan_shift);
  428. if (reg.stereo) {
  429. val = ucontrol->value.integer.value[1] & reg.mask;
  430. if (reg.invert)
  431. val = reg.mask - val;
  432. nreg &= ~(reg.mask << reg.rchan_shift);
  433. nreg |= (val << reg.rchan_shift);
  434. }
  435. if (reg.mask >= 0x07) /* it's a volume control, so better take care */
  436. snd_azf3328_mixer_write_volume_gradually(
  437. chip, reg.reg, nreg >> 8, nreg & 0xff,
  438. /* just set both channels, doesn't matter */
  439. SET_CHAN_LEFT|SET_CHAN_RIGHT,
  440. 0);
  441. else
  442. snd_azf3328_mixer_outw(chip, reg.reg, nreg);
  443. snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, "
  444. "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n",
  445. reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
  446. oreg, reg.lchan_shift, reg.rchan_shift,
  447. nreg, snd_azf3328_mixer_inw(chip, reg.reg));
  448. snd_azf3328_dbgcallleave();
  449. return (nreg != oreg);
  450. }
  451. static int
  452. snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  453. {
  454. static const char * const texts1[] = {
  455. "ModemOut1", "ModemOut2"
  456. };
  457. static const char * const texts2[] = {
  458. "MonoSelectSource1", "MonoSelectSource2"
  459. };
  460. static const char * const texts3[] = {
  461. "Mic", "CD", "Video", "Aux",
  462. "Line", "Mix", "Mix Mono", "Phone"
  463. };
  464. azf3328_mixer_reg_t reg;
  465. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  466. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  467. uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
  468. uinfo->value.enumerated.items = reg.enum_c;
  469. if (uinfo->value.enumerated.item > reg.enum_c - 1U)
  470. uinfo->value.enumerated.item = reg.enum_c - 1U;
  471. if (reg.reg == IDX_MIXER_ADVCTL2)
  472. {
  473. if (reg.lchan_shift == 8) /* modem out sel */
  474. strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
  475. else /* mono sel source */
  476. strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
  477. }
  478. else
  479. strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
  480. );
  481. return 0;
  482. }
  483. static int
  484. snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  485. {
  486. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  487. azf3328_mixer_reg_t reg;
  488. unsigned short val;
  489. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  490. val = snd_azf3328_mixer_inw(chip, reg.reg);
  491. if (reg.reg == IDX_MIXER_REC_SELECT)
  492. {
  493. ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
  494. ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
  495. }
  496. else
  497. ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
  498. snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n",
  499. reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1],
  500. reg.lchan_shift, reg.enum_c);
  501. return 0;
  502. }
  503. static int
  504. snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  505. {
  506. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  507. azf3328_mixer_reg_t reg;
  508. unsigned int oreg, nreg, val;
  509. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  510. oreg = snd_azf3328_mixer_inw(chip, reg.reg);
  511. val = oreg;
  512. if (reg.reg == IDX_MIXER_REC_SELECT)
  513. {
  514. if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
  515. ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
  516. return -EINVAL;
  517. val = (ucontrol->value.enumerated.item[0] << 8) |
  518. (ucontrol->value.enumerated.item[1] << 0);
  519. }
  520. else
  521. {
  522. if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
  523. return -EINVAL;
  524. val &= ~((reg.enum_c - 1) << reg.lchan_shift);
  525. val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
  526. }
  527. snd_azf3328_mixer_outw(chip, reg.reg, val);
  528. nreg = val;
  529. snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
  530. return (nreg != oreg);
  531. }
  532. static const snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
  533. AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
  534. AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
  535. AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
  536. AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
  537. AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1),
  538. AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
  539. AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
  540. AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
  541. AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
  542. AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
  543. AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
  544. AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
  545. AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
  546. AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
  547. AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
  548. AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
  549. AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
  550. AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
  551. AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
  552. AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
  553. AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
  554. AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
  555. AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
  556. AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
  557. AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
  558. AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
  559. AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
  560. AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
  561. AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
  562. AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
  563. AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
  564. AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0),
  565. AZF3328_MIXER_VOL_SPECIAL("3D Control - Wide", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
  566. AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
  567. #if MIXER_TESTING
  568. AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
  569. AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
  570. AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
  571. AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
  572. AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
  573. AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
  574. AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
  575. AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
  576. AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
  577. AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
  578. AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
  579. AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
  580. AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
  581. AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
  582. AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
  583. AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
  584. #endif
  585. };
  586. static const u16 __devinitdata snd_azf3328_init_values[][2] = {
  587. { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f },
  588. { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f },
  589. { IDX_MIXER_BASSTREBLE, 0x0000 },
  590. { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f },
  591. { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f },
  592. { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f },
  593. { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f },
  594. { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f },
  595. { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f },
  596. { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f },
  597. { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f },
  598. { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f },
  599. { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 },
  600. };
  601. static int __devinit
  602. snd_azf3328_mixer_new(azf3328_t *chip)
  603. {
  604. snd_card_t *card;
  605. const snd_kcontrol_new_t *sw;
  606. unsigned int idx;
  607. int err;
  608. snd_azf3328_dbgcallenter();
  609. snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
  610. card = chip->card;
  611. /* mixer reset */
  612. snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
  613. /* mute and zero volume channels */
  614. for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) {
  615. snd_azf3328_mixer_outw(chip,
  616. snd_azf3328_init_values[idx][0],
  617. snd_azf3328_init_values[idx][1]);
  618. }
  619. /* add mixer controls */
  620. sw = snd_azf3328_mixer_controls;
  621. for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
  622. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
  623. return err;
  624. }
  625. snd_component_add(card, "AZF3328 mixer");
  626. strcpy(card->mixername, "AZF3328 mixer");
  627. snd_azf3328_dbgcallleave();
  628. return 0;
  629. }
  630. static int
  631. snd_azf3328_hw_params(snd_pcm_substream_t * substream,
  632. snd_pcm_hw_params_t * hw_params)
  633. {
  634. int res;
  635. snd_azf3328_dbgcallenter();
  636. res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  637. snd_azf3328_dbgcallleave();
  638. return res;
  639. }
  640. static int
  641. snd_azf3328_hw_free(snd_pcm_substream_t * substream)
  642. {
  643. snd_azf3328_dbgcallenter();
  644. snd_pcm_lib_free_pages(substream);
  645. snd_azf3328_dbgcallleave();
  646. return 0;
  647. }
  648. static void
  649. snd_azf3328_setfmt(azf3328_t *chip,
  650. unsigned int reg,
  651. unsigned int bitrate,
  652. unsigned int format_width,
  653. unsigned int channels
  654. )
  655. {
  656. u16 val = 0xff00;
  657. unsigned long flags;
  658. snd_azf3328_dbgcallenter();
  659. switch (bitrate) {
  660. case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break;
  661. case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break;
  662. case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */
  663. case 6620: val |= SOUNDFORMAT_FREQ_6620; break;
  664. case 8000: val |= SOUNDFORMAT_FREQ_8000; break;
  665. case 9600: val |= SOUNDFORMAT_FREQ_9600; break;
  666. case 11025: val |= SOUNDFORMAT_FREQ_11025; break;
  667. case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break;
  668. case 16000: val |= SOUNDFORMAT_FREQ_16000; break;
  669. case 22050: val |= SOUNDFORMAT_FREQ_22050; break;
  670. case 32000: val |= SOUNDFORMAT_FREQ_32000; break;
  671. case 44100: val |= SOUNDFORMAT_FREQ_44100; break;
  672. case 48000: val |= SOUNDFORMAT_FREQ_48000; break;
  673. case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break;
  674. default:
  675. snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
  676. val |= SOUNDFORMAT_FREQ_44100;
  677. break;
  678. }
  679. /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */
  680. /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */
  681. /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */
  682. /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */
  683. /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
  684. /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
  685. /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
  686. /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
  687. /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
  688. if (channels == 2)
  689. val |= SOUNDFORMAT_FLAG_2CHANNELS;
  690. if (format_width == 16)
  691. val |= SOUNDFORMAT_FLAG_16BIT;
  692. spin_lock_irqsave(&chip->reg_lock, flags);
  693. /* set bitrate/format */
  694. snd_azf3328_codec_outw(chip, reg, val);
  695. /* changing the bitrate/format settings switches off the
  696. * audio output with an annoying click in case of 8/16bit format change
  697. * (maybe shutting down DAC/ADC?), thus immediately
  698. * do some tweaking to reenable it and get rid of the clicking
  699. * (FIXME: yes, it works, but what exactly am I doing here?? :)
  700. * FIXME: does this have some side effects for full-duplex
  701. * or other dramatic side effects? */
  702. if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
  703. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
  704. snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) |
  705. DMA_PLAY_SOMETHING1 |
  706. DMA_PLAY_SOMETHING2 |
  707. SOMETHING_ALMOST_ALWAYS_SET |
  708. DMA_EPILOGUE_SOMETHING |
  709. DMA_SOMETHING_ELSE
  710. );
  711. spin_unlock_irqrestore(&chip->reg_lock, flags);
  712. snd_azf3328_dbgcallleave();
  713. }
  714. static void
  715. snd_azf3328_setdmaa(azf3328_t *chip,
  716. long unsigned int addr,
  717. unsigned int count,
  718. unsigned int size,
  719. int do_recording)
  720. {
  721. unsigned long flags, portbase;
  722. unsigned int is_running;
  723. snd_azf3328_dbgcallenter();
  724. if (do_recording)
  725. {
  726. /* access capture registers, i.e. skip playback reg section */
  727. portbase = chip->codec_port + 0x20;
  728. is_running = chip->is_recording;
  729. }
  730. else
  731. {
  732. /* access the playback register section */
  733. portbase = chip->codec_port + 0x00;
  734. is_running = chip->is_playing;
  735. }
  736. /* AZF3328 uses a two buffer pointer DMA playback approach */
  737. if (!is_running)
  738. {
  739. unsigned long addr_area2;
  740. unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */
  741. count_areas = size/2;
  742. addr_area2 = addr+count_areas;
  743. count_areas--; /* max. index */
  744. snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas);
  745. /* build combined I/O buffer length word */
  746. count_tmp = count_areas;
  747. count_areas |= (count_tmp << 16);
  748. spin_lock_irqsave(&chip->reg_lock, flags);
  749. outl(addr, portbase + IDX_IO_PLAY_DMA_START_1);
  750. outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2);
  751. outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1);
  752. spin_unlock_irqrestore(&chip->reg_lock, flags);
  753. }
  754. snd_azf3328_dbgcallleave();
  755. }
  756. static int
  757. snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
  758. {
  759. #if 0
  760. azf3328_t *chip = snd_pcm_substream_chip(substream);
  761. snd_pcm_runtime_t *runtime = substream->runtime;
  762. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  763. unsigned int count = snd_pcm_lib_period_bytes(substream);
  764. #endif
  765. snd_azf3328_dbgcallenter();
  766. #if 0
  767. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
  768. runtime->rate,
  769. snd_pcm_format_width(runtime->format),
  770. runtime->channels);
  771. snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
  772. #endif
  773. snd_azf3328_dbgcallleave();
  774. return 0;
  775. }
  776. static int
  777. snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
  778. {
  779. #if 0
  780. azf3328_t *chip = snd_pcm_substream_chip(substream);
  781. snd_pcm_runtime_t *runtime = substream->runtime;
  782. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  783. unsigned int count = snd_pcm_lib_period_bytes(substream);
  784. #endif
  785. snd_azf3328_dbgcallenter();
  786. #if 0
  787. snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
  788. runtime->rate,
  789. snd_pcm_format_width(runtime->format),
  790. runtime->channels);
  791. snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
  792. #endif
  793. snd_azf3328_dbgcallleave();
  794. return 0;
  795. }
  796. static int
  797. snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
  798. {
  799. azf3328_t *chip = snd_pcm_substream_chip(substream);
  800. snd_pcm_runtime_t *runtime = substream->runtime;
  801. int result = 0;
  802. unsigned int status1;
  803. snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
  804. switch (cmd) {
  805. case SNDRV_PCM_TRIGGER_START:
  806. snd_azf3328_dbgplay("START PLAYBACK\n");
  807. /* mute WaveOut */
  808. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
  809. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
  810. runtime->rate,
  811. snd_pcm_format_width(runtime->format),
  812. runtime->channels);
  813. spin_lock(&chip->reg_lock);
  814. /* stop playback */
  815. status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
  816. status1 &= ~DMA_RESUME;
  817. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  818. /* FIXME: clear interrupts or what??? */
  819. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff);
  820. spin_unlock(&chip->reg_lock);
  821. snd_azf3328_setdmaa(chip, runtime->dma_addr,
  822. snd_pcm_lib_period_bytes(substream),
  823. snd_pcm_lib_buffer_bytes(substream),
  824. 0);
  825. spin_lock(&chip->reg_lock);
  826. #ifdef WIN9X
  827. /* FIXME: enable playback/recording??? */
  828. status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
  829. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  830. /* start playback again */
  831. /* FIXME: what is this value (0x0010)??? */
  832. status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
  833. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  834. #else /* NT4 */
  835. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
  836. 0x0000);
  837. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
  838. DMA_PLAY_SOMETHING1);
  839. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
  840. DMA_PLAY_SOMETHING1 |
  841. DMA_PLAY_SOMETHING2);
  842. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
  843. DMA_RESUME |
  844. SOMETHING_ALMOST_ALWAYS_SET |
  845. DMA_EPILOGUE_SOMETHING |
  846. DMA_SOMETHING_ELSE);
  847. #endif
  848. spin_unlock(&chip->reg_lock);
  849. /* now unmute WaveOut */
  850. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
  851. chip->is_playing = 1;
  852. snd_azf3328_dbgplay("STARTED PLAYBACK\n");
  853. break;
  854. case SNDRV_PCM_TRIGGER_STOP:
  855. snd_azf3328_dbgplay("STOP PLAYBACK\n");
  856. /* mute WaveOut */
  857. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
  858. spin_lock(&chip->reg_lock);
  859. /* stop playback */
  860. status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
  861. status1 &= ~DMA_RESUME;
  862. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  863. /* hmm, is this really required? we're resetting the same bit
  864. * immediately thereafter... */
  865. status1 |= DMA_PLAY_SOMETHING1;
  866. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  867. status1 &= ~DMA_PLAY_SOMETHING1;
  868. snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
  869. spin_unlock(&chip->reg_lock);
  870. /* now unmute WaveOut */
  871. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
  872. chip->is_playing = 0;
  873. snd_azf3328_dbgplay("STOPPED PLAYBACK\n");
  874. break;
  875. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  876. snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
  877. break;
  878. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  879. snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
  880. break;
  881. default:
  882. return -EINVAL;
  883. }
  884. snd_azf3328_dbgcallleave();
  885. return result;
  886. }
  887. /* this is just analogous to playback; I'm not quite sure whether recording
  888. * should actually be triggered like that */
  889. static int
  890. snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
  891. {
  892. azf3328_t *chip = snd_pcm_substream_chip(substream);
  893. snd_pcm_runtime_t *runtime = substream->runtime;
  894. int result = 0;
  895. unsigned int status1;
  896. snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
  897. switch (cmd) {
  898. case SNDRV_PCM_TRIGGER_START:
  899. snd_azf3328_dbgplay("START CAPTURE\n");
  900. snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
  901. runtime->rate,
  902. snd_pcm_format_width(runtime->format),
  903. runtime->channels);
  904. spin_lock(&chip->reg_lock);
  905. /* stop recording */
  906. status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
  907. status1 &= ~DMA_RESUME;
  908. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  909. /* FIXME: clear interrupts or what??? */
  910. snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff);
  911. spin_unlock(&chip->reg_lock);
  912. snd_azf3328_setdmaa(chip, runtime->dma_addr,
  913. snd_pcm_lib_period_bytes(substream),
  914. snd_pcm_lib_buffer_bytes(substream),
  915. 1);
  916. spin_lock(&chip->reg_lock);
  917. #ifdef WIN9X
  918. /* FIXME: enable playback/recording??? */
  919. status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
  920. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  921. /* start capture again */
  922. /* FIXME: what is this value (0x0010)??? */
  923. status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
  924. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  925. #else
  926. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
  927. 0x0000);
  928. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
  929. DMA_PLAY_SOMETHING1);
  930. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
  931. DMA_PLAY_SOMETHING1 |
  932. DMA_PLAY_SOMETHING2);
  933. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
  934. DMA_RESUME |
  935. SOMETHING_ALMOST_ALWAYS_SET |
  936. DMA_EPILOGUE_SOMETHING |
  937. DMA_SOMETHING_ELSE);
  938. #endif
  939. spin_unlock(&chip->reg_lock);
  940. chip->is_recording = 1;
  941. snd_azf3328_dbgplay("STARTED CAPTURE\n");
  942. break;
  943. case SNDRV_PCM_TRIGGER_STOP:
  944. snd_azf3328_dbgplay("STOP CAPTURE\n");
  945. spin_lock(&chip->reg_lock);
  946. /* stop recording */
  947. status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
  948. status1 &= ~DMA_RESUME;
  949. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  950. status1 |= DMA_PLAY_SOMETHING1;
  951. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  952. status1 &= ~DMA_PLAY_SOMETHING1;
  953. snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
  954. spin_unlock(&chip->reg_lock);
  955. chip->is_recording = 0;
  956. snd_azf3328_dbgplay("STOPPED CAPTURE\n");
  957. break;
  958. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  959. snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
  960. break;
  961. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  962. snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
  963. break;
  964. default:
  965. return -EINVAL;
  966. }
  967. snd_azf3328_dbgcallleave();
  968. return result;
  969. }
  970. static snd_pcm_uframes_t
  971. snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
  972. {
  973. azf3328_t *chip = snd_pcm_substream_chip(substream);
  974. unsigned long bufptr, result;
  975. snd_pcm_uframes_t frmres;
  976. #ifdef QUERY_HARDWARE
  977. bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
  978. #else
  979. bufptr = substream->runtime->dma_addr;
  980. #endif
  981. result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
  982. /* calculate offset */
  983. result -= bufptr;
  984. frmres = bytes_to_frames( substream->runtime, result);
  985. snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres);
  986. return frmres;
  987. }
  988. static snd_pcm_uframes_t
  989. snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
  990. {
  991. azf3328_t *chip = snd_pcm_substream_chip(substream);
  992. unsigned long bufptr, result;
  993. snd_pcm_uframes_t frmres;
  994. #ifdef QUERY_HARDWARE
  995. bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
  996. #else
  997. bufptr = substream->runtime->dma_addr;
  998. #endif
  999. result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
  1000. /* calculate offset */
  1001. result -= bufptr;
  1002. frmres = bytes_to_frames( substream->runtime, result);
  1003. snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres);
  1004. return frmres;
  1005. }
  1006. static irqreturn_t
  1007. snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1008. {
  1009. azf3328_t *chip = dev_id;
  1010. u8 status, which;
  1011. static unsigned long irq_count;
  1012. status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS);
  1013. /* fast path out, to ease interrupt sharing */
  1014. if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER)))
  1015. return IRQ_NONE; /* must be interrupt for another device */
  1016. snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n",
  1017. irq_count,
  1018. snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS),
  1019. snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE),
  1020. status);
  1021. if (status & IRQ_TIMER)
  1022. {
  1023. /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */
  1024. if (chip->timer)
  1025. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  1026. /* ACK timer */
  1027. spin_lock(&chip->reg_lock);
  1028. snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
  1029. spin_unlock(&chip->reg_lock);
  1030. snd_azf3328_dbgplay("azt3328: timer IRQ\n");
  1031. }
  1032. if (status & IRQ_PLAYBACK)
  1033. {
  1034. spin_lock(&chip->reg_lock);
  1035. which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE);
  1036. /* ack all IRQ types immediately */
  1037. snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which);
  1038. spin_unlock(&chip->reg_lock);
  1039. if (chip->pcm && chip->playback_substream)
  1040. {
  1041. snd_pcm_period_elapsed(chip->playback_substream);
  1042. snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n",
  1043. which,
  1044. inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
  1045. }
  1046. else
  1047. snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
  1048. if (which & IRQ_PLAY_SOMETHING)
  1049. snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
  1050. }
  1051. if (status & IRQ_RECORDING)
  1052. {
  1053. spin_lock(&chip->reg_lock);
  1054. which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE);
  1055. /* ack all IRQ types immediately */
  1056. snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which);
  1057. spin_unlock(&chip->reg_lock);
  1058. if (chip->pcm && chip->capture_substream)
  1059. {
  1060. snd_pcm_period_elapsed(chip->capture_substream);
  1061. snd_azf3328_dbgplay("REC period done (#%x), @ %x\n",
  1062. which,
  1063. inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
  1064. }
  1065. else
  1066. snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
  1067. if (which & IRQ_REC_SOMETHING)
  1068. snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
  1069. }
  1070. /* MPU401 has less critical IRQ requirements
  1071. * than timer and playback/recording, right? */
  1072. if (status & IRQ_MPU401)
  1073. {
  1074. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  1075. /* hmm, do we have to ack the IRQ here somehow?
  1076. * If so, then I don't know how... */
  1077. snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n");
  1078. }
  1079. irq_count++;
  1080. return IRQ_HANDLED;
  1081. }
  1082. /*****************************************************************/
  1083. static const snd_pcm_hardware_t snd_azf3328_playback =
  1084. {
  1085. /* FIXME!! Correct? */
  1086. .info = SNDRV_PCM_INFO_MMAP |
  1087. SNDRV_PCM_INFO_INTERLEAVED |
  1088. SNDRV_PCM_INFO_MMAP_VALID,
  1089. .formats = SNDRV_PCM_FMTBIT_S8 |
  1090. SNDRV_PCM_FMTBIT_U8 |
  1091. SNDRV_PCM_FMTBIT_S16_LE |
  1092. SNDRV_PCM_FMTBIT_U16_LE,
  1093. .rates = SNDRV_PCM_RATE_5512 |
  1094. SNDRV_PCM_RATE_8000_48000 |
  1095. SNDRV_PCM_RATE_KNOT,
  1096. .rate_min = 4000,
  1097. .rate_max = 66200,
  1098. .channels_min = 1,
  1099. .channels_max = 2,
  1100. .buffer_bytes_max = 65536,
  1101. .period_bytes_min = 64,
  1102. .period_bytes_max = 65536,
  1103. .periods_min = 1,
  1104. .periods_max = 1024,
  1105. /* FIXME: maybe that card actually has a FIFO?
  1106. * Hmm, it seems newer revisions do have one, but we still don't know
  1107. * its size... */
  1108. .fifo_size = 0,
  1109. };
  1110. static const snd_pcm_hardware_t snd_azf3328_capture =
  1111. {
  1112. /* FIXME */
  1113. .info = SNDRV_PCM_INFO_MMAP |
  1114. SNDRV_PCM_INFO_INTERLEAVED |
  1115. SNDRV_PCM_INFO_MMAP_VALID,
  1116. .formats = SNDRV_PCM_FMTBIT_S8 |
  1117. SNDRV_PCM_FMTBIT_U8 |
  1118. SNDRV_PCM_FMTBIT_S16_LE |
  1119. SNDRV_PCM_FMTBIT_U16_LE,
  1120. .rates = SNDRV_PCM_RATE_5512 |
  1121. SNDRV_PCM_RATE_8000_48000 |
  1122. SNDRV_PCM_RATE_KNOT,
  1123. .rate_min = 4000,
  1124. .rate_max = 66200,
  1125. .channels_min = 1,
  1126. .channels_max = 2,
  1127. .buffer_bytes_max = 65536,
  1128. .period_bytes_min = 64,
  1129. .period_bytes_max = 65536,
  1130. .periods_min = 1,
  1131. .periods_max = 1024,
  1132. .fifo_size = 0,
  1133. };
  1134. static unsigned int snd_azf3328_fixed_rates[] = {
  1135. 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000,
  1136. 44100, 48000, 66200 };
  1137. static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
  1138. .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
  1139. .list = snd_azf3328_fixed_rates,
  1140. .mask = 0,
  1141. };
  1142. /*****************************************************************/
  1143. static int
  1144. snd_azf3328_playback_open(snd_pcm_substream_t * substream)
  1145. {
  1146. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1147. snd_pcm_runtime_t *runtime = substream->runtime;
  1148. snd_azf3328_dbgcallenter();
  1149. chip->playback_substream = substream;
  1150. runtime->hw = snd_azf3328_playback;
  1151. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  1152. &snd_azf3328_hw_constraints_rates);
  1153. snd_azf3328_dbgcallleave();
  1154. return 0;
  1155. }
  1156. static int
  1157. snd_azf3328_capture_open(snd_pcm_substream_t * substream)
  1158. {
  1159. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1160. snd_pcm_runtime_t *runtime = substream->runtime;
  1161. snd_azf3328_dbgcallenter();
  1162. chip->capture_substream = substream;
  1163. runtime->hw = snd_azf3328_capture;
  1164. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  1165. &snd_azf3328_hw_constraints_rates);
  1166. snd_azf3328_dbgcallleave();
  1167. return 0;
  1168. }
  1169. static int
  1170. snd_azf3328_playback_close(snd_pcm_substream_t * substream)
  1171. {
  1172. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1173. snd_azf3328_dbgcallenter();
  1174. chip->playback_substream = NULL;
  1175. snd_azf3328_dbgcallleave();
  1176. return 0;
  1177. }
  1178. static int
  1179. snd_azf3328_capture_close(snd_pcm_substream_t * substream)
  1180. {
  1181. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1182. snd_azf3328_dbgcallenter();
  1183. chip->capture_substream = NULL;
  1184. snd_azf3328_dbgcallleave();
  1185. return 0;
  1186. }
  1187. /******************************************************************/
  1188. static snd_pcm_ops_t snd_azf3328_playback_ops = {
  1189. .open = snd_azf3328_playback_open,
  1190. .close = snd_azf3328_playback_close,
  1191. .ioctl = snd_pcm_lib_ioctl,
  1192. .hw_params = snd_azf3328_hw_params,
  1193. .hw_free = snd_azf3328_hw_free,
  1194. .prepare = snd_azf3328_playback_prepare,
  1195. .trigger = snd_azf3328_playback_trigger,
  1196. .pointer = snd_azf3328_playback_pointer
  1197. };
  1198. static snd_pcm_ops_t snd_azf3328_capture_ops = {
  1199. .open = snd_azf3328_capture_open,
  1200. .close = snd_azf3328_capture_close,
  1201. .ioctl = snd_pcm_lib_ioctl,
  1202. .hw_params = snd_azf3328_hw_params,
  1203. .hw_free = snd_azf3328_hw_free,
  1204. .prepare = snd_azf3328_capture_prepare,
  1205. .trigger = snd_azf3328_capture_trigger,
  1206. .pointer = snd_azf3328_capture_pointer
  1207. };
  1208. static void
  1209. snd_azf3328_pcm_free(snd_pcm_t *pcm)
  1210. {
  1211. azf3328_t *chip = pcm->private_data;
  1212. chip->pcm = NULL;
  1213. snd_pcm_lib_preallocate_free_for_all(pcm);
  1214. }
  1215. static int __devinit
  1216. snd_azf3328_pcm(azf3328_t *chip, int device)
  1217. {
  1218. snd_pcm_t *pcm;
  1219. int err;
  1220. snd_azf3328_dbgcallenter();
  1221. if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
  1222. return err;
  1223. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
  1224. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
  1225. pcm->private_data = chip;
  1226. pcm->private_free = snd_azf3328_pcm_free;
  1227. pcm->info_flags = 0;
  1228. strcpy(pcm->name, chip->card->shortname);
  1229. chip->pcm = pcm;
  1230. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1231. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  1232. snd_azf3328_dbgcallleave();
  1233. return 0;
  1234. }
  1235. /******************************************************************/
  1236. #ifdef SUPPORT_JOYSTICK
  1237. static int __devinit
  1238. snd_azf3328_config_joystick(azf3328_t *chip, int dev)
  1239. {
  1240. struct gameport *gp;
  1241. struct resource *r;
  1242. if (!joystick[dev])
  1243. return -ENODEV;
  1244. if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
  1245. printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
  1246. return -EBUSY;
  1247. }
  1248. chip->gameport = gp = gameport_allocate_port();
  1249. if (!gp) {
  1250. printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
  1251. release_and_free_resource(r);
  1252. return -ENOMEM;
  1253. }
  1254. gameport_set_name(gp, "AZF3328 Gameport");
  1255. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1256. gameport_set_dev_parent(gp, &chip->pci->dev);
  1257. gp->io = 0x200;
  1258. gameport_set_port_data(gp, r);
  1259. snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
  1260. snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
  1261. gameport_register_port(chip->gameport);
  1262. return 0;
  1263. }
  1264. static void
  1265. snd_azf3328_free_joystick(azf3328_t *chip)
  1266. {
  1267. if (chip->gameport) {
  1268. struct resource *r = gameport_get_port_data(chip->gameport);
  1269. gameport_unregister_port(chip->gameport);
  1270. chip->gameport = NULL;
  1271. /* disable gameport */
  1272. snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
  1273. snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
  1274. release_and_free_resource(r);
  1275. }
  1276. }
  1277. #else
  1278. static inline int
  1279. snd_azf3328_config_joystick(azf3328_t *chip, int dev) { return -ENOSYS; }
  1280. static inline void
  1281. snd_azf3328_free_joystick(azf3328_t *chip) { }
  1282. #endif
  1283. /******************************************************************/
  1284. static int
  1285. snd_azf3328_free(azf3328_t *chip)
  1286. {
  1287. if (chip->irq < 0)
  1288. goto __end_hw;
  1289. /* reset (close) mixer */
  1290. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
  1291. snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
  1292. /* interrupt setup - mask everything (FIXME!) */
  1293. /* well, at least we know how to disable the timer IRQ */
  1294. snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00);
  1295. synchronize_irq(chip->irq);
  1296. __end_hw:
  1297. snd_azf3328_free_joystick(chip);
  1298. if (chip->irq >= 0)
  1299. free_irq(chip->irq, (void *)chip);
  1300. pci_release_regions(chip->pci);
  1301. pci_disable_device(chip->pci);
  1302. kfree(chip);
  1303. return 0;
  1304. }
  1305. static int
  1306. snd_azf3328_dev_free(snd_device_t *device)
  1307. {
  1308. azf3328_t *chip = device->device_data;
  1309. return snd_azf3328_free(chip);
  1310. }
  1311. /******************************************************************/
  1312. /*** NOTE: the physical timer resolution actually is 1024000 ticks per second,
  1313. *** but announcing those attributes to user-space would make programs
  1314. *** configure the timer to a 1 tick value, resulting in an absolutely fatal
  1315. *** timer IRQ storm.
  1316. *** Thus I chose to announce a down-scaled virtual timer to the outside and
  1317. *** calculate real timer countdown values internally.
  1318. *** (the scale factor can be set via module parameter "seqtimer_scaling").
  1319. ***/
  1320. static int
  1321. snd_azf3328_timer_start(snd_timer_t *timer)
  1322. {
  1323. azf3328_t *chip;
  1324. unsigned long flags;
  1325. unsigned int delay;
  1326. snd_azf3328_dbgcallenter();
  1327. chip = snd_timer_chip(timer);
  1328. delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK;
  1329. if (delay < 49)
  1330. {
  1331. /* uhoh, that's not good, since user-space won't know about
  1332. * this timing tweak
  1333. * (we need to do it to avoid a lockup, though) */
  1334. snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay);
  1335. delay = 49; /* minimum time is 49 ticks */
  1336. }
  1337. snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay);
  1338. delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ;
  1339. spin_lock_irqsave(&chip->reg_lock, flags);
  1340. snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay);
  1341. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1342. snd_azf3328_dbgcallleave();
  1343. return 0;
  1344. }
  1345. static int
  1346. snd_azf3328_timer_stop(snd_timer_t *timer)
  1347. {
  1348. azf3328_t *chip;
  1349. unsigned long flags;
  1350. snd_azf3328_dbgcallenter();
  1351. chip = snd_timer_chip(timer);
  1352. spin_lock_irqsave(&chip->reg_lock, flags);
  1353. /* disable timer countdown and interrupt */
  1354. /* FIXME: should we write TIMER_ACK_IRQ here? */
  1355. snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
  1356. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1357. snd_azf3328_dbgcallleave();
  1358. return 0;
  1359. }
  1360. static int
  1361. snd_azf3328_timer_precise_resolution(snd_timer_t *timer,
  1362. unsigned long *num, unsigned long *den)
  1363. {
  1364. snd_azf3328_dbgcallenter();
  1365. *num = 1;
  1366. *den = 1024000 / seqtimer_scaling;
  1367. snd_azf3328_dbgcallleave();
  1368. return 0;
  1369. }
  1370. static struct _snd_timer_hardware snd_azf3328_timer_hw = {
  1371. .flags = SNDRV_TIMER_HW_AUTO,
  1372. .resolution = 977, /* 1000000/1024000 = 0.9765625us */
  1373. .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */
  1374. .start = snd_azf3328_timer_start,
  1375. .stop = snd_azf3328_timer_stop,
  1376. .precise_resolution = snd_azf3328_timer_precise_resolution,
  1377. };
  1378. static int __devinit
  1379. snd_azf3328_timer(azf3328_t *chip, int device)
  1380. {
  1381. snd_timer_t *timer = NULL;
  1382. snd_timer_id_t tid;
  1383. int err;
  1384. snd_azf3328_dbgcallenter();
  1385. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1386. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1387. tid.card = chip->card->number;
  1388. tid.device = device;
  1389. tid.subdevice = 0;
  1390. snd_azf3328_timer_hw.resolution *= seqtimer_scaling;
  1391. snd_azf3328_timer_hw.ticks /= seqtimer_scaling;
  1392. if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) {
  1393. goto out;
  1394. }
  1395. strcpy(timer->name, "AZF3328 timer");
  1396. timer->private_data = chip;
  1397. timer->hw = snd_azf3328_timer_hw;
  1398. chip->timer = timer;
  1399. err = 0;
  1400. out:
  1401. snd_azf3328_dbgcallleave();
  1402. return err;
  1403. }
  1404. /******************************************************************/
  1405. #if 0
  1406. /* check whether a bit can be modified */
  1407. static void
  1408. snd_azf3328_test_bit(unsigned int reg, int bit)
  1409. {
  1410. unsigned char val, valoff, valon;
  1411. val = inb(reg);
  1412. outb(val & ~(1 << bit), reg);
  1413. valoff = inb(reg);
  1414. outb(val|(1 << bit), reg);
  1415. valon = inb(reg);
  1416. outb(val, reg);
  1417. printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
  1418. }
  1419. #endif
  1420. static void
  1421. snd_azf3328_debug_show_ports(const azf3328_t *chip)
  1422. {
  1423. #if DEBUG_MISC
  1424. u16 tmp;
  1425. snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
  1426. snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5));
  1427. for (tmp=0; tmp <= 0x01; tmp += 1)
  1428. snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
  1429. for (tmp = 0; tmp <= 0x6E; tmp += 2)
  1430. snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp));
  1431. #endif
  1432. }
  1433. static int __devinit
  1434. snd_azf3328_create(snd_card_t * card,
  1435. struct pci_dev *pci,
  1436. unsigned long device_type,
  1437. azf3328_t ** rchip)
  1438. {
  1439. azf3328_t *chip;
  1440. int err;
  1441. static snd_device_ops_t ops = {
  1442. .dev_free = snd_azf3328_dev_free,
  1443. };
  1444. u16 tmp;
  1445. *rchip = NULL;
  1446. if ((err = pci_enable_device(pci)) < 0)
  1447. return err;
  1448. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1449. if (chip == NULL) {
  1450. err = -ENOMEM;
  1451. goto out_err;
  1452. }
  1453. spin_lock_init(&chip->reg_lock);
  1454. chip->card = card;
  1455. chip->pci = pci;
  1456. chip->irq = -1;
  1457. /* check if we can restrict PCI DMA transfers to 24 bits */
  1458. if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
  1459. pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
  1460. snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
  1461. err = -ENXIO;
  1462. goto out_err;
  1463. }
  1464. if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
  1465. goto out_err;
  1466. }
  1467. chip->codec_port = pci_resource_start(pci, 0);
  1468. chip->io2_port = pci_resource_start(pci, 1);
  1469. chip->mpu_port = pci_resource_start(pci, 2);
  1470. chip->synth_port = pci_resource_start(pci, 3);
  1471. chip->mixer_port = pci_resource_start(pci, 4);
  1472. if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
  1473. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1474. err = -EBUSY;
  1475. goto out_err;
  1476. }
  1477. chip->irq = pci->irq;
  1478. pci_set_master(pci);
  1479. synchronize_irq(chip->irq);
  1480. snd_azf3328_debug_show_ports(chip);
  1481. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1482. goto out_err;
  1483. }
  1484. /* create mixer interface & switches */
  1485. if ((err = snd_azf3328_mixer_new(chip)) < 0)
  1486. goto out_err;
  1487. #if 0
  1488. /* set very low bitrate to reduce noise and power consumption? */
  1489. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
  1490. #endif
  1491. /* standard chip init stuff */
  1492. /* default IRQ init value */
  1493. tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
  1494. spin_lock_irq(&chip->reg_lock);
  1495. snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp);
  1496. snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp);
  1497. snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp);
  1498. snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */
  1499. spin_unlock_irq(&chip->reg_lock);
  1500. snd_card_set_dev(card, &pci->dev);
  1501. *rchip = chip;
  1502. err = 0;
  1503. goto out;
  1504. out_err:
  1505. if (chip)
  1506. snd_azf3328_free(chip);
  1507. pci_disable_device(pci);
  1508. out:
  1509. return err;
  1510. }
  1511. static int __devinit
  1512. snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
  1513. {
  1514. static int dev;
  1515. snd_card_t *card;
  1516. azf3328_t *chip;
  1517. opl3_t *opl3;
  1518. int err;
  1519. snd_azf3328_dbgcallenter();
  1520. if (dev >= SNDRV_CARDS)
  1521. return -ENODEV;
  1522. if (!enable[dev]) {
  1523. dev++;
  1524. return -ENOENT;
  1525. }
  1526. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
  1527. if (card == NULL)
  1528. return -ENOMEM;
  1529. strcpy(card->driver, "AZF3328");
  1530. strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
  1531. if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
  1532. goto out_err;
  1533. }
  1534. if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
  1535. chip->mpu_port, 1, pci->irq, 0,
  1536. &chip->rmidi)) < 0) {
  1537. snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
  1538. goto out_err;
  1539. }
  1540. if ((err = snd_azf3328_timer(chip, 0)) < 0) {
  1541. goto out_err;
  1542. }
  1543. if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
  1544. goto out_err;
  1545. }
  1546. if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
  1547. OPL3_HW_AUTO, 1, &opl3) < 0) {
  1548. snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
  1549. chip->synth_port, chip->synth_port+2 );
  1550. } else {
  1551. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1552. goto out_err;
  1553. }
  1554. }
  1555. sprintf(card->longname, "%s at 0x%lx, irq %i",
  1556. card->shortname, chip->codec_port, chip->irq);
  1557. if ((err = snd_card_register(card)) < 0) {
  1558. goto out_err;
  1559. }
  1560. #ifdef MODULE
  1561. printk(
  1562. "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n"
  1563. "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n"
  1564. "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n"
  1565. "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n",
  1566. 1024000 / seqtimer_scaling, seqtimer_scaling);
  1567. #endif
  1568. if (snd_azf3328_config_joystick(chip, dev) < 0)
  1569. snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR,
  1570. snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
  1571. pci_set_drvdata(pci, card);
  1572. dev++;
  1573. err = 0;
  1574. goto out;
  1575. out_err:
  1576. snd_card_free(card);
  1577. out:
  1578. snd_azf3328_dbgcallleave();
  1579. return err;
  1580. }
  1581. static void __devexit
  1582. snd_azf3328_remove(struct pci_dev *pci)
  1583. {
  1584. snd_azf3328_dbgcallenter();
  1585. snd_card_free(pci_get_drvdata(pci));
  1586. pci_set_drvdata(pci, NULL);
  1587. snd_azf3328_dbgcallleave();
  1588. }
  1589. static struct pci_driver driver = {
  1590. .name = "AZF3328",
  1591. .id_table = snd_azf3328_ids,
  1592. .probe = snd_azf3328_probe,
  1593. .remove = __devexit_p(snd_azf3328_remove),
  1594. };
  1595. static int __init
  1596. alsa_card_azf3328_init(void)
  1597. {
  1598. int err;
  1599. snd_azf3328_dbgcallenter();
  1600. err = pci_register_driver(&driver);
  1601. snd_azf3328_dbgcallleave();
  1602. return err;
  1603. }
  1604. static void __exit
  1605. alsa_card_azf3328_exit(void)
  1606. {
  1607. snd_azf3328_dbgcallenter();
  1608. pci_unregister_driver(&driver);
  1609. snd_azf3328_dbgcallleave();
  1610. }
  1611. module_init(alsa_card_azf3328_init)
  1612. module_exit(alsa_card_azf3328_exit)