synch.h 1.0 KB

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  1. #ifndef _ASM_POWERPC_SYNCH_H
  2. #define _ASM_POWERPC_SYNCH_H
  3. #include <linux/config.h>
  4. #ifdef __powerpc64__
  5. #define __SUBARCH_HAS_LWSYNC
  6. #endif
  7. #ifdef __SUBARCH_HAS_LWSYNC
  8. # define LWSYNC lwsync
  9. #else
  10. # define LWSYNC sync
  11. #endif
  12. /*
  13. * Arguably the bitops and *xchg operations don't imply any memory barrier
  14. * or SMP ordering, but in fact a lot of drivers expect them to imply
  15. * both, since they do on x86 cpus.
  16. */
  17. #ifdef CONFIG_SMP
  18. #define EIEIO_ON_SMP "eieio\n"
  19. #define ISYNC_ON_SMP "\n\tisync"
  20. #define SYNC_ON_SMP __stringify(LWSYNC) "\n"
  21. #else
  22. #define EIEIO_ON_SMP
  23. #define ISYNC_ON_SMP
  24. #define SYNC_ON_SMP
  25. #endif
  26. static inline void eieio(void)
  27. {
  28. __asm__ __volatile__ ("eieio" : : : "memory");
  29. }
  30. static inline void isync(void)
  31. {
  32. __asm__ __volatile__ ("isync" : : : "memory");
  33. }
  34. #ifdef CONFIG_SMP
  35. #define eieio_on_smp() eieio()
  36. #define isync_on_smp() isync()
  37. #else
  38. #define eieio_on_smp() __asm__ __volatile__("": : :"memory")
  39. #define isync_on_smp() __asm__ __volatile__("": : :"memory")
  40. #endif
  41. #endif /* _ASM_POWERPC_SYNCH_H */