pci-bridge.h 4.3 KB

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  1. #ifndef _ASM_POWERPC_PCI_BRIDGE_H
  2. #define _ASM_POWERPC_PCI_BRIDGE_H
  3. #ifndef CONFIG_PPC64
  4. #include <asm-ppc/pci-bridge.h>
  5. #else
  6. #include <linux/pci.h>
  7. #include <linux/list.h>
  8. /*
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * Structure of a PCI controller (host bridge)
  16. */
  17. struct pci_controller {
  18. struct pci_bus *bus;
  19. char is_dynamic;
  20. void *arch_data;
  21. struct list_head list_node;
  22. int first_busno;
  23. int last_busno;
  24. void __iomem *io_base_virt;
  25. unsigned long io_base_phys;
  26. /* Some machines have a non 1:1 mapping of
  27. * the PCI memory space in the CPU bus space
  28. */
  29. unsigned long pci_mem_offset;
  30. unsigned long pci_io_size;
  31. struct pci_ops *ops;
  32. volatile unsigned int __iomem *cfg_addr;
  33. volatile void __iomem *cfg_data;
  34. /* Currently, we limit ourselves to 1 IO range and 3 mem
  35. * ranges since the common pci_bus structure can't handle more
  36. */
  37. struct resource io_resource;
  38. struct resource mem_resources[3];
  39. int global_number;
  40. int local_number;
  41. unsigned long buid;
  42. unsigned long dma_window_base_cur;
  43. unsigned long dma_window_size;
  44. };
  45. /*
  46. * PCI stuff, for nodes representing PCI devices, pointed to
  47. * by device_node->data.
  48. */
  49. struct pci_controller;
  50. struct iommu_table;
  51. struct pci_dn {
  52. int busno; /* for pci devices */
  53. int bussubno; /* for pci devices */
  54. int devfn; /* for pci devices */
  55. #ifdef CONFIG_PPC_PSERIES
  56. int eeh_mode; /* See eeh.h for possible EEH_MODEs */
  57. int eeh_config_addr;
  58. int eeh_check_count; /* # times driver ignored error */
  59. int eeh_freeze_count; /* # times this device froze up. */
  60. int eeh_is_bridge; /* device is pci-to-pci bridge */
  61. #endif
  62. int pci_ext_config_space; /* for pci devices */
  63. struct pci_controller *phb; /* for pci devices */
  64. struct iommu_table *iommu_table; /* for phb's or bridges */
  65. struct pci_dev *pcidev; /* back-pointer to the pci device */
  66. struct device_node *node; /* back-pointer to the device_node */
  67. #ifdef CONFIG_PPC_ISERIES
  68. struct list_head Device_List;
  69. int Irq; /* Assigned IRQ */
  70. int Flags; /* Possible flags(disable/bist)*/
  71. u8 LogicalSlot; /* Hv Slot Index for Tces */
  72. #endif
  73. u32 config_space[16]; /* saved PCI config space */
  74. };
  75. /* Get the pointer to a device_node's pci_dn */
  76. #define PCI_DN(dn) ((struct pci_dn *) (dn)->data)
  77. struct device_node *fetch_dev_dn(struct pci_dev *dev);
  78. /* Get a device_node from a pci_dev. This code must be fast except
  79. * in the case where the sysdata is incorrect and needs to be fixed
  80. * up (this will only happen once).
  81. * In this case the sysdata will have been inherited from a PCI host
  82. * bridge or a PCI-PCI bridge further up the tree, so it will point
  83. * to a valid struct pci_dn, just not the one we want.
  84. */
  85. static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
  86. {
  87. struct device_node *dn = dev->sysdata;
  88. struct pci_dn *pdn = dn->data;
  89. if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number)
  90. return dn; /* fast path. sysdata is good */
  91. return fetch_dev_dn(dev);
  92. }
  93. static inline int pci_device_from_OF_node(struct device_node *np,
  94. u8 *bus, u8 *devfn)
  95. {
  96. if (!PCI_DN(np))
  97. return -ENODEV;
  98. *bus = PCI_DN(np)->busno;
  99. *devfn = PCI_DN(np)->devfn;
  100. return 0;
  101. }
  102. static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
  103. {
  104. if (bus->self)
  105. return pci_device_to_OF_node(bus->self);
  106. else
  107. return bus->sysdata; /* Must be root bus (PHB) */
  108. }
  109. extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
  110. struct device_node *dev, int primary);
  111. extern int pcibios_remove_root_bus(struct pci_controller *phb);
  112. extern void phbs_remap_io(void);
  113. static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
  114. {
  115. struct device_node *busdn = bus->sysdata;
  116. BUG_ON(busdn == NULL);
  117. return PCI_DN(busdn)->phb;
  118. }
  119. extern struct pci_controller *
  120. pcibios_alloc_controller(struct device_node *dev);
  121. extern void pcibios_free_controller(struct pci_controller *phb);
  122. /* Return values for ppc_md.pci_probe_mode function */
  123. #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
  124. #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
  125. #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
  126. #endif /* CONFIG_PPC64 */
  127. #endif