io.h 14 KB

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  1. #ifndef _ASM_POWERPC_IO_H
  2. #define _ASM_POWERPC_IO_H
  3. /*
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. */
  9. #ifndef CONFIG_PPC64
  10. #include <asm-ppc/io.h>
  11. #else
  12. #include <linux/compiler.h>
  13. #include <asm/page.h>
  14. #include <asm/byteorder.h>
  15. #ifdef CONFIG_PPC_ISERIES
  16. #include <asm/iseries/iseries_io.h>
  17. #endif
  18. #include <asm/synch.h>
  19. #include <asm/delay.h>
  20. #include <asm-generic/iomap.h>
  21. #define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
  22. #define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
  23. #define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
  24. #define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
  25. #define SIO_CONFIG_RA 0x398
  26. #define SIO_CONFIG_RD 0x399
  27. #define SLOW_DOWN_IO
  28. extern unsigned long isa_io_base;
  29. extern unsigned long pci_io_base;
  30. extern unsigned long io_page_mask;
  31. #define MAX_ISA_PORT 0x10000
  32. #define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) \
  33. & io_page_mask)
  34. #ifdef CONFIG_PPC_ISERIES
  35. /* __raw_* accessors aren't supported on iSeries */
  36. #define __raw_readb(addr) { BUG(); 0; }
  37. #define __raw_readw(addr) { BUG(); 0; }
  38. #define __raw_readl(addr) { BUG(); 0; }
  39. #define __raw_readq(addr) { BUG(); 0; }
  40. #define __raw_writeb(v, addr) { BUG(); 0; }
  41. #define __raw_writew(v, addr) { BUG(); 0; }
  42. #define __raw_writel(v, addr) { BUG(); 0; }
  43. #define __raw_writeq(v, addr) { BUG(); 0; }
  44. #define readb(addr) iSeries_Read_Byte(addr)
  45. #define readw(addr) iSeries_Read_Word(addr)
  46. #define readl(addr) iSeries_Read_Long(addr)
  47. #define writeb(data, addr) iSeries_Write_Byte((data),(addr))
  48. #define writew(data, addr) iSeries_Write_Word((data),(addr))
  49. #define writel(data, addr) iSeries_Write_Long((data),(addr))
  50. #define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
  51. #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
  52. #define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
  53. #define inb(addr) readb(((void __iomem *)(long)(addr)))
  54. #define inw(addr) readw(((void __iomem *)(long)(addr)))
  55. #define inl(addr) readl(((void __iomem *)(long)(addr)))
  56. #define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
  57. #define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
  58. #define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
  59. /*
  60. * The *_ns versions below don't do byte-swapping.
  61. * Neither do the standard versions now, these are just here
  62. * for older code.
  63. */
  64. #define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  65. #define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  66. #else
  67. static inline unsigned char __raw_readb(const volatile void __iomem *addr)
  68. {
  69. return *(volatile unsigned char __force *)addr;
  70. }
  71. static inline unsigned short __raw_readw(const volatile void __iomem *addr)
  72. {
  73. return *(volatile unsigned short __force *)addr;
  74. }
  75. static inline unsigned int __raw_readl(const volatile void __iomem *addr)
  76. {
  77. return *(volatile unsigned int __force *)addr;
  78. }
  79. static inline unsigned long __raw_readq(const volatile void __iomem *addr)
  80. {
  81. return *(volatile unsigned long __force *)addr;
  82. }
  83. static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
  84. {
  85. *(volatile unsigned char __force *)addr = v;
  86. }
  87. static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
  88. {
  89. *(volatile unsigned short __force *)addr = v;
  90. }
  91. static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
  92. {
  93. *(volatile unsigned int __force *)addr = v;
  94. }
  95. static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
  96. {
  97. *(volatile unsigned long __force *)addr = v;
  98. }
  99. #define readb(addr) eeh_readb(addr)
  100. #define readw(addr) eeh_readw(addr)
  101. #define readl(addr) eeh_readl(addr)
  102. #define readq(addr) eeh_readq(addr)
  103. #define writeb(data, addr) eeh_writeb((data), (addr))
  104. #define writew(data, addr) eeh_writew((data), (addr))
  105. #define writel(data, addr) eeh_writel((data), (addr))
  106. #define writeq(data, addr) eeh_writeq((data), (addr))
  107. #define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
  108. #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
  109. #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
  110. #define inb(port) eeh_inb((unsigned long)port)
  111. #define outb(val, port) eeh_outb(val, (unsigned long)port)
  112. #define inw(port) eeh_inw((unsigned long)port)
  113. #define outw(val, port) eeh_outw(val, (unsigned long)port)
  114. #define inl(port) eeh_inl((unsigned long)port)
  115. #define outl(val, port) eeh_outl(val, (unsigned long)port)
  116. /*
  117. * The insw/outsw/insl/outsl macros don't do byte-swapping.
  118. * They are only used in practice for transferring buffers which
  119. * are arrays of bytes, and byte-swapping is not appropriate in
  120. * that case. - paulus */
  121. #define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
  122. #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
  123. #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
  124. #define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
  125. #define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
  126. #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
  127. #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  128. #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  129. #endif
  130. #define readb_relaxed(addr) readb(addr)
  131. #define readw_relaxed(addr) readw(addr)
  132. #define readl_relaxed(addr) readl(addr)
  133. #define readq_relaxed(addr) readq(addr)
  134. extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
  135. extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
  136. extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
  137. extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
  138. extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
  139. extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
  140. extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
  141. extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
  142. extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
  143. extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
  144. #define mmiowb()
  145. /*
  146. * output pause versions need a delay at least for the
  147. * w83c105 ide controller in a p610.
  148. */
  149. #define inb_p(port) inb(port)
  150. #define outb_p(val, port) (udelay(1), outb((val), (port)))
  151. #define inw_p(port) inw(port)
  152. #define outw_p(val, port) (udelay(1), outw((val), (port)))
  153. #define inl_p(port) inl(port)
  154. #define outl_p(val, port) (udelay(1), outl((val), (port)))
  155. /*
  156. * The *_ns versions below don't do byte-swapping.
  157. * Neither do the standard versions now, these are just here
  158. * for older code.
  159. */
  160. #define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
  161. #define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
  162. #define IO_SPACE_LIMIT ~(0UL)
  163. #ifdef __KERNEL__
  164. extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
  165. unsigned long size, unsigned long flags);
  166. extern void __iomem *__ioremap(unsigned long address, unsigned long size,
  167. unsigned long flags);
  168. /**
  169. * ioremap - map bus memory into CPU space
  170. * @address: bus address of the memory
  171. * @size: size of the resource to map
  172. *
  173. * ioremap performs a platform specific sequence of operations to
  174. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  175. * writew/writel functions and the other mmio helpers. The returned
  176. * address is not guaranteed to be usable directly as a virtual
  177. * address.
  178. */
  179. extern void __iomem *ioremap(unsigned long address, unsigned long size);
  180. #define ioremap_nocache(addr, size) ioremap((addr), (size))
  181. extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
  182. extern void iounmap(volatile void __iomem *addr);
  183. extern void __iomem * reserve_phb_iospace(unsigned long size);
  184. /**
  185. * virt_to_phys - map virtual addresses to physical
  186. * @address: address to remap
  187. *
  188. * The returned physical address is the physical (CPU) mapping for
  189. * the memory address given. It is only valid to use this function on
  190. * addresses directly mapped or allocated via kmalloc.
  191. *
  192. * This function does not give bus mappings for DMA transfers. In
  193. * almost all conceivable cases a device driver should not be using
  194. * this function
  195. */
  196. static inline unsigned long virt_to_phys(volatile void * address)
  197. {
  198. return __pa((unsigned long)address);
  199. }
  200. /**
  201. * phys_to_virt - map physical address to virtual
  202. * @address: address to remap
  203. *
  204. * The returned virtual address is a current CPU mapping for
  205. * the memory address given. It is only valid to use this function on
  206. * addresses that have a kernel mapping
  207. *
  208. * This function does not handle bus mappings for DMA transfers. In
  209. * almost all conceivable cases a device driver should not be using
  210. * this function
  211. */
  212. static inline void * phys_to_virt(unsigned long address)
  213. {
  214. return (void *)__va(address);
  215. }
  216. /*
  217. * Change "struct page" to physical address.
  218. */
  219. #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
  220. /* We do NOT want virtual merging, it would put too much pressure on
  221. * our iommu allocator. Instead, we want drivers to be smart enough
  222. * to coalesce sglists that happen to have been mapped in a contiguous
  223. * way by the iommu
  224. */
  225. #define BIO_VMERGE_BOUNDARY 0
  226. #endif /* __KERNEL__ */
  227. static inline void iosync(void)
  228. {
  229. __asm__ __volatile__ ("sync" : : : "memory");
  230. }
  231. /* Enforce in-order execution of data I/O.
  232. * No distinction between read/write on PPC; use eieio for all three.
  233. */
  234. #define iobarrier_rw() eieio()
  235. #define iobarrier_r() eieio()
  236. #define iobarrier_w() eieio()
  237. /*
  238. * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
  239. * These routines do not perform EEH-related I/O address translation,
  240. * and should not be used directly by device drivers. Use inb/readb
  241. * instead.
  242. */
  243. static inline int in_8(const volatile unsigned char __iomem *addr)
  244. {
  245. int ret;
  246. __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
  247. : "=r" (ret) : "m" (*addr));
  248. return ret;
  249. }
  250. static inline void out_8(volatile unsigned char __iomem *addr, int val)
  251. {
  252. __asm__ __volatile__("stb%U0%X0 %1,%0; sync"
  253. : "=m" (*addr) : "r" (val));
  254. }
  255. static inline int in_le16(const volatile unsigned short __iomem *addr)
  256. {
  257. int ret;
  258. __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
  259. : "=r" (ret) : "r" (addr), "m" (*addr));
  260. return ret;
  261. }
  262. static inline int in_be16(const volatile unsigned short __iomem *addr)
  263. {
  264. int ret;
  265. __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
  266. : "=r" (ret) : "m" (*addr));
  267. return ret;
  268. }
  269. static inline void out_le16(volatile unsigned short __iomem *addr, int val)
  270. {
  271. __asm__ __volatile__("sthbrx %1,0,%2; sync"
  272. : "=m" (*addr) : "r" (val), "r" (addr));
  273. }
  274. static inline void out_be16(volatile unsigned short __iomem *addr, int val)
  275. {
  276. __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
  277. : "=m" (*addr) : "r" (val));
  278. }
  279. static inline unsigned in_le32(const volatile unsigned __iomem *addr)
  280. {
  281. unsigned ret;
  282. __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
  283. : "=r" (ret) : "r" (addr), "m" (*addr));
  284. return ret;
  285. }
  286. static inline unsigned in_be32(const volatile unsigned __iomem *addr)
  287. {
  288. unsigned ret;
  289. __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
  290. : "=r" (ret) : "m" (*addr));
  291. return ret;
  292. }
  293. static inline void out_le32(volatile unsigned __iomem *addr, int val)
  294. {
  295. __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
  296. : "r" (val), "r" (addr));
  297. }
  298. static inline void out_be32(volatile unsigned __iomem *addr, int val)
  299. {
  300. __asm__ __volatile__("stw%U0%X0 %1,%0; sync"
  301. : "=m" (*addr) : "r" (val));
  302. }
  303. static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
  304. {
  305. unsigned long tmp, ret;
  306. __asm__ __volatile__(
  307. "ld %1,0(%2)\n"
  308. "twi 0,%1,0\n"
  309. "isync\n"
  310. "rldimi %0,%1,5*8,1*8\n"
  311. "rldimi %0,%1,3*8,2*8\n"
  312. "rldimi %0,%1,1*8,3*8\n"
  313. "rldimi %0,%1,7*8,4*8\n"
  314. "rldicl %1,%1,32,0\n"
  315. "rlwimi %0,%1,8,8,31\n"
  316. "rlwimi %0,%1,24,16,23\n"
  317. : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
  318. return ret;
  319. }
  320. static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
  321. {
  322. unsigned long ret;
  323. __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync"
  324. : "=r" (ret) : "m" (*addr));
  325. return ret;
  326. }
  327. static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
  328. {
  329. unsigned long tmp;
  330. __asm__ __volatile__(
  331. "rldimi %0,%1,5*8,1*8\n"
  332. "rldimi %0,%1,3*8,2*8\n"
  333. "rldimi %0,%1,1*8,3*8\n"
  334. "rldimi %0,%1,7*8,4*8\n"
  335. "rldicl %1,%1,32,0\n"
  336. "rlwimi %0,%1,8,8,31\n"
  337. "rlwimi %0,%1,24,16,23\n"
  338. "std %0,0(%3)\n"
  339. "sync"
  340. : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
  341. }
  342. static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
  343. {
  344. __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
  345. }
  346. #ifndef CONFIG_PPC_ISERIES
  347. #include <asm/eeh.h>
  348. #endif
  349. #ifdef __KERNEL__
  350. /**
  351. * check_signature - find BIOS signatures
  352. * @io_addr: mmio address to check
  353. * @signature: signature block
  354. * @length: length of signature
  355. *
  356. * Perform a signature comparison with the mmio address io_addr. This
  357. * address should have been obtained by ioremap.
  358. * Returns 1 on a match.
  359. */
  360. static inline int check_signature(const volatile void __iomem * io_addr,
  361. const unsigned char *signature, int length)
  362. {
  363. int retval = 0;
  364. #ifndef CONFIG_PPC_ISERIES
  365. do {
  366. if (readb(io_addr) != *signature)
  367. goto out;
  368. io_addr++;
  369. signature++;
  370. length--;
  371. } while (length);
  372. retval = 1;
  373. out:
  374. #endif
  375. return retval;
  376. }
  377. /* Nothing to do */
  378. #define dma_cache_inv(_start,_size) do { } while (0)
  379. #define dma_cache_wback(_start,_size) do { } while (0)
  380. #define dma_cache_wback_inv(_start,_size) do { } while (0)
  381. /* Check of existence of legacy devices */
  382. extern int check_legacy_ioport(unsigned long base_port);
  383. /*
  384. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  385. * access
  386. */
  387. #define xlate_dev_mem_ptr(p) __va(p)
  388. /*
  389. * Convert a virtual cached pointer to an uncached pointer
  390. */
  391. #define xlate_dev_kmem_ptr(p) p
  392. #endif /* __KERNEL__ */
  393. #endif /* CONFIG_PPC64 */
  394. #endif /* _ASM_POWERPC_IO_H */