interrupt.h 3.6 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
  7. * Copyright (C) 1996 by Paul M. Antoine
  8. * Copyright (C) 1999 Silicon Graphics
  9. * Copyright (C) 2000 MIPS Technologies, Inc.
  10. */
  11. #ifndef _ASM_INTERRUPT_H
  12. #define _ASM_INTERRUPT_H
  13. #include <linux/config.h>
  14. #include <asm/hazards.h>
  15. __asm__ (
  16. " .macro local_irq_enable \n"
  17. " .set push \n"
  18. " .set reorder \n"
  19. " .set noat \n"
  20. #ifdef CONFIG_CPU_MIPSR2
  21. " ei \n"
  22. #else
  23. " mfc0 $1,$12 \n"
  24. " ori $1,0x1f \n"
  25. " xori $1,0x1e \n"
  26. " mtc0 $1,$12 \n"
  27. #endif
  28. " irq_enable_hazard \n"
  29. " .set pop \n"
  30. " .endm");
  31. static inline void local_irq_enable(void)
  32. {
  33. __asm__ __volatile__(
  34. "local_irq_enable"
  35. : /* no outputs */
  36. : /* no inputs */
  37. : "memory");
  38. }
  39. /*
  40. * For cli() we have to insert nops to make sure that the new value
  41. * has actually arrived in the status register before the end of this
  42. * macro.
  43. * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  44. * no nops at all.
  45. */
  46. __asm__ (
  47. " .macro local_irq_disable\n"
  48. " .set push \n"
  49. " .set noat \n"
  50. #ifdef CONFIG_CPU_MIPSR2
  51. " di \n"
  52. #else
  53. " mfc0 $1,$12 \n"
  54. " ori $1,1 \n"
  55. " xori $1,1 \n"
  56. " .set noreorder \n"
  57. " mtc0 $1,$12 \n"
  58. #endif
  59. " irq_disable_hazard \n"
  60. " .set pop \n"
  61. " .endm \n");
  62. static inline void local_irq_disable(void)
  63. {
  64. __asm__ __volatile__(
  65. "local_irq_disable"
  66. : /* no outputs */
  67. : /* no inputs */
  68. : "memory");
  69. }
  70. __asm__ (
  71. " .macro local_save_flags flags \n"
  72. " .set push \n"
  73. " .set reorder \n"
  74. " mfc0 \\flags, $12 \n"
  75. " .set pop \n"
  76. " .endm \n");
  77. #define local_save_flags(x) \
  78. __asm__ __volatile__( \
  79. "local_save_flags %0" \
  80. : "=r" (x))
  81. __asm__ (
  82. " .macro local_irq_save result \n"
  83. " .set push \n"
  84. " .set reorder \n"
  85. " .set noat \n"
  86. #ifdef CONFIG_CPU_MIPSR2
  87. " di \\result \n"
  88. #else
  89. " mfc0 \\result, $12 \n"
  90. " ori $1, \\result, 1 \n"
  91. " xori $1, 1 \n"
  92. " .set noreorder \n"
  93. " mtc0 $1, $12 \n"
  94. #endif
  95. " irq_disable_hazard \n"
  96. " .set pop \n"
  97. " .endm \n");
  98. #define local_irq_save(x) \
  99. __asm__ __volatile__( \
  100. "local_irq_save\t%0" \
  101. : "=r" (x) \
  102. : /* no inputs */ \
  103. : "memory")
  104. __asm__ (
  105. " .macro local_irq_restore flags \n"
  106. " .set noreorder \n"
  107. " .set noat \n"
  108. #if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
  109. /*
  110. * Slow, but doesn't suffer from a relativly unlikely race
  111. * condition we're having since days 1.
  112. */
  113. " beqz \\flags, 1f \n"
  114. " di \n"
  115. " ei \n"
  116. "1: \n"
  117. #elif defined(CONFIG_CPU_MIPSR2)
  118. /*
  119. * Fast, dangerous. Life is fun, life is good.
  120. */
  121. " mfc0 $1, $12 \n"
  122. " ins $1, \\flags, 0, 1 \n"
  123. " mtc0 $1, $12 \n"
  124. #else
  125. " mfc0 $1, $12 \n"
  126. " andi \\flags, 1 \n"
  127. " ori $1, 1 \n"
  128. " xori $1, 1 \n"
  129. " or \\flags, $1 \n"
  130. " mtc0 \\flags, $12 \n"
  131. #endif
  132. " irq_disable_hazard \n"
  133. " .set at \n"
  134. " .set reorder \n"
  135. " .endm \n");
  136. #define local_irq_restore(flags) \
  137. do { \
  138. unsigned long __tmp1; \
  139. \
  140. __asm__ __volatile__( \
  141. "local_irq_restore\t%0" \
  142. : "=r" (__tmp1) \
  143. : "0" (flags) \
  144. : "memory"); \
  145. } while(0)
  146. #define irqs_disabled() \
  147. ({ \
  148. unsigned long flags; \
  149. local_save_flags(flags); \
  150. !(flags & 1); \
  151. })
  152. #endif /* _ASM_INTERRUPT_H */