ras.c 10 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. /* Change Activity:
  19. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  20. * End Change Activity
  21. */
  22. #include <linux/errno.h>
  23. #include <linux/threads.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/ioport.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/timex.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/pci.h>
  33. #include <linux/delay.h>
  34. #include <linux/irq.h>
  35. #include <linux/random.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/bitops.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/irq.h>
  43. #include <asm/cache.h>
  44. #include <asm/prom.h>
  45. #include <asm/ptrace.h>
  46. #include <asm/machdep.h>
  47. #include <asm/rtas.h>
  48. #include <asm/udbg.h>
  49. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  50. static DEFINE_SPINLOCK(ras_log_buf_lock);
  51. char mce_data_buf[RTAS_ERROR_LOG_MAX]
  52. ;
  53. /* This is true if we are using the firmware NMI handler (typically LPAR) */
  54. extern int fwnmi_active;
  55. static int ras_get_sensor_state_token;
  56. static int ras_check_exception_token;
  57. #define EPOW_SENSOR_TOKEN 9
  58. #define EPOW_SENSOR_INDEX 0
  59. #define RAS_VECTOR_OFFSET 0x500
  60. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
  61. struct pt_regs * regs);
  62. static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
  63. struct pt_regs * regs);
  64. /* #define DEBUG */
  65. static void request_ras_irqs(struct device_node *np, char *propname,
  66. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  67. const char *name)
  68. {
  69. unsigned int *ireg, len, i;
  70. int virq, n_intr;
  71. ireg = (unsigned int *)get_property(np, propname, &len);
  72. if (ireg == NULL)
  73. return;
  74. n_intr = prom_n_intr_cells(np);
  75. len /= n_intr * sizeof(*ireg);
  76. for (i = 0; i < len; i++) {
  77. virq = virt_irq_create_mapping(*ireg);
  78. if (virq == NO_IRQ) {
  79. printk(KERN_ERR "Unable to allocate interrupt "
  80. "number for %s\n", np->full_name);
  81. return;
  82. }
  83. if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) {
  84. printk(KERN_ERR "Unable to request interrupt %d for "
  85. "%s\n", irq_offset_up(virq), np->full_name);
  86. return;
  87. }
  88. ireg += n_intr;
  89. }
  90. }
  91. /*
  92. * Initialize handlers for the set of interrupts caused by hardware errors
  93. * and power system events.
  94. */
  95. static int __init init_ras_IRQ(void)
  96. {
  97. struct device_node *np;
  98. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  99. ras_check_exception_token = rtas_token("check-exception");
  100. /* Internal Errors */
  101. np = of_find_node_by_path("/event-sources/internal-errors");
  102. if (np != NULL) {
  103. request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt,
  104. "RAS_ERROR");
  105. request_ras_irqs(np, "interrupts", ras_error_interrupt,
  106. "RAS_ERROR");
  107. of_node_put(np);
  108. }
  109. /* EPOW Events */
  110. np = of_find_node_by_path("/event-sources/epow-events");
  111. if (np != NULL) {
  112. request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt,
  113. "RAS_EPOW");
  114. request_ras_irqs(np, "interrupts", ras_epow_interrupt,
  115. "RAS_EPOW");
  116. of_node_put(np);
  117. }
  118. return 1;
  119. }
  120. __initcall(init_ras_IRQ);
  121. /*
  122. * Handle power subsystem events (EPOW).
  123. *
  124. * Presently we just log the event has occurred. This should be fixed
  125. * to examine the type of power failure and take appropriate action where
  126. * the time horizon permits something useful to be done.
  127. */
  128. static irqreturn_t
  129. ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  130. {
  131. int status = 0xdeadbeef;
  132. int state = 0;
  133. int critical;
  134. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  135. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  136. if (state > 3)
  137. critical = 1; /* Time Critical */
  138. else
  139. critical = 0;
  140. spin_lock(&ras_log_buf_lock);
  141. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  142. RAS_VECTOR_OFFSET,
  143. virt_irq_to_real(irq_offset_down(irq)),
  144. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  145. critical, __pa(&ras_log_buf),
  146. rtas_get_error_log_max());
  147. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  148. *((unsigned long *)&ras_log_buf), status, state);
  149. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  150. *((unsigned long *)&ras_log_buf), status, state);
  151. /* format and print the extended information */
  152. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  153. spin_unlock(&ras_log_buf_lock);
  154. return IRQ_HANDLED;
  155. }
  156. /*
  157. * Handle hardware error interrupts.
  158. *
  159. * RTAS check-exception is called to collect data on the exception. If
  160. * the error is deemed recoverable, we log a warning and return.
  161. * For nonrecoverable errors, an error is logged and we stop all processing
  162. * as quickly as possible in order to prevent propagation of the failure.
  163. */
  164. static irqreturn_t
  165. ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  166. {
  167. struct rtas_error_log *rtas_elog;
  168. int status = 0xdeadbeef;
  169. int fatal;
  170. spin_lock(&ras_log_buf_lock);
  171. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  172. RAS_VECTOR_OFFSET,
  173. virt_irq_to_real(irq_offset_down(irq)),
  174. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  175. __pa(&ras_log_buf),
  176. rtas_get_error_log_max());
  177. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  178. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  179. fatal = 1;
  180. else
  181. fatal = 0;
  182. /* format and print the extended information */
  183. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  184. if (fatal) {
  185. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  186. *((unsigned long *)&ras_log_buf), status);
  187. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  188. *((unsigned long *)&ras_log_buf), status);
  189. #ifndef DEBUG
  190. /* Don't actually power off when debugging so we can test
  191. * without actually failing while injecting errors.
  192. * Error data will not be logged to syslog.
  193. */
  194. ppc_md.power_off();
  195. #endif
  196. } else {
  197. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  198. *((unsigned long *)&ras_log_buf), status);
  199. printk(KERN_WARNING
  200. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  201. *((unsigned long *)&ras_log_buf), status);
  202. }
  203. spin_unlock(&ras_log_buf_lock);
  204. return IRQ_HANDLED;
  205. }
  206. /* Get the error information for errors coming through the
  207. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  208. * the actual r3 if possible, and a ptr to the error log entry
  209. * will be returned if found.
  210. *
  211. * The mce_data_buf does not have any locks or protection around it,
  212. * if a second machine check comes in, or a system reset is done
  213. * before we have logged the error, then we will get corruption in the
  214. * error log. This is preferable over holding off on calling
  215. * ibm,nmi-interlock which would result in us checkstopping if a
  216. * second machine check did come in.
  217. */
  218. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  219. {
  220. unsigned long errdata = regs->gpr[3];
  221. struct rtas_error_log *errhdr = NULL;
  222. unsigned long *savep;
  223. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  224. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  225. savep = __va(errdata);
  226. regs->gpr[3] = savep[0]; /* restore original r3 */
  227. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  228. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  229. errhdr = (struct rtas_error_log *)mce_data_buf;
  230. } else {
  231. printk("FWNMI: corrupt r3\n");
  232. }
  233. return errhdr;
  234. }
  235. /* Call this when done with the data returned by FWNMI_get_errinfo.
  236. * It will release the saved data area for other CPUs in the
  237. * partition to receive FWNMI errors.
  238. */
  239. static void fwnmi_release_errinfo(void)
  240. {
  241. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  242. if (ret != 0)
  243. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  244. }
  245. void pSeries_system_reset_exception(struct pt_regs *regs)
  246. {
  247. if (fwnmi_active) {
  248. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  249. if (errhdr) {
  250. /* XXX Should look at FWNMI information */
  251. }
  252. fwnmi_release_errinfo();
  253. }
  254. }
  255. /*
  256. * See if we can recover from a machine check exception.
  257. * This is only called on power4 (or above) and only via
  258. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  259. * which provides the error analysis for us.
  260. *
  261. * Return 1 if corrected (or delivered a signal).
  262. * Return 0 if there is nothing we can do.
  263. */
  264. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  265. {
  266. int nonfatal = 0;
  267. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  268. /* Platform corrected itself */
  269. nonfatal = 1;
  270. } else if ((regs->msr & MSR_RI) &&
  271. user_mode(regs) &&
  272. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  273. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  274. err->target == RTAS_TARGET_MEMORY &&
  275. err->type == RTAS_TYPE_ECC_UNCORR &&
  276. !(current->pid == 0 || current->pid == 1)) {
  277. /* Kill off a user process with an ECC error */
  278. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  279. current->pid);
  280. /* XXX something better for ECC error? */
  281. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  282. nonfatal = 1;
  283. }
  284. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  285. return nonfatal;
  286. }
  287. /*
  288. * Handle a machine check.
  289. *
  290. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  291. * should be present. If so the handler which called us tells us if the
  292. * error was recovered (never true if RI=0).
  293. *
  294. * On hardware prior to Power 4 these exceptions were asynchronous which
  295. * means we can't tell exactly where it occurred and so we can't recover.
  296. */
  297. int pSeries_machine_check_exception(struct pt_regs *regs)
  298. {
  299. struct rtas_error_log *errp;
  300. if (fwnmi_active) {
  301. errp = fwnmi_get_errinfo(regs);
  302. fwnmi_release_errinfo();
  303. if (errp && recover_mce(regs, errp))
  304. return 1;
  305. }
  306. return 0;
  307. }