Kconfig.cpu 8.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309
  1. # Put here option for CPU selection and depending optimization
  2. if !X86_ELAN
  3. choice
  4. prompt "Processor family"
  5. default M686
  6. config M386
  7. bool "386"
  8. ---help---
  9. This is the processor type of your CPU. This information is used for
  10. optimizing purposes. In order to compile a kernel that can run on
  11. all x86 CPU types (albeit not optimally fast), you can specify
  12. "386" here.
  13. The kernel will not necessarily run on earlier architectures than
  14. the one you have chosen, e.g. a Pentium optimized kernel will run on
  15. a PPro, but not necessarily on a i486.
  16. Here are the settings recommended for greatest speed:
  17. - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
  18. 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
  19. will run on a 386 class machine.
  20. - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
  21. SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  22. - "586" for generic Pentium CPUs lacking the TSC
  23. (time stamp counter) register.
  24. - "Pentium-Classic" for the Intel Pentium.
  25. - "Pentium-MMX" for the Intel Pentium MMX.
  26. - "Pentium-Pro" for the Intel Pentium Pro.
  27. - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
  28. - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
  29. - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  30. - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  31. - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
  32. - "Crusoe" for the Transmeta Crusoe series.
  33. - "Efficeon" for the Transmeta Efficeon series.
  34. - "Winchip-C6" for original IDT Winchip.
  35. - "Winchip-2" for IDT Winchip 2.
  36. - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
  37. - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  38. - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  39. - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
  40. If you don't know what to do, choose "386".
  41. config M486
  42. bool "486"
  43. help
  44. Select this for a 486 series processor, either Intel or one of the
  45. compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
  46. DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
  47. U5S.
  48. config M586
  49. bool "586/K5/5x86/6x86/6x86MX"
  50. help
  51. Select this for an 586 or 686 series processor such as the AMD K5,
  52. the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
  53. assume the RDTSC (Read Time Stamp Counter) instruction.
  54. config M586TSC
  55. bool "Pentium-Classic"
  56. help
  57. Select this for a Pentium Classic processor with the RDTSC (Read
  58. Time Stamp Counter) instruction for benchmarking.
  59. config M586MMX
  60. bool "Pentium-MMX"
  61. help
  62. Select this for a Pentium with the MMX graphics/multimedia
  63. extended instructions.
  64. config M686
  65. bool "Pentium-Pro"
  66. help
  67. Select this for Intel Pentium Pro chips. This enables the use of
  68. Pentium Pro extended instructions, and disables the init-time guard
  69. against the f00f bug found in earlier Pentiums.
  70. config MPENTIUMII
  71. bool "Pentium-II/Celeron(pre-Coppermine)"
  72. help
  73. Select this for Intel chips based on the Pentium-II and
  74. pre-Coppermine Celeron core. This option enables an unaligned
  75. copy optimization, compiles the kernel with optimization flags
  76. tailored for the chip, and applies any applicable Pentium Pro
  77. optimizations.
  78. config MPENTIUMIII
  79. bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
  80. help
  81. Select this for Intel chips based on the Pentium-III and
  82. Celeron-Coppermine core. This option enables use of some
  83. extended prefetch instructions in addition to the Pentium II
  84. extensions.
  85. config MPENTIUMM
  86. bool "Pentium M"
  87. help
  88. Select this for Intel Pentium M (not Pentium-4 M)
  89. notebook chips.
  90. config MPENTIUM4
  91. bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
  92. help
  93. Select this for Intel Pentium 4 chips. This includes the
  94. Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
  95. (not Pentium M) chips. This option enables compile flags
  96. optimized for the chip, uses the correct cache shift, and
  97. applies any applicable Pentium III optimizations.
  98. config MK6
  99. bool "K6/K6-II/K6-III"
  100. help
  101. Select this for an AMD K6-family processor. Enables use of
  102. some extended instructions, and passes appropriate optimization
  103. flags to GCC.
  104. config MK7
  105. bool "Athlon/Duron/K7"
  106. help
  107. Select this for an AMD Athlon K7-family processor. Enables use of
  108. some extended instructions, and passes appropriate optimization
  109. flags to GCC.
  110. config MK8
  111. bool "Opteron/Athlon64/Hammer/K8"
  112. help
  113. Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
  114. use of some extended instructions, and passes appropriate optimization
  115. flags to GCC.
  116. config MCRUSOE
  117. bool "Crusoe"
  118. help
  119. Select this for a Transmeta Crusoe processor. Treats the processor
  120. like a 586 with TSC, and sets some GCC optimization flags (like a
  121. Pentium Pro with no alignment requirements).
  122. config MEFFICEON
  123. bool "Efficeon"
  124. help
  125. Select this for a Transmeta Efficeon processor.
  126. config MWINCHIPC6
  127. bool "Winchip-C6"
  128. help
  129. Select this for an IDT Winchip C6 chip. Linux and GCC
  130. treat this chip as a 586TSC with some extended instructions
  131. and alignment requirements.
  132. config MWINCHIP2
  133. bool "Winchip-2"
  134. help
  135. Select this for an IDT Winchip-2. Linux and GCC
  136. treat this chip as a 586TSC with some extended instructions
  137. and alignment requirements.
  138. config MWINCHIP3D
  139. bool "Winchip-2A/Winchip-3"
  140. help
  141. Select this for an IDT Winchip-2A or 3. Linux and GCC
  142. treat this chip as a 586TSC with some extended instructions
  143. and alignment reqirements. Also enable out of order memory
  144. stores for this CPU, which can increase performance of some
  145. operations.
  146. config MGEODEGX1
  147. bool "GeodeGX1"
  148. help
  149. Select this for a Geode GX1 (Cyrix MediaGX) chip.
  150. config MCYRIXIII
  151. bool "CyrixIII/VIA-C3"
  152. help
  153. Select this for a Cyrix III or C3 chip. Presently Linux and GCC
  154. treat this chip as a generic 586. Whilst the CPU is 686 class,
  155. it lacks the cmov extension which gcc assumes is present when
  156. generating 686 code.
  157. Note that Nehemiah (Model 9) and above will not boot with this
  158. kernel due to them lacking the 3DNow! instructions used in earlier
  159. incarnations of the CPU.
  160. config MVIAC3_2
  161. bool "VIA C3-2 (Nehemiah)"
  162. help
  163. Select this for a VIA C3 "Nehemiah". Selecting this enables usage
  164. of SSE and tells gcc to treat the CPU as a 686.
  165. Note, this kernel will not boot on older (pre model 9) C3s.
  166. endchoice
  167. config X86_GENERIC
  168. bool "Generic x86 support"
  169. help
  170. Instead of just including optimizations for the selected
  171. x86 variant (e.g. PII, Crusoe or Athlon), include some more
  172. generic optimizations as well. This will make the kernel
  173. perform better on x86 CPUs other than that selected.
  174. This is really intended for distributors who need more
  175. generic optimizations.
  176. endif
  177. #
  178. # Define implied options from the CPU selection here
  179. #
  180. config X86_CMPXCHG
  181. bool
  182. depends on !M386
  183. default y
  184. config X86_XADD
  185. bool
  186. depends on !M386
  187. default y
  188. config X86_L1_CACHE_SHIFT
  189. int
  190. default "7" if MPENTIUM4 || X86_GENERIC
  191. default "4" if X86_ELAN || M486 || M386
  192. default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
  193. default "6" if MK7 || MK8 || MPENTIUMM
  194. config RWSEM_GENERIC_SPINLOCK
  195. bool
  196. depends on M386
  197. default y
  198. config RWSEM_XCHGADD_ALGORITHM
  199. bool
  200. depends on !M386
  201. default y
  202. config GENERIC_CALIBRATE_DELAY
  203. bool
  204. default y
  205. config X86_PPRO_FENCE
  206. bool
  207. depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
  208. default y
  209. config X86_F00F_BUG
  210. bool
  211. depends on M586MMX || M586TSC || M586 || M486 || M386
  212. default y
  213. config X86_WP_WORKS_OK
  214. bool
  215. depends on !M386
  216. default y
  217. config X86_INVLPG
  218. bool
  219. depends on !M386
  220. default y
  221. config X86_BSWAP
  222. bool
  223. depends on !M386
  224. default y
  225. config X86_POPAD_OK
  226. bool
  227. depends on !M386
  228. default y
  229. config X86_CMPXCHG64
  230. bool
  231. depends on !M386 && !M486
  232. default y
  233. config X86_ALIGNMENT_16
  234. bool
  235. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
  236. default y
  237. config X86_GOOD_APIC
  238. bool
  239. depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
  240. default y
  241. config X86_INTEL_USERCOPY
  242. bool
  243. depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
  244. default y
  245. config X86_USE_PPRO_CHECKSUM
  246. bool
  247. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
  248. default y
  249. config X86_USE_3DNOW
  250. bool
  251. depends on MCYRIXIII || MK7
  252. default y
  253. config X86_OOSTORE
  254. bool
  255. depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
  256. default y
  257. config X86_TSC
  258. bool
  259. depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1) && !X86_NUMAQ
  260. default y